gem5
v24.0.0.0
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arch
x86
bare_metal
workload.hh
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/*
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* Copyright 2022 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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*/
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#ifndef __ARCH_X86_BARE_METAL_WORKLOAD_HH__
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#define __ARCH_X86_BARE_METAL_WORKLOAD_HH__
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#include "
base/loader/object_file.hh
"
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#include "
base/loader/symtab.hh
"
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#include "
base/types.hh
"
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#include "
cpu/thread_context.hh
"
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#include "params/X86BareMetalWorkload.hh"
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#include "
sim/workload.hh
"
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namespace
gem5
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{
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namespace
X86ISA
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{
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class
BareMetalWorkload
:
public
Workload
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{
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public
:
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using
Params
= X86BareMetalWorkloadParams;
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BareMetalWorkload
(
const
Params
&
p
);
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public
:
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void
initState
()
override
;
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Addr
getEntry
()
const override
{
return
0; }
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ByteOrder
byteOrder
()
const override
{
return
ByteOrder::little; }
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loader::Arch
getArch
()
const override
{
return
loader::UnknownArch
; }
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const
loader::SymbolTable
&
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symtab
(
ThreadContext
*tc)
override
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{
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static
loader::SymbolTable
sym_tab;
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return
sym_tab;
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}
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bool
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insertSymbol
(
const
loader::Symbol
&symbol)
override
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{
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return
false
;
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}
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};
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}
// namespace X86ISA
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}
// namespace gem5
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#endif
// __ARCH_X86_BARE_METAL_WORKLOAD_HH__
types.hh
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
gem5::Workload
Definition
workload.hh:51
gem5::X86ISA::BareMetalWorkload
Definition
workload.hh:45
gem5::X86ISA::BareMetalWorkload::getEntry
Addr getEntry() const override
Definition
workload.hh:53
gem5::X86ISA::BareMetalWorkload::symtab
const loader::SymbolTable & symtab(ThreadContext *tc) override
Definition
workload.hh:57
gem5::X86ISA::BareMetalWorkload::byteOrder
ByteOrder byteOrder() const override
Definition
workload.hh:54
gem5::X86ISA::BareMetalWorkload::Params
X86BareMetalWorkloadParams Params
Definition
workload.hh:47
gem5::X86ISA::BareMetalWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition
workload.cc:46
gem5::X86ISA::BareMetalWorkload::insertSymbol
bool insertSymbol(const loader::Symbol &symbol) override
Definition
workload.hh:64
gem5::X86ISA::BareMetalWorkload::BareMetalWorkload
BareMetalWorkload(const Params &p)
Definition
workload.cc:42
gem5::X86ISA::BareMetalWorkload::getArch
loader::Arch getArch() const override
Definition
workload.hh:55
gem5::loader::SymbolTable
Definition
symtab.hh:152
gem5::loader::Symbol
Definition
symtab.hh:63
thread_context.hh
gem5::X86ISA::p
Bitfield< 0 > p
Definition
pagetable.hh:151
gem5::loader::Arch
Arch
Definition
object_file.hh:62
gem5::loader::UnknownArch
@ UnknownArch
Definition
object_file.hh:63
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
object_file.hh
workload.hh
symtab.hh
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