gem5  v22.1.0.0
workload.cc
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27 
29 
30 #include "arch/x86/faults.hh"
31 #include "arch/x86/pcstate.hh"
32 #include "cpu/thread_context.hh"
33 #include "params/X86BareMetalWorkload.hh"
34 #include "sim/system.hh"
35 
36 namespace gem5
37 {
38 
39 namespace X86ISA
40 {
41 
43 {}
44 
45 void
47 {
49 
50  for (auto *tc: system->threads) {
52 
53  if (tc->contextId() == 0) {
54  PCState pc = tc->pcState().as<PCState>();
55  // Don't start in the microcode ROM which would halt this CPU.
56  pc.upc(0);
57  pc.nupc(1);
58  tc->pcState(pc);
59  tc->activate();
60  } else {
61  // This is an application processor (AP). It should be initialized
62  // to look like only the BIOS POST has run on it and put then put
63  // it into a halted state.
64  tc->suspend();
65  }
66  }
67 }
68 
69 } // namespace X86ISA
70 
71 } // namespace gem5
Threads threads
Definition: system.hh:313
System * system
Definition: workload.hh:80
X86BareMetalWorkloadParams Params
Definition: workload.hh:47
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: workload.cc:46
BareMetalWorkload(const Params &p)
Definition: workload.cc:42
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:183
virtual void initState()
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: sim_object.cc:94
Bitfield< 19 > pc
Definition: misc.hh:812
Bitfield< 0 > p
Definition: pagetable.hh:151
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....

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