gem5
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arch
x86
process.hh
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_X86_PROCESS_HH__
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#define __ARCH_X86_PROCESS_HH__
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#include <string>
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#include <vector>
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#include "
arch/x86/pagetable.hh
"
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#include "
mem/multi_level_page_table.hh
"
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#include "
sim/aux_vector.hh
"
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#include "
sim/process.hh
"
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namespace
gem5
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{
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class
SyscallDesc;
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namespace
X86ISA
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{
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namespace
auxv
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{
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enum
X86AuxiliaryVectorTypes
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{
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Sysinfo
= 32,
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SysinfoEhdr
= 33
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};
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}
// namespace auxv
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class
X86Process
:
public
Process
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{
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protected
:
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Addr
_gdtStart
;
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Addr
_gdtSize
;
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X86Process
(
const
ProcessParams &
params
,
loader::ObjectFile
*
objFile
);
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template
<
class
IntType>
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void
argsInit
(
int
pageSize,
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std::vector
<
gem5::auxv::AuxVector<IntType>
> extraAuxvs);
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public
:
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Addr
gdtStart
()
const
{
return
_gdtStart
; }
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Addr
gdtSize
()
const
{
return
_gdtSize
; }
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void
clone
(
ThreadContext
*old_tc,
ThreadContext
*new_tc,
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Process
*process,
RegVal
flags
)
override
;
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X86Process
&
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operator=
(
const
X86Process
&in)
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{
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if
(
this
== &in)
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return
*
this
;
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_gdtStart
= in.
_gdtStart
;
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_gdtSize
= in.
_gdtSize
;
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return
*
this
;
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}
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};
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class
X86_64Process
:
public
X86Process
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{
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protected
:
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class
VSyscallPage
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{
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public
:
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Addr
base
;
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Addr
size
;
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Addr
vtimeOffset
;
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Addr
vgettimeofdayOffset
;
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VSyscallPage
&
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operator=
(
const
VSyscallPage
&in)
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{
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if
(
this
== &in)
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return
*
this
;
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base
= in.
base
;
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size
= in.
size
;
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vtimeOffset
= in.
vtimeOffset
;
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vgettimeofdayOffset
= in.
vgettimeofdayOffset
;
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return
*
this
;
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}
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};
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VSyscallPage
vsyscallPage
;
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public
:
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X86_64Process
(
const
ProcessParams &
params
,
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loader::ObjectFile
*
objFile
);
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void
argsInit
(
int
pageSize);
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void
initState
()
override
;
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void
clone
(
ThreadContext
*old_tc,
ThreadContext
*new_tc,
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Process
*process,
RegVal
flags
)
override
;
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};
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class
I386Process
:
public
X86Process
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{
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protected
:
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class
VSyscallPage
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{
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public
:
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Addr
base
;
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Addr
size
;
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Addr
vsyscallOffset
;
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Addr
vsysexitOffset
;
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VSyscallPage
&
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operator=
(
const
VSyscallPage
&in)
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{
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if
(
this
== &in)
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return
*
this
;
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base
= in.
base
;
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size
= in.
size
;
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vsyscallOffset
= in.
vsyscallOffset
;
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vsysexitOffset
= in.
vsysexitOffset
;
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return
*
this
;
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}
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};
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VSyscallPage
vsyscallPage
;
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public
:
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I386Process
(
const
ProcessParams &
params
,
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loader::ObjectFile
*
objFile
);
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const
VSyscallPage
&
getVSyscallPage
()
const
{
return
vsyscallPage
; }
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void
argsInit
(
int
pageSize);
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void
initState
()
override
;
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void
clone
(
ThreadContext
*old_tc,
ThreadContext
*new_tc,
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Process
*process,
RegVal
flags
)
override
;
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};
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}
// namespace X86ISA
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}
// namespace gem5
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#endif
// __ARCH_X86_PROCESS_HH__
aux_vector.hh
gem5::Process
Definition
process.hh:68
gem5::Process::objFile
loader::ObjectFile * objFile
Definition
process.hh:223
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
gem5::X86ISA::I386Process::VSyscallPage
Definition
process.hh:141
gem5::X86ISA::I386Process::VSyscallPage::operator=
VSyscallPage & operator=(const VSyscallPage &in)
Definition
process.hh:149
gem5::X86ISA::I386Process::VSyscallPage::base
Addr base
Definition
process.hh:143
gem5::X86ISA::I386Process::VSyscallPage::size
Addr size
Definition
process.hh:144
gem5::X86ISA::I386Process::VSyscallPage::vsyscallOffset
Addr vsyscallOffset
Definition
process.hh:145
gem5::X86ISA::I386Process::VSyscallPage::vsysexitOffset
Addr vsysexitOffset
Definition
process.hh:146
gem5::X86ISA::I386Process
Definition
process.hh:138
gem5::X86ISA::I386Process::clone
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition
process.cc:1075
gem5::X86ISA::I386Process::vsyscallPage
VSyscallPage vsyscallPage
Definition
process.hh:162
gem5::X86ISA::I386Process::I386Process
I386Process(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:125
gem5::X86ISA::I386Process::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
gem5::X86ISA::I386Process::argsInit
void argsInit(int pageSize)
Definition
process.cc:1056
gem5::X86ISA::I386Process::getVSyscallPage
const VSyscallPage & getVSyscallPage() const
Definition
process.hh:168
gem5::X86ISA::X86Process
Definition
process.hh:68
gem5::X86ISA::X86Process::clone
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition
process.cc:96
gem5::X86ISA::X86Process::gdtStart
Addr gdtStart() const
Definition
process.hh:80
gem5::X86ISA::X86Process::_gdtSize
Addr _gdtSize
Definition
process.hh:71
gem5::X86ISA::X86Process::_gdtStart
Addr _gdtStart
Definition
process.hh:70
gem5::X86ISA::X86Process::argsInit
void argsInit(int pageSize, std::vector< gem5::auxv::AuxVector< IntType > > extraAuxvs)
Definition
process.cc:763
gem5::X86ISA::X86Process::operator=
X86Process & operator=(const X86Process &in)
Definition
process.hh:87
gem5::X86ISA::X86Process::gdtSize
Addr gdtSize() const
Definition
process.hh:81
gem5::X86ISA::X86Process::X86Process
X86Process(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:84
gem5::X86ISA::X86_64Process::VSyscallPage
Definition
process.hh:103
gem5::X86ISA::X86_64Process::VSyscallPage::size
Addr size
Definition
process.hh:106
gem5::X86ISA::X86_64Process::VSyscallPage::vgettimeofdayOffset
Addr vgettimeofdayOffset
Definition
process.hh:108
gem5::X86ISA::X86_64Process::VSyscallPage::vtimeOffset
Addr vtimeOffset
Definition
process.hh:107
gem5::X86ISA::X86_64Process::VSyscallPage::operator=
VSyscallPage & operator=(const VSyscallPage &in)
Definition
process.hh:111
gem5::X86ISA::X86_64Process::VSyscallPage::base
Addr base
Definition
process.hh:105
gem5::X86ISA::X86_64Process
Definition
process.hh:100
gem5::X86ISA::X86_64Process::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition
process.cc:152
gem5::X86ISA::X86_64Process::clone
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition
process.cc:1067
gem5::X86ISA::X86_64Process::vsyscallPage
VSyscallPage vsyscallPage
Definition
process.hh:124
gem5::X86ISA::X86_64Process::X86_64Process
X86_64Process(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:104
gem5::X86ISA::X86_64Process::argsInit
void argsInit(int pageSize)
Definition
process.cc:1048
gem5::auxv::AuxVector
Definition
aux_vector.hh:44
gem5::loader::ObjectFile
Definition
object_file.hh:97
std::vector
STL vector class.
Definition
stl.hh:37
gem5::SimObject::params
const Params & params() const
Definition
sim_object.hh:176
flags
uint8_t flags
Definition
helpers.cc:87
multi_level_page_table.hh
Declaration of a multi-level page table.
gem5::X86ISA::auxv::X86AuxiliaryVectorTypes
X86AuxiliaryVectorTypes
Definition
process.hh:60
gem5::X86ISA::auxv::Sysinfo
@ Sysinfo
Definition
process.hh:61
gem5::X86ISA::auxv::SysinfoEhdr
@ SysinfoEhdr
Definition
process.hh:62
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::RegVal
uint64_t RegVal
Definition
types.hh:173
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
process.hh
pagetable.hh
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