pagetable.hh File Reference

#include <cstdint>
#include "arch/x86/page_size.hh"
#include "base/bitunion.hh"
#include "base/types.hh"
#include "base/trie.hh"
#include "mem/port_proxy.hh"
#include "sim/serialize.hh"

Go to the source code of this file.

Classes
struct	gem5::X86ISA::TlbEntry
class	gem5::X86ISA::LongModePTE

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	gem5::X86ISA
	This is exposed globally, independent of the ISA.

Typedefs
typedef Trie< Addr, X86ISA::TlbEntry >	gem5::TlbEntryTrie

Functions
	gem5::X86ISA::BitUnion64 (VAddr) Bitfield< 20
	gem5::X86ISA::EndBitUnion (VAddr) BitUnion64(PageTableEntry) Bitfield< 63 > nx
	gem5::X86ISA::EndBitUnion (PageTableEntry) template< int first

Variables
	gem5::X86ISA::longl1
Bitfield< 29, 21 >	gem5::X86ISA::longl2
Bitfield< 38, 30 >	gem5::X86ISA::longl3
Bitfield< 47, 39 >	gem5::X86ISA::longl4
Bitfield< 20, 12 >	gem5::X86ISA::pael1
Bitfield< 29, 21 >	gem5::X86ISA::pael2
Bitfield< 31, 30 >	gem5::X86ISA::pael3
Bitfield< 21, 12 >	gem5::X86ISA::norml1
Bitfield< 31, 22 >	gem5::X86ISA::norml2
Bitfield< 51, 12 >	gem5::X86ISA::base
Bitfield< 11, 9 >	gem5::X86ISA::avl
Bitfield< 8 >	gem5::X86ISA::g
Bitfield< 7 >	gem5::X86ISA::ps
Bitfield< 6 >	gem5::X86ISA::d
Bitfield< 5 >	gem5::X86ISA::a
Bitfield< 4 >	gem5::X86ISA::pcd
Bitfield< 3 >	gem5::X86ISA::pwt
Bitfield< 2 >	gem5::X86ISA::u
Bitfield< 1 >	gem5::X86ISA::w
Bitfield< 0 >	gem5::X86ISA::p