| _drainManager | gem5::Drainable | private |
| _drainState | gem5::Drainable | mutableprivate |
| _name | gem5::Named | private |
| _objNameResolver | gem5::SimObject | privatestatic |
| _params | gem5::SimObject | protected |
| access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, PacketList &writebacks) override | gem5::Cache | protectedvirtual |
| addrRanges | gem5::BaseCache | protected |
| addStat(statistics::Info *info) | gem5::statistics::Group | |
| addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
| allocateBlock(const PacketPtr pkt, PacketList &writebacks) | gem5::BaseCache | protected |
| allocateMissBuffer(PacketPtr pkt, Tick time, bool sched_send=true) | gem5::BaseCache | inline |
| allocateWriteBuffer(PacketPtr pkt, Tick time) | gem5::BaseCache | inline |
| allocOnFill(MemCmd cmd) const | gem5::BaseCache | inlineprotected |
| BaseCache(const BaseCacheParams &p, unsigned blk_size) | gem5::BaseCache | |
| blkSize | gem5::BaseCache | protected |
| blocked | gem5::BaseCache | protected |
| Blocked_NoMSHRs enum value | gem5::BaseCache | |
| Blocked_NoTargets enum value | gem5::BaseCache | |
| Blocked_NoWBBuffers enum value | gem5::BaseCache | |
| BlockedCause enum name | gem5::BaseCache | |
| blockedCycle | gem5::BaseCache | protected |
| Cache(const CacheParams &p) | gem5::Cache | |
| calculateAccessLatency(const CacheBlk *blk, const uint32_t delay, const Cycles lookup_lat) const | gem5::BaseCache | protected |
| calculateTagOnlyLatency(const uint32_t delay, const Cycles lookup_lat) const | gem5::BaseCache | protected |
| cleanEvictBlk(CacheBlk *blk) | gem5::Cache | protected |
| clearBlocked(BlockedCause cause) | gem5::BaseCache | inline |
| clockDomain | gem5::Clocked | private |
| Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
| Clocked(Clocked &)=delete | gem5::Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
| ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
| clockPeriod() const | gem5::Clocked | inline |
| clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
| clusivity | gem5::BaseCache | protected |
| cmpAndSwap(CacheBlk *blk, PacketPtr pkt) | gem5::BaseCache | protected |
| coalesce() const | gem5::BaseCache | |
| compressor | gem5::BaseCache | protected |
| cpuSidePort | gem5::BaseCache | protected |
| createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, bool needs_writable, bool is_whole_line_write) const override | gem5::Cache | protectedvirtual |
| curCycle() const | gem5::Clocked | inline |
| currentSection() | gem5::Serializable | static |
| cycle | gem5::Clocked | mutableprivate |
| cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
| dataLatency | gem5::BaseCache | protected |
| deschedule(Event &event) | gem5::EventManager | inline |
| deschedule(Event *event) | gem5::EventManager | inline |
| dmDrain() | gem5::Drainable | private |
| dmDrainResume() | gem5::Drainable | private |
| doFastWrites | gem5::Cache | protected |
| doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data, bool already_copied, bool pending_inval) | gem5::Cache | protected |
| doWritebacks(PacketList &writebacks, Tick forward_time) override | gem5::Cache | protectedvirtual |
| doWritebacksAtomic(PacketList &writebacks) override | gem5::Cache | protectedvirtual |
| drain() override | gem5::SimObject | inlinevirtual |
| Drainable() | gem5::Drainable | protected |
| drainResume() | gem5::Drainable | inlineprotectedvirtual |
| drainState() const | gem5::Drainable | inline |
| EventManager(EventManager &em) | gem5::EventManager | inline |
| EventManager(EventManager *em) | gem5::EventManager | inline |
| EventManager(EventQueue *eq) | gem5::EventManager | inline |
| eventq | gem5::EventManager | protected |
| eventQueue() const | gem5::EventManager | inline |
| evictBlock(CacheBlk *blk) override | gem5::Cache | protectedvirtual |
| gem5::BaseCache::evictBlock(CacheBlk *blk, PacketList &writebacks) | gem5::BaseCache | protected |
| fillLatency | gem5::BaseCache | protected |
| find(const char *name) | gem5::SimObject | static |
| forwardLatency | gem5::BaseCache | protected |
| forwardSnoops | gem5::BaseCache | protected |
| frequency() const | gem5::Clocked | inline |
| functionalAccess(PacketPtr pkt, bool from_cpu_side) | gem5::BaseCache | protectedvirtual |
| generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
| getAddrRanges() const | gem5::BaseCache | inline |
| getBlockSize() const | gem5::BaseCache | inline |
| getNextQueueEntry() | gem5::BaseCache | protected |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | gem5::BaseCache | virtual |
| getProbeManager() | gem5::SimObject | |
| getSimObjectResolver() | gem5::SimObject | static |
| getStatGroups() const | gem5::statistics::Group | |
| getStats() const | gem5::statistics::Group | |
| Group()=delete | gem5::statistics::Group | |
| Group(const Group &)=delete | gem5::statistics::Group | |
| Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
| handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk, PacketList &writebacks) override | gem5::Cache | protectedvirtual |
| handleEvictions(std::vector< CacheBlk * > &evict_blks, PacketList &writebacks) | gem5::BaseCache | protected |
| handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, bool allocate) | gem5::BaseCache | protected |
| handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, bool is_deferred, bool pending_inval) | gem5::Cache | protected |
| handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time) override | gem5::Cache | protectedvirtual |
| handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, Tick forward_time, Tick request_time) override | gem5::Cache | protectedvirtual |
| gem5::BaseCache::handleTimingReqMiss(PacketPtr pkt, MSHR *mshr, CacheBlk *blk, Tick forward_time, Tick request_time) | gem5::BaseCache | protected |
| handleUncacheableWriteResp(PacketPtr pkt) | gem5::BaseCache | protected |
| hasBeenPrefetched(Addr addr, bool is_secure) const | gem5::BaseCache | inline |
| inCache(Addr addr, bool is_secure) const | gem5::BaseCache | inline |
| incHitCount(PacketPtr pkt) | gem5::BaseCache | inline |
| incMissCount(PacketPtr pkt) | gem5::BaseCache | inline |
| init() override | gem5::BaseCache | virtual |
| initState() | gem5::SimObject | virtual |
| inMissQueue(Addr addr, bool is_secure) const | gem5::BaseCache | inline |
| inRange(Addr addr) const | gem5::BaseCache | protected |
| invalidateBlock(CacheBlk *blk) | gem5::BaseCache | protected |
| invalidateVisitor(CacheBlk &blk) | gem5::BaseCache | |
| isBlocked() const | gem5::BaseCache | inline |
| isCachedAbove(PacketPtr pkt, bool is_timing=true) | gem5::Cache | protected |
| isDirty() const | gem5::BaseCache | protected |
| isReadOnly | gem5::BaseCache | protected |
| loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
| lookupLatency | gem5::BaseCache | protected |
| maintainClusivity(bool from_cache, CacheBlk *blk) | gem5::BaseCache | protected |
| markInService(MSHR *mshr, bool pending_modified_resp) | gem5::BaseCache | inlineprotected |
| markInService(WriteQueueEntry *entry) | gem5::BaseCache | inlineprotected |
| memInvalidate() override | gem5::BaseCache | protectedvirtual |
| memSidePort | gem5::BaseCache | protected |
| memWriteback() override | gem5::BaseCache | protectedvirtual |
| mergedParent | gem5::statistics::Group | private |
| mergedStatGroups | gem5::statistics::Group | private |
| mergeStatGroup(Group *block) | gem5::statistics::Group | |
| missCount | gem5::BaseCache | protected |
| moveContractions | gem5::BaseCache | protected |
| mshrQueue | gem5::BaseCache | protected |
| MSHRQueue_MSHRs enum value | gem5::BaseCache | protected |
| MSHRQueue_WriteBuffer enum value | gem5::BaseCache | protected |
| MSHRQueueIndex enum name | gem5::BaseCache | protected |
| name() const | gem5::Named | inlinevirtual |
| Named(const std::string &name_) | gem5::Named | inline |
| nextCycle() const | gem5::Clocked | inline |
| nextQueueReadyTime() const | gem5::BaseCache | protected |
| noTargetMSHR | gem5::BaseCache | protected |
| notifyFork() | gem5::Drainable | inlinevirtual |
| NUM_BLOCKED_CAUSES enum value | gem5::BaseCache | |
| numTarget | gem5::BaseCache | protected |
| gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
| gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
| order | gem5::BaseCache | protected |
| outstandingSnoop | gem5::Cache | protected |
| params() const | gem5::SimObject | inline |
| Params typedef | gem5::ClockedObject | |
| path | gem5::Serializable | privatestatic |
| pendingDelete | gem5::BaseCache | protected |
| powerState | gem5::ClockedObject | |
| ppDataUpdate | gem5::BaseCache | protected |
| ppFill | gem5::BaseCache | protected |
| ppHit | gem5::BaseCache | protected |
| ppMiss | gem5::BaseCache | protected |
| preDumpStats() | gem5::statistics::Group | virtual |
| prefetcher | gem5::BaseCache | protected |
| probeManager | gem5::SimObject | private |
| promoteWholeLineWrites(PacketPtr pkt) | gem5::Cache | protected |
| recvAtomic(PacketPtr pkt) override | gem5::Cache | protectedvirtual |
| recvAtomicSnoop(PacketPtr pkt) override | gem5::Cache | protectedvirtual |
| recvTimingReq(PacketPtr pkt) override | gem5::Cache | protectedvirtual |
| recvTimingResp(PacketPtr pkt) | gem5::BaseCache | protectedvirtual |
| recvTimingSnoopReq(PacketPtr pkt) override | gem5::Cache | protectedvirtual |
| recvTimingSnoopResp(PacketPtr pkt) override | gem5::Cache | protectedvirtual |
| regenerateBlkAddr(CacheBlk *blk) | gem5::BaseCache | protected |
| regProbeListeners() | gem5::SimObject | virtual |
| regProbePoints() override | gem5::BaseCache | virtual |
| regStats() | gem5::statistics::Group | virtual |
| replaceExpansions | gem5::BaseCache | protected |
| reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
| resetClock() const | gem5::Clocked | inlineprotected |
| resetStats() | gem5::statistics::Group | virtual |
| resolveStat(std::string name) const | gem5::statistics::Group | |
| responseLatency | gem5::BaseCache | protected |
| satisfyRequest(PacketPtr pkt, CacheBlk *blk, bool deferred_response=false, bool pending_downgrade=false) override | gem5::Cache | protectedvirtual |
| schedMemSideSendEvent(Tick time) | gem5::BaseCache | inline |
| schedule(Event &event, Tick when) | gem5::EventManager | inline |
| schedule(Event *event, Tick when) | gem5::EventManager | inline |
| sendMSHRQueuePacket(MSHR *mshr) override | gem5::Cache | virtual |
| sendWriteQueuePacket(WriteQueueEntry *wq_entry) | gem5::BaseCache | |
| sequentialAccess | gem5::BaseCache | protected |
| Serializable() | gem5::Serializable | |
| serialize(CheckpointOut &cp) const override | gem5::BaseCache | virtual |
| serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
| serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
| serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk) override | gem5::Cache | protectedvirtual |
| setBlocked(BlockedCause cause) | gem5::BaseCache | inline |
| setCurTick(Tick newVal) | gem5::EventManager | inline |
| setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
| signalDrainDone() const | gem5::Drainable | inlineprotected |
| SimObject(const Params &p) | gem5::SimObject | |
| simObjectList | gem5::SimObject | privatestatic |
| SimObjectList typedef | gem5::SimObject | private |
| startup() | gem5::SimObject | virtual |
| statGroups | gem5::statistics::Group | private |
| stats | gem5::BaseCache | |
| system | gem5::BaseCache | |
| tags | gem5::BaseCache | protected |
| tempBlock | gem5::BaseCache | protected |
| tempBlockWriteback | gem5::BaseCache | protected |
| tick | gem5::Clocked | mutableprivate |
| ticksToCycles(Tick t) const | gem5::Clocked | inline |
| unserialize(CheckpointIn &cp) override | gem5::BaseCache | virtual |
| unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
| update() const | gem5::Clocked | inlineprivate |
| updateBlockData(CacheBlk *blk, const PacketPtr cpkt, bool has_old_data) | gem5::BaseCache | protected |
| updateClockPeriod() | gem5::Clocked | inline |
| updateCompressionData(CacheBlk *&blk, const uint64_t *data, PacketList &writebacks) | gem5::BaseCache | protected |
| voltage() const | gem5::Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
| writeAllocator | gem5::BaseCache | protected |
| writebackBlk(CacheBlk *blk) | gem5::BaseCache | protected |
| writebackClean | gem5::BaseCache | protected |
| writebackTempBlockAtomic() | gem5::BaseCache | inlineprotected |
| writebackTempBlockAtomicEvent | gem5::BaseCache | protected |
| writebackVisitor(CacheBlk &blk) | gem5::BaseCache | |
| writeBuffer | gem5::BaseCache | protected |
| writecleanBlk(CacheBlk *blk, Request::Flags dest, PacketId id) | gem5::BaseCache | protected |
| ~BaseCache() | gem5::BaseCache | |
| ~Clocked() | gem5::Clocked | inlineprotectedvirtual |
| ~Drainable() | gem5::Drainable | protectedvirtual |
| ~Group() | gem5::statistics::Group | virtual |
| ~Named()=default | gem5::Named | virtual |
| ~Serializable() | gem5::Serializable | virtual |
| ~SimObject() | gem5::SimObject | virtual |