gem5  v21.1.0.2
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
gem5::Cache Class Reference

A coherent cache that can be arranged in flexible topologies. More...

#include <cache.hh>

Inheritance diagram for gem5::Cache:
gem5::BaseCache gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Member Functions

 Cache (const CacheParams &p)
 Instantiates a basic cache object. More...
 
bool sendMSHRQueuePacket (MSHR *mshr) override
 Take an MSHR, turn it into a suitable downstream packet, and send it out. More...
 
- Public Member Functions inherited from gem5::BaseCache
void regProbePoints () override
 Registers probes. More...
 
 BaseCache (const BaseCacheParams &p, unsigned blk_size)
 
 ~BaseCache ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
unsigned getBlockSize () const
 Query block size of a cache. More...
 
const AddrRangeListgetAddrRanges () const
 
MSHRallocateMissBuffer (PacketPtr pkt, Tick time, bool sched_send=true)
 
void allocateWriteBuffer (PacketPtr pkt, Tick time)
 
bool isBlocked () const
 Returns true if the cache is blocked for accesses. More...
 
void setBlocked (BlockedCause cause)
 Marks the access path of the cache as blocked for the given cause. More...
 
void clearBlocked (BlockedCause cause)
 Marks the cache as unblocked for the given cause. More...
 
void schedMemSideSendEvent (Tick time)
 Schedule a send event for the memory-side port. More...
 
bool inCache (Addr addr, bool is_secure) const
 
bool hasBeenPrefetched (Addr addr, bool is_secure) const
 
bool inMissQueue (Addr addr, bool is_secure) const
 
void incMissCount (PacketPtr pkt)
 
void incHitCount (PacketPtr pkt)
 
bool coalesce () const
 Checks if the cache is coalescing writes. More...
 
void writebackVisitor (CacheBlk &blk)
 Cache block visitor that writes back dirty cache blocks using functional writes. More...
 
void invalidateVisitor (CacheBlk &blk)
 Cache block visitor that invalidates all blocks in the cache. More...
 
bool sendWriteQueuePacket (WriteQueueEntry *wq_entry)
 Similar to sendMSHR, but for a write-queue entry instead. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize the state of the caches. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Protected Member Functions

void promoteWholeLineWrites (PacketPtr pkt)
 Turn line-sized writes into WriteInvalidate transactions. More...
 
bool access (PacketPtr pkt, CacheBlk *&blk, Cycles &lat, PacketList &writebacks) override
 Does all the processing necessary to perform the provided request. More...
 
void handleTimingReqHit (PacketPtr pkt, CacheBlk *blk, Tick request_time) override
 
void handleTimingReqMiss (PacketPtr pkt, CacheBlk *blk, Tick forward_time, Tick request_time) override
 
void recvTimingReq (PacketPtr pkt) override
 Performs the access specified by the request. More...
 
void doWritebacks (PacketList &writebacks, Tick forward_time) override
 Insert writebacks into the write buffer. More...
 
void doWritebacksAtomic (PacketList &writebacks) override
 Send writebacks down the memory hierarchy in atomic mode. More...
 
void serviceMSHRTargets (MSHR *mshr, const PacketPtr pkt, CacheBlk *blk) override
 Service non-deferred MSHR targets using the received response. More...
 
void recvTimingSnoopReq (PacketPtr pkt) override
 Snoops bus transactions to maintain coherence. More...
 
void recvTimingSnoopResp (PacketPtr pkt) override
 Handle a snoop response. More...
 
Cycles handleAtomicReqMiss (PacketPtr pkt, CacheBlk *&blk, PacketList &writebacks) override
 Handle a request in atomic mode that missed in this cache. More...
 
Tick recvAtomic (PacketPtr pkt) override
 Performs the access specified by the request. More...
 
Tick recvAtomicSnoop (PacketPtr pkt) override
 Snoop for the provided request in the cache and return the estimated time taken. More...
 
void satisfyRequest (PacketPtr pkt, CacheBlk *blk, bool deferred_response=false, bool pending_downgrade=false) override
 Perform any necessary updates to the block and perform any data exchange between the packet and the block. More...
 
void doTimingSupplyResponse (PacketPtr req_pkt, const uint8_t *blk_data, bool already_copied, bool pending_inval)
 
uint32_t handleSnoop (PacketPtr pkt, CacheBlk *blk, bool is_timing, bool is_deferred, bool pending_inval)
 Perform an upward snoop if needed, and update the block state (possibly invalidating the block). More...
 
GEM5_NO_DISCARD PacketPtr evictBlock (CacheBlk *blk) override
 Evict a cache block. More...
 
PacketPtr cleanEvictBlk (CacheBlk *blk)
 Create a CleanEvict request for the given block. More...
 
PacketPtr createMissPacket (PacketPtr cpu_pkt, CacheBlk *blk, bool needs_writable, bool is_whole_line_write) const override
 Create an appropriate downstream bus request packet. More...
 
bool isCachedAbove (PacketPtr pkt, bool is_timing=true)
 Send up a snoop request and find cached copies. More...
 
- Protected Member Functions inherited from gem5::BaseCache
void markInService (MSHR *mshr, bool pending_modified_resp)
 Mark a request as in service (sent downstream in the memory system), effectively making this MSHR the ordering point. More...
 
void markInService (WriteQueueEntry *entry)
 
bool allocOnFill (MemCmd cmd) const
 Determine whether we should allocate on a fill or not. More...
 
Addr regenerateBlkAddr (CacheBlk *blk)
 Regenerate block address using tags. More...
 
Cycles calculateTagOnlyLatency (const uint32_t delay, const Cycles lookup_lat) const
 Calculate latency of accesses that only touch the tag array. More...
 
Cycles calculateAccessLatency (const CacheBlk *blk, const uint32_t delay, const Cycles lookup_lat) const
 Calculate access latency in ticks given a tag lookup latency, and whether access was a hit or miss. More...
 
void handleTimingReqMiss (PacketPtr pkt, MSHR *mshr, CacheBlk *blk, Tick forward_time, Tick request_time)
 
void handleUncacheableWriteResp (PacketPtr pkt)
 Handling the special case of uncacheable write responses to make recvTimingResp less cluttered. More...
 
virtual void recvTimingResp (PacketPtr pkt)
 Handles a response (cache line fill/write ack) from the bus. More...
 
virtual void functionalAccess (PacketPtr pkt, bool from_cpu_side)
 Performs the access specified by the request. More...
 
void updateBlockData (CacheBlk *blk, const PacketPtr cpkt, bool has_old_data)
 Update the data contents of a block. More...
 
void cmpAndSwap (CacheBlk *blk, PacketPtr pkt)
 Handle doing the Compare and Swap function for SPARC. More...
 
QueueEntrygetNextQueueEntry ()
 Return the next queue entry to service, either a pending miss from the MSHR queue, a buffered write from the write buffer, or something from the prefetcher. More...
 
void writebackTempBlockAtomic ()
 Send the outstanding tempBlock writeback. More...
 
bool updateCompressionData (CacheBlk *&blk, const uint64_t *data, PacketList &writebacks)
 When a block is overwriten, its compression information must be updated, and it may need to be recompressed. More...
 
void maintainClusivity (bool from_cache, CacheBlk *blk)
 Maintain the clusivity of this cache by potentially invalidating a block. More...
 
bool handleEvictions (std::vector< CacheBlk * > &evict_blks, PacketList &writebacks)
 Try to evict the given blocks. More...
 
CacheBlkhandleFill (PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, bool allocate)
 Handle a fill operation caused by a received packet. More...
 
CacheBlkallocateBlock (const PacketPtr pkt, PacketList &writebacks)
 Allocate a new block and perform any necessary writebacks. More...
 
void evictBlock (CacheBlk *blk, PacketList &writebacks)
 Evict a cache block. More...
 
void invalidateBlock (CacheBlk *blk)
 Invalidate a cache block. More...
 
PacketPtr writebackBlk (CacheBlk *blk)
 Create a writeback request for the given block. More...
 
PacketPtr writecleanBlk (CacheBlk *blk, Request::Flags dest, PacketId id)
 Create a writeclean request for the given block. More...
 
virtual void memWriteback () override
 Write back dirty blocks in the cache using functional accesses. More...
 
virtual void memInvalidate () override
 Invalidates all blocks in the cache. More...
 
bool isDirty () const
 Determine if there are any dirty blocks in the cache. More...
 
bool inRange (Addr addr) const
 Determine if an address is in the ranges covered by this cache. More...
 
Tick nextQueueReadyTime () const
 Find next request ready time from among possible sources. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Protected Attributes

const bool doFastWrites
 This cache should allocate a block on a line-sized write miss. More...
 
std::unordered_set< RequestPtroutstandingSnoop
 Store the outstanding requests that we are expecting snoop responses from so we can determine which snoop responses we generated and which ones were merely forwarded. More...
 
- Protected Attributes inherited from gem5::BaseCache
CpuSidePort cpuSidePort
 
MemSidePort memSidePort
 
MSHRQueue mshrQueue
 Miss status registers. More...
 
WriteQueue writeBuffer
 Write/writeback buffer. More...
 
BaseTagstags
 Tag and data Storage. More...
 
compression::Basecompressor
 Compression method being used. More...
 
prefetch::Baseprefetcher
 Prefetcher. More...
 
ProbePointArg< PacketPtr > * ppHit
 To probe when a cache hit occurs. More...
 
ProbePointArg< PacketPtr > * ppMiss
 To probe when a cache miss occurs. More...
 
ProbePointArg< PacketPtr > * ppFill
 To probe when a cache fill occurs. More...
 
ProbePointArg< DataUpdate > * ppDataUpdate
 To probe when the contents of a block are updated. More...
 
WriteAllocator *const writeAllocator
 The writeAllocator drive optimizations for streaming writes. More...
 
TempCacheBlktempBlock
 Temporary cache block for occasional transitory use. More...
 
std::unique_ptr< PacketpendingDelete
 Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More...
 
const bool writebackClean
 Determine if clean lines should be written back or not. More...
 
PacketPtr tempBlockWriteback
 Writebacks from the tempBlock, resulting on the response path in atomic mode, must happen after the call to recvAtomic has finished (for the right ordering of the packets). More...
 
EventFunctionWrapper writebackTempBlockAtomicEvent
 An event to writeback the tempBlock after recvAtomic finishes. More...
 
const unsigned blkSize
 Block size of this cache. More...
 
const Cycles lookupLatency
 The latency of tag lookup of a cache. More...
 
const Cycles dataLatency
 The latency of data access of a cache. More...
 
const Cycles forwardLatency
 This is the forward latency of the cache. More...
 
const Cycles fillLatency
 The latency to fill a cache block. More...
 
const Cycles responseLatency
 The latency of sending reponse to its upper level cache/core on a linefill. More...
 
const bool sequentialAccess
 Whether tags and data are accessed sequentially. More...
 
const int numTarget
 The number of targets for each MSHR. More...
 
bool forwardSnoops
 Do we forward snoops from mem side port through to cpu side port? More...
 
const enums::Clusivity clusivity
 Clusivity with respect to the upstream cache, determining if we fill into both this cache and the cache above on a miss. More...
 
const bool isReadOnly
 Is this cache read only, for example the instruction cache, or table-walker cache. More...
 
const bool replaceExpansions
 when a data expansion of a compressed block happens it will not be able to co-allocate where it is at anymore. More...
 
const bool moveContractions
 Similar to data expansions, after a block improves its compression, it may need to be moved elsewhere compatible with the new compression factor, or, if not required by the compaction method, it may be moved to co-allocate with an existing block and thus free an entry. More...
 
uint8_t blocked
 Bit vector of the blocking reasons for the access path. More...
 
uint64_t order
 Increasing order number assigned to each incoming request. More...
 
Cycles blockedCycle
 Stores time the cache blocked for statistics. More...
 
MSHRnoTargetMSHR
 Pointer to the MSHR that has no targets. More...
 
Counter missCount
 The number of misses to trigger an exit event. More...
 
const AddrRangeList addrRanges
 The address range to which the cache responds on the CPU side. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Public Types inherited from gem5::BaseCache
enum  BlockedCause { Blocked_NoMSHRs = MSHRQueue_MSHRs, Blocked_NoWBBuffers = MSHRQueue_WriteBuffer, Blocked_NoTargets, NUM_BLOCKED_CAUSES }
 Reasons for caches to be blocked. More...
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::BaseCache
Systemsystem
 System we are currently operating in. More...
 
gem5::BaseCache::CacheStats stats
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 
- Protected Types inherited from gem5::BaseCache
enum  MSHRQueueIndex { MSHRQueue_MSHRs, MSHRQueue_WriteBuffer }
 Indexes to enumerate the MSHR queues. More...
 

Detailed Description

A coherent cache that can be arranged in flexible topologies.

Definition at line 67 of file cache.hh.

Constructor & Destructor Documentation

◆ Cache()

gem5::Cache::Cache ( const CacheParams &  p)

Instantiates a basic cache object.

Definition at line 69 of file cache.cc.

References gem5::MipsISA::p.

Member Function Documentation

◆ access()

bool gem5::Cache::access ( PacketPtr  pkt,
CacheBlk *&  blk,
Cycles lat,
PacketList writebacks 
)
overrideprotectedvirtual

Does all the processing necessary to perform the provided request.

Parameters
pktThe memory request to perform.
blkThe cache block to be updated.
latThe latency of the access.
writebacksList for any writebacks that need to be performed.
Returns
Boolean indicating whether the request was satisfied.

Reimplemented from gem5::BaseCache.

Definition at line 161 of file cache.cc.

References gem5::BaseCache::access(), chatty_assert, DPRINTF, gem5::BaseCache::evictBlock(), gem5::BaseTags::findBlock(), gem5::Packet::getAddr(), gem5::BaseCache::isReadOnly, gem5::Packet::isRequest(), gem5::Packet::isSecure(), gem5::TaggedEntry::isValid(), gem5::Packet::isWrite(), gem5::BaseCache::lookupLatency, gem5::Named::name(), gem5::Packet::print(), gem5::Packet::req, and gem5::BaseCache::tags.

◆ cleanEvictBlk()

PacketPtr gem5::Cache::cleanEvictBlk ( CacheBlk blk)
protected

◆ createMissPacket()

PacketPtr gem5::Cache::createMissPacket ( PacketPtr  cpu_pkt,
CacheBlk blk,
bool  needs_writable,
bool  is_whole_line_write 
) const
overrideprotectedvirtual

Create an appropriate downstream bus request packet.

Creates a new packet with the request to be send to the memory below, or nullptr if the current request in cpu_pkt should just be forwarded on.

Parameters
cpu_pktThe miss packet that needs to be satisfied.
blkThe referenced block, can be nullptr.
needs_writableIndicates that the block must be writable even if the request in cpu_pkt doesn't indicate that.
is_whole_line_writeTrue if there are writes for the whole line
Returns
A packet send to the memory below

Implements gem5::BaseCache.

Definition at line 477 of file cache.cc.

References gem5::Packet::allocate(), gem5::BaseCache::blkSize, gem5::BaseCache::clusivity, gem5::Packet::cmd, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getBlockAddr(), gem5::Packet::hasSharers(), gem5::MemCmd::InvalidateReq, gem5::Packet::isClean(), gem5::Packet::isEviction(), gem5::Packet::isLLSC(), gem5::BaseCache::isReadOnly, gem5::CacheBlk::isSet(), gem5::Packet::isUpgrade(), gem5::TaggedEntry::isValid(), gem5::Packet::needsResponse(), gem5::Packet::print(), gem5::MemCmd::ReadCleanReq, gem5::MemCmd::ReadExReq, gem5::MemCmd::ReadSharedReq, gem5::Packet::req, gem5::MemCmd::SCUpgradeFailReq, gem5::MemCmd::SCUpgradeReq, gem5::Packet::setHasSharers(), gem5::MemCmd::StoreCondFailReq, gem5::MemCmd::UpgradeReq, gem5::CacheBlk::WritableBit, and gem5::MemCmd::WriteLineReq.

Referenced by handleAtomicReqMiss().

◆ doTimingSupplyResponse()

void gem5::Cache::doTimingSupplyResponse ( PacketPtr  req_pkt,
const uint8_t *  blk_data,
bool  already_copied,
bool  pending_inval 
)
protected

◆ doWritebacks()

void gem5::Cache::doWritebacks ( PacketList writebacks,
Tick  forward_time 
)
overrideprotectedvirtual

◆ doWritebacksAtomic()

void gem5::Cache::doWritebacksAtomic ( PacketList writebacks)
overrideprotectedvirtual

Send writebacks down the memory hierarchy in atomic mode.

Implements gem5::BaseCache.

Definition at line 232 of file cache.cc.

References gem5::Packet::cmd, isCachedAbove(), gem5::BaseCache::memSidePort, gem5::RequestPort::sendAtomic(), gem5::MemCmd::WritebackDirty, and gem5::MemCmd::WriteClean.

Referenced by handleSnoop().

◆ evictBlock()

PacketPtr gem5::Cache::evictBlock ( CacheBlk blk)
overrideprotectedvirtual

Evict a cache block.

Performs a writeback if necesssary and invalidates the block

Parameters
blkBlock to invalidate
Returns
A packet with the writeback, can be nullptr

Implements gem5::BaseCache.

Definition at line 900 of file cache.cc.

References cleanEvictBlk(), gem5::CacheBlk::DirtyBit, gem5::BaseCache::invalidateBlock(), gem5::CacheBlk::isSet(), gem5::BaseCache::writebackBlk(), and gem5::BaseCache::writebackClean.

◆ handleAtomicReqMiss()

Cycles gem5::Cache::handleAtomicReqMiss ( PacketPtr  pkt,
CacheBlk *&  blk,
PacketList writebacks 
)
overrideprotectedvirtual

◆ handleSnoop()

uint32_t gem5::Cache::handleSnoop ( PacketPtr  pkt,
CacheBlk blk,
bool  is_timing,
bool  is_deferred,
bool  pending_inval 
)
protected

Perform an upward snoop if needed, and update the block state (possibly invalidating the block).

Also create a response if required.

Parameters
pktSnoop packet
blkCache block being snooped
is_timingTiming or atomic for the response
is_deferredIs this a deferred snoop or not?
pending_invalDo we have a pending invalidation?
Returns
The snoop delay incurred by the upwards snoop

Definition at line 984 of file cache.cc.

References gem5::BaseCache::blkSize, gem5::Packet::cacheResponding(), chatty_assert, gem5::CacheBlk::clearCoherenceBits(), gem5::Clocked::clockEdge(), gem5::BaseCache::compressor, gem5::Packet::copyResponderFlags(), gem5::BaseCache::cpuSidePort, gem5::CacheBlk::data, gem5::CacheBlk::DirtyBit, doTimingSupplyResponse(), doWritebacks(), doWritebacksAtomic(), DPRINTF, gem5::BaseCache::forwardLatency, gem5::BaseCache::forwardSnoops, gem5::Packet::getAddr(), gem5::compression::Base::getDecompressionLatency(), gem5::Packet::hasData(), gem5::Packet::hasSharers(), gem5::Packet::headerDelay, gem5::Packet::id, gem5::BaseCache::invalidateBlock(), gem5::Packet::isBlockCached(), gem5::Packet::isClean(), gem5::Packet::isInvalidate(), gem5::Packet::isRead(), gem5::BaseCache::isReadOnly, gem5::Packet::isRequest(), gem5::Packet::isResponse(), gem5::CacheBlk::isSet(), gem5::TaggedEntry::isValid(), gem5::Packet::makeAtomicResponse(), gem5::Packet::mustCheckAbove(), gem5::Named::name(), gem5::Packet::needsResponse(), gem5::Packet::needsWritable(), panic_if, gem5::Packet::payloadDelay, gem5::CacheBlk::print(), gem5::Packet::print(), gem5::Packet::req, gem5::Packet::satisfied(), gem5::ResponsePort::sendAtomicSnoop(), gem5::ResponsePort::sendTimingSnoopReq(), gem5::Packet::setBlockCached(), gem5::Packet::setCacheResponding(), gem5::Packet::setDataFromBlock(), gem5::Packet::setExpressSnoop(), gem5::Packet::setHasSharers(), gem5::Packet::setResponderHadWritable(), gem5::Packet::setSatisfied(), gem5::CacheBlk::WritableBit, and gem5::BaseCache::writecleanBlk().

Referenced by recvAtomicSnoop(), recvTimingSnoopReq(), and serviceMSHRTargets().

◆ handleTimingReqHit()

void gem5::Cache::handleTimingReqHit ( PacketPtr  pkt,
CacheBlk blk,
Tick  request_time 
)
overrideprotectedvirtual

Reimplemented from gem5::BaseCache.

Definition at line 313 of file cache.cc.

References gem5::BaseCache::handleTimingReqHit(), and gem5::Packet::req.

◆ handleTimingReqMiss()

void gem5::Cache::handleTimingReqMiss ( PacketPtr  pkt,
CacheBlk blk,
Tick  forward_time,
Tick  request_time 
)
overrideprotectedvirtual

◆ isCachedAbove()

bool gem5::Cache::isCachedAbove ( PacketPtr  pkt,
bool  is_timing = true 
)
protected

◆ promoteWholeLineWrites()

void gem5::Cache::promoteWholeLineWrites ( PacketPtr  pkt)
protected

◆ recvAtomic()

Tick gem5::Cache::recvAtomic ( PacketPtr  pkt)
overrideprotectedvirtual

Performs the access specified by the request.

Parameters
pktThe request to perform.
Returns
The number of ticks required for the access.

Reimplemented from gem5::BaseCache.

Definition at line 653 of file cache.cc.

References gem5::Packet::cacheResponding(), DPRINTF, gem5::BaseCache::memSidePort, gem5::Packet::needsWritable(), gem5::Packet::print(), promoteWholeLineWrites(), gem5::BaseCache::recvAtomic(), gem5::Packet::req, gem5::Packet::responderHadWritable(), and gem5::RequestPort::sendAtomic().

◆ recvAtomicSnoop()

Tick gem5::Cache::recvAtomicSnoop ( PacketPtr  pkt)
overrideprotectedvirtual

Snoop for the provided request in the cache and return the estimated time taken.

Parameters
pktThe memory request to snoop
Returns
The number of ticks required for the snoop.

Implements gem5::BaseCache.

Definition at line 1318 of file cache.cc.

References gem5::Clocked::clockPeriod(), gem5::BaseTags::findBlock(), gem5::Packet::getAddr(), handleSnoop(), gem5::BaseCache::inRange(), gem5::Packet::isSecure(), gem5::BaseCache::lookupLatency, and gem5::BaseCache::tags.

◆ recvTimingReq()

void gem5::Cache::recvTimingReq ( PacketPtr  pkt)
overrideprotectedvirtual

◆ recvTimingSnoopReq()

void gem5::Cache::recvTimingSnoopReq ( PacketPtr  pkt)
overrideprotectedvirtual

◆ recvTimingSnoopResp()

void gem5::Cache::recvTimingSnoopResp ( PacketPtr  pkt)
overrideprotectedvirtual

◆ satisfyRequest()

void gem5::Cache::satisfyRequest ( PacketPtr  pkt,
CacheBlk blk,
bool  deferred_response = false,
bool  pending_downgrade = false 
)
overrideprotectedvirtual

Perform any necessary updates to the block and perform any data exchange between the packet and the block.

The flags of the packet are also set accordingly.

Parameters
pktRequest packet from upstream that hit a block
blkCache block that the packet hit
deferred_responseWhether this request originally missed
pending_downgradeWhether the writable flag is to be removed

Reimplemented from gem5::BaseCache.

Definition at line 78 of file cache.cc.

References gem5::BaseCache::blkSize, gem5::CacheBlk::clearCoherenceBits(), gem5::Packet::cmd, gem5::CacheBlk::DirtyBit, gem5::Packet::fromCache(), gem5::Packet::getSize(), gem5::Packet::hasSharers(), gem5::Packet::isRead(), gem5::CacheBlk::isSet(), gem5::Packet::needsWritable(), gem5::MemCmd::ReadCleanReq, gem5::MemCmd::ReadExReq, gem5::BaseCache::satisfyRequest(), gem5::MemCmd::SCUpgradeFailReq, gem5::Packet::setCacheResponding(), gem5::Packet::setHasSharers(), and gem5::CacheBlk::WritableBit.

Referenced by handleAtomicReqMiss(), and serviceMSHRTargets().

◆ sendMSHRQueuePacket()

bool gem5::Cache::sendMSHRQueuePacket ( MSHR mshr)
overridevirtual

◆ serviceMSHRTargets()

void gem5::Cache::serviceMSHRTargets ( MSHR mshr,
const PacketPtr  pkt,
CacheBlk blk 
)
overrideprotectedvirtual

Service non-deferred MSHR targets using the received response.

Iterates through the list of targets that can be serviced with the current response.

Parameters
mshrThe MSHR that corresponds to the reponse
pktThe response packet
blkThe reference block

Implements gem5::BaseCache.

Definition at line 684 of file cache.cc.

References gem5::BaseCache::blkSize, gem5::CacheBlk::clearCoherenceBits(), gem5::Clocked::clockEdge(), gem5::Packet::cmd, gem5::BaseCache::CacheStats::cmdStats(), gem5::Packet::copyError(), gem5::Packet::copyResponderFlags(), gem5::BaseCache::cpuSidePort, gem5::CacheBlk::DirtyBit, DPRINTF, gem5::MSHR::extractServiceableTargets(), gem5::MSHR::Target::FromCPU, gem5::MSHR::Target::FromPrefetcher, gem5::MSHR::Target::FromSnoop, gem5::Packet::getConstPtr(), gem5::Packet::getOffset(), gem5::Packet::getSize(), gem5::MSHR::getTarget(), handleSnoop(), gem5::MemCmd::HardPFReq, gem5::Packet::hasData(), gem5::MSHR::hasPostDowngrade(), gem5::MSHR::hasPostInvalidate(), gem5::Packet::hasRespData(), gem5::Packet::headerDelay, gem5::BaseCache::invalidateBlock(), gem5::MemCmd::InvalidateResp, gem5::Packet::isError(), gem5::MSHR::isForward, gem5::Packet::isInvalidate(), gem5::Packet::isRead(), gem5::BaseCache::isReadOnly, gem5::CacheBlk::isSet(), gem5::MemCmd::isSWPrefetch(), gem5::TaggedEntry::isValid(), gem5::BaseCache::maintainClusivity(), gem5::Packet::makeTimingResponse(), gem5::Packet::matchAddr(), gem5::System::maxRequestors(), gem5::BaseCache::CacheCmdStats::missLatency, gem5::Named::name(), gem5::Packet::needsWritable(), panic, panic_if, gem5::Packet::payloadDelay, gem5::QueueEntry::Target::pkt, gem5::Packet::print(), gem5::MemCmd::ReadResp, gem5::MemCmd::ReadRespWithInvalidate, gem5::Packet::req, gem5::BaseCache::responseLatency, satisfyRequest(), gem5::QueuedResponsePort::schedTimingResp(), gem5::MemCmd::SCUpgradeFailReq, gem5::CacheBlk::setCoherenceBits(), gem5::Packet::setData(), gem5::CacheBlk::setPrefetched(), gem5::BaseCache::stats, gem5::MemCmd::StoreCondFailReq, gem5::MemCmd::StoreCondReq, gem5::BaseCache::system, gem5::MemCmd::UpgradeFailResp, gem5::MSHR::wasWholeLineWrite, gem5::CacheBlk::WritableBit, and gem5::MemCmd::WriteLineReq.

Member Data Documentation

◆ doFastWrites

const bool gem5::Cache::doFastWrites
protected

This cache should allocate a block on a line-sized write miss.

Definition at line 73 of file cache.hh.

Referenced by promoteWholeLineWrites().

◆ outstandingSnoop

std::unordered_set<RequestPtr> gem5::Cache::outstandingSnoop
protected

Store the outstanding requests that we are expecting snoop responses from so we can determine which snoop responses we generated and which ones were merely forwarded.

Definition at line 80 of file cache.hh.

Referenced by recvTimingSnoopResp(), and sendMSHRQueuePacket().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:21 for gem5 by doxygen 1.8.17