gem5  v22.1.0.0
gem5::GenericRiscvPciHost Member List

This is the complete list of members for gem5::GenericRiscvPciHost, including all inherited members.

_drainManagergem5::Drainableprivate
_drainStategem5::Drainablemutableprivate
_namegem5::Namedprivate
_objNameResolvergem5::SimObjectprivatestatic
_paramsgem5::SimObjectprotected
addStat(statistics::Info *info)gem5::statistics::Group
addStatGroup(const char *name, Group *block)gem5::statistics::Group
clearInt(const PciBusAddr &addr, PciIntPin pin) overridegem5::GenericPciHostprotectedvirtual
clockDomaingem5::Clockedprivate
Clocked(ClockDomain &clk_domain)gem5::Clockedinlineprotected
Clocked(Clocked &)=deletegem5::Clockedprotected
clockEdge(Cycles cycles=Cycles(0)) constgem5::Clockedinline
ClockedObject(const ClockedObjectParams &p)gem5::ClockedObject
clockPeriod() constgem5::Clockedinline
clockPeriodUpdated()gem5::Clockedinlineprotectedvirtual
confBasegem5::GenericPciHostprotected
confDeviceBitsgem5::GenericPciHostprotected
confSizegem5::GenericPciHostprotected
curCycle() constgem5::Clockedinline
currentSection()gem5::Serializablestatic
cyclegem5::Clockedmutableprivate
cyclesToTicks(Cycles c) constgem5::Clockedinline
decodeAddress(Addr address)gem5::GenericPciHostprotectedvirtual
deschedule(Event &event)gem5::EventManagerinline
deschedule(Event *event)gem5::EventManagerinline
devicesgem5::PciHostprivate
dmaAddr(const PciBusAddr &bus_addr, Addr pci_addr) const overridegem5::GenericPciHostinlineprotectedvirtual
dmDrain()gem5::Drainableprivate
dmDrainResume()gem5::Drainableprivate
drain() overridegem5::SimObjectinlinevirtual
Drainable()gem5::Drainableprotected
drainResume()gem5::Drainableinlineprotectedvirtual
drainState() constgem5::Drainableinline
EventManager(EventManager &em)gem5::EventManagerinline
EventManager(EventManager *em)gem5::EventManagerinline
EventManager(EventQueue *eq)gem5::EventManagerinline
eventqgem5::EventManagerprotected
eventQueue() constgem5::EventManagerinline
find(const char *name)gem5::SimObjectstatic
frequency() constgem5::Clockedinline
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream)gem5::Serializablestatic
GenericPciHost(const GenericPciHostParams &p)gem5::GenericPciHost
GenericRiscvPciHost(const GenericRiscvPciHostParams &p)gem5::GenericRiscvPciHost
getAddrRanges() const overridegem5::GenericPciHostvirtual
getDevice(const PciBusAddr &addr)gem5::PciHostprotected
getDevice(const PciBusAddr &addr) constgem5::PciHostprotected
getPort(const std::string &if_name, PortID idx=InvalidPortID) overridegem5::PioDevicevirtual
getProbeManager()gem5::SimObject
getSimObjectResolver()gem5::SimObjectstatic
getStatGroups() constgem5::statistics::Group
getStats() constgem5::statistics::Group
Group()=deletegem5::statistics::Group
Group(const Group &)=deletegem5::statistics::Group
Group(Group *parent, const char *name=nullptr)gem5::statistics::Group
init() overridegem5::PioDevicevirtual
initState()gem5::SimObjectvirtual
intBasegem5::GenericRiscvPciHostprivate
intCountgem5::GenericRiscvPciHostprivate
loadState(CheckpointIn &cp)gem5::SimObjectvirtual
mapPciInterrupt(const PciBusAddr &addr, PciIntPin pin) const overridegem5::GenericRiscvPciHostprotectedvirtual
memAddr(const PciBusAddr &bus_addr, Addr pci_addr) const overridegem5::GenericPciHostinlineprotectedvirtual
memInvalidate()gem5::SimObjectinlinevirtual
memWriteback()gem5::SimObjectinlinevirtual
mergedParentgem5::statistics::Groupprivate
mergedStatGroupsgem5::statistics::Groupprivate
mergeStatGroup(Group *block)gem5::statistics::Group
name() constgem5::Namedinlinevirtual
Named(const std::string &name_)gem5::Namedinline
nextCycle() constgem5::Clockedinline
notifyFork()gem5::Drainableinlinevirtual
gem5::operator=(const Group &)=deletegem5::statistics::Group
gem5::Clocked::operator=(Clocked &)=deletegem5::Clockedprotected
params() constgem5::SimObjectinline
Params typedefgem5::PioDevice
PARAMS(GenericRiscvPciHost)gem5::GenericRiscvPciHost
pathgem5::Serializableprivatestatic
pciDmaBasegem5::GenericPciHostprotected
PciHost(const PciHostParams &p)gem5::PciHost
pciMemBasegem5::GenericPciHostprotected
pciPioBasegem5::GenericPciHostprotected
pioAddr(const PciBusAddr &bus_addr, Addr pci_addr) const overridegem5::GenericPciHostinlineprotectedvirtual
PioDevice(const Params &p)gem5::PioDevice
pioPortgem5::PioDeviceprotected
platformgem5::GenericPciHostprotected
postInt(const PciBusAddr &addr, PciIntPin pin) overridegem5::GenericPciHostprotectedvirtual
powerStategem5::ClockedObject
preDumpStats()gem5::statistics::Groupvirtual
probeManagergem5::SimObjectprivate
read(PacketPtr pkt) overridegem5::GenericPciHostvirtual
registerDevice(PciDevice *device, PciBusAddr bus_addr, PciIntPin pin)gem5::PciHostvirtual
regProbeListeners()gem5::SimObjectvirtual
regProbePoints()gem5::SimObjectvirtual
regStats()gem5::statistics::Groupvirtual
reschedule(Event &event, Tick when, bool always=false)gem5::EventManagerinline
reschedule(Event *event, Tick when, bool always=false)gem5::EventManagerinline
resetClock() constgem5::Clockedinlineprotected
resetStats()gem5::statistics::Groupvirtual
resolveStat(std::string name) constgem5::statistics::Group
schedule(Event &event, Tick when)gem5::EventManagerinline
schedule(Event *event, Tick when)gem5::EventManagerinline
Serializable()gem5::Serializable
serialize(CheckpointOut &cp) const overridegem5::ClockedObjectvirtual
serializeAll(const std::string &cpt_dir)gem5::SimObjectstatic
serializeSection(CheckpointOut &cp, const char *name) constgem5::Serializable
serializeSection(CheckpointOut &cp, const std::string &name) constgem5::Serializableinline
setCurTick(Tick newVal)gem5::EventManagerinline
setSimObjectResolver(SimObjectResolver *resolver)gem5::SimObjectstatic
signalDrainDone() constgem5::Drainableinlineprotected
SimObject(const Params &p)gem5::SimObject
simObjectListgem5::SimObjectprivatestatic
SimObjectList typedefgem5::SimObjectprivate
startup()gem5::SimObjectvirtual
statGroupsgem5::statistics::Groupprivate
statsgem5::statistics::Groupprivate
sysgem5::PioDeviceprotected
tickgem5::Clockedmutableprivate
ticksToCycles(Tick t) constgem5::Clockedinline
unserialize(CheckpointIn &cp) overridegem5::ClockedObjectvirtual
unserializeSection(CheckpointIn &cp, const char *name)gem5::Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)gem5::Serializableinline
update() constgem5::Clockedinlineprivate
updateClockPeriod()gem5::Clockedinline
voltage() constgem5::Clockedinline
wakeupEventQueue(Tick when=(Tick) -1)gem5::EventManagerinline
write(PacketPtr pkt) overridegem5::GenericPciHostvirtual
~Clocked()gem5::Clockedinlineprotectedvirtual
~Drainable()gem5::Drainableprotectedvirtual
~GenericPciHost()gem5::GenericPciHostvirtual
~Group()gem5::statistics::Groupvirtual
~Named()=defaultgem5::Namedvirtual
~PciHost()gem5::PciHostvirtual
~PioDevice()gem5::PioDevicevirtual
~Serializable()gem5::Serializablevirtual
~SimObject()gem5::SimObjectvirtual

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