gem5  v21.1.0.2
gem5::X86KvmCPU Member List

This is the complete list of members for gem5::X86KvmCPU, including all inherited members.

_cacheLineSizegem5::BaseCPUprotected
_cpuIdgem5::BaseCPUprotected
_dataRequestorIdgem5::BaseCPUprotected
_drainManagergem5::Drainableprivate
_drainStategem5::Drainablemutableprivate
_instRequestorIdgem5::BaseCPUprotected
_kvmRungem5::BaseKvmCPUprivate
_namegem5::Namedprivate
_objNameResolvergem5::SimObjectprivatestatic
_paramsgem5::SimObjectprotected
_pidgem5::BaseCPUprotected
_socketIdgem5::BaseCPUprotected
_statusgem5::BaseKvmCPUprotected
_switchedOutgem5::BaseCPUprotected
_taskIdgem5::BaseCPUprotected
activateContext(ThreadID thread_num) overridegem5::BaseKvmCPUvirtual
activeInstPeriodgem5::BaseKvmCPUprivate
addressMonitorgem5::BaseCPUprivate
addStat(statistics::Info *info)gem5::statistics::Group
addStatGroup(const char *name, Group *block)gem5::statistics::Group
alwaysSyncTCgem5::BaseKvmCPUprotected
archIsDrained() const overridegem5::X86KvmCPUprotectedvirtual
armMonitor(ThreadID tid, Addr address)gem5::BaseCPU
BaseCPU(const Params &params, bool is_checker=false)gem5::BaseCPU
BaseKvmCPU(const BaseKvmCPUParams &params)gem5::BaseKvmCPU
baseStatsgem5::BaseCPU
cachedMsrIntersectiongem5::X86KvmCPUmutableprivate
cacheLineSize() constgem5::BaseCPUinline
checkInterrupts(ThreadID tid) constgem5::BaseCPUinline
clearInterrupt(ThreadID tid, int int_num, int index)gem5::BaseCPUinline
clearInterrupts(ThreadID tid)gem5::BaseCPUinline
clockDomaingem5::Clockedprivate
Clocked(ClockDomain &clk_domain)gem5::Clockedinlineprotected
Clocked(Clocked &)=deletegem5::Clockedprotected
clockEdge(Cycles cycles=Cycles(0)) constgem5::Clockedinline
ClockedObject(const ClockedObjectParams &p)gem5::ClockedObject
clockPeriod() constgem5::Clockedinline
clockPeriodUpdated()gem5::Clockedinlineprotectedvirtual
contextToThread(ContextID cid)gem5::BaseCPUinline
CPU_STATE_ON enum valuegem5::BaseCPUprotected
CPU_STATE_SLEEP enum valuegem5::BaseCPUprotected
CPU_STATE_WAKEUP enum valuegem5::BaseCPUprotected
cpuId() constgem5::BaseCPUinline
cpuListgem5::BaseCPUprivatestatic
CPUState enum namegem5::BaseCPUprotected
ctrInstsgem5::BaseKvmCPU
curCycle() constgem5::Clockedinline
currentFunctionEndgem5::BaseCPUprivate
currentFunctionStartgem5::BaseCPUprivate
currentSection()gem5::Serializablestatic
cyclegem5::Clockedmutableprivate
cyclesToTicks(Cycles c) constgem5::Clockedinline
dataPortgem5::BaseKvmCPUprotected
dataRequestorId() constgem5::BaseCPUinline
deallocateContext(ThreadID thread_num)gem5::BaseKvmCPU
deliverInterrupts()gem5::X86KvmCPUprotected
deschedule(Event &event)gem5::EventManagerinline
deschedule(Event *event)gem5::EventManagerinline
deschedulePowerGatingEvent()gem5::BaseCPU
deviceEventQueue()gem5::BaseKvmCPUinlineprotected
discardPendingSignal(int signum) constgem5::BaseKvmCPUprivate
dmDrain()gem5::Drainableprivate
dmDrainResume()gem5::Drainableprivate
doMMIOAccess(Addr paddr, void *data, int size, bool write)gem5::BaseKvmCPUprotected
drain() overridegem5::BaseKvmCPUvirtual
Drainable()gem5::Drainableprotected
drainResume() overridegem5::BaseKvmCPUvirtual
drainState() constgem5::Drainableinline
dump() const overridegem5::X86KvmCPUvirtual
dumpDebugRegs() constgem5::X86KvmCPU
dumpFpuRegs() constgem5::X86KvmCPU
dumpIntRegs() constgem5::X86KvmCPU
dumpMSRs() constgem5::X86KvmCPU
dumpSpecRegs() constgem5::X86KvmCPU
dumpVCpuEvents() constgem5::X86KvmCPU
dumpXCRs() constgem5::X86KvmCPU
dumpXSave() constgem5::X86KvmCPU
enableFunctionTrace()gem5::BaseCPUprivate
enterPwrGating()gem5::BaseCPUprotected
enterPwrGatingEventgem5::BaseCPUprotected
EventManager(EventManager &em)gem5::EventManagerinline
EventManager(EventManager *em)gem5::EventManagerinline
EventManager(EventQueue *eq)gem5::EventManagerinline
eventqgem5::EventManagerprotected
eventQueue() constgem5::EventManagerinline
find(const char *name)gem5::SimObjectstatic
findContext(ThreadContext *tc)gem5::BaseCPU
finishMMIOPending()gem5::BaseKvmCPU
flushCoalescedMMIO()gem5::BaseKvmCPUprivate
flushTLBs()gem5::BaseCPU
frequency() constgem5::Clockedinline
functionEntryTickgem5::BaseCPUprivate
functionTraceStreamgem5::BaseCPUprivate
functionTracingEnabledgem5::BaseCPUprivate
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream)gem5::Serializablestatic
getAndFormatOneReg(uint64_t id) constgem5::BaseKvmCPUprotected
getContext(int tn) overridegem5::BaseKvmCPUvirtual
getCpuAddrMonitor(ThreadID tid)gem5::BaseCPUinline
getCurrentInstCount(ThreadID tid)gem5::BaseCPU
getDataPort() overridegem5::BaseKvmCPUinlinevirtual
getDebugRegisters(struct kvm_debugregs &regs) constgem5::X86KvmCPUprotected
getFPUState(struct kvm_fpu &state) constgem5::BaseKvmCPUprotected
getGuestData(uint64_t offset) constgem5::BaseKvmCPUinlineprotected
getHostCycles() const overridegem5::X86KvmCPUprotectedvirtual
getInstPort() overridegem5::BaseKvmCPUinlinevirtual
getInterruptController(ThreadID tid)gem5::BaseCPUinline
getKvmRunState()gem5::BaseKvmCPUinlineprotected
getMSR(uint32_t index) constgem5::X86KvmCPUprotected
getMsrIntersection() constgem5::X86KvmCPUprotected
getMSRs(struct kvm_msrs &msrs) constgem5::X86KvmCPUprotected
getOneReg(uint64_t id, void *addr) constgem5::BaseKvmCPUprotected
getOneRegU32(uint64_t id) constgem5::BaseKvmCPUinlineprotected
getOneRegU64(uint64_t id) constgem5::BaseKvmCPUinlineprotected
getPid() constgem5::BaseCPUinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overridegem5::BaseCPUvirtual
getProbeManager()gem5::SimObject
getRegisters(struct kvm_regs &regs) constgem5::BaseKvmCPUprotected
getSimObjectResolver()gem5::SimObjectstatic
getSpecialRegisters(struct kvm_sregs &regs) constgem5::BaseKvmCPUprotected
getStatGroups() constgem5::statistics::Group
getStats() constgem5::statistics::Group
getTracer()gem5::BaseCPUinline
getVCpuEvents(struct kvm_vcpu_events &events) constgem5::X86KvmCPUprotected
getVCpuID() constgem5::BaseKvmCPUinline
getXCRs(struct kvm_xcrs &regs) constgem5::X86KvmCPUprotected
getXSave(struct kvm_xsave &xsave) constgem5::X86KvmCPUprotected
globalStatsgem5::BaseCPUprotectedstatic
Group()=deletegem5::statistics::Group
Group(const Group &)=deletegem5::statistics::Group
Group(Group *parent, const char *name=nullptr)gem5::statistics::Group
haltContext(ThreadID thread_num) overridegem5::BaseKvmCPUvirtual
handleIOMiscReg32(int miscreg)gem5::X86KvmCPUprivate
handleKvmExit()gem5::BaseKvmCPUprotectedvirtual
handleKvmExitException()gem5::BaseKvmCPUprotectedvirtual
handleKvmExitFailEntry()gem5::BaseKvmCPUprotectedvirtual
handleKvmExitHypercall()gem5::BaseKvmCPUprotectedvirtual
handleKvmExitIO() overridegem5::X86KvmCPUprotectedvirtual
handleKvmExitIRQWindowOpen() overridegem5::X86KvmCPUprotectedvirtual
handleKvmExitUnknown()gem5::BaseKvmCPUprotectedvirtual
haveDebugRegsgem5::X86KvmCPUprivate
haveXCRsgem5::X86KvmCPUprivate
haveXSavegem5::X86KvmCPUprivate
hostFactorgem5::BaseKvmCPUprivate
hwCyclesgem5::BaseKvmCPUprivate
hwInstructionsgem5::BaseKvmCPUprivate
Idle enum valuegem5::BaseKvmCPUprotected
init() overridegem5::BaseKvmCPUvirtual
initState()gem5::SimObjectvirtual
instCntgem5::BaseCPUprotected
instCount()gem5::BaseCPUinline
instPortgem5::BaseKvmCPUprotected
instRequestorId() constgem5::BaseCPUinline
interruptsgem5::BaseCPUprotected
invldPidgem5::BaseCPUstatic
ioctl(int request, long p1) constgem5::BaseKvmCPUprotected
ioctl(int request, void *p1) constgem5::BaseKvmCPUinlineprotected
ioctl(int request) constgem5::BaseKvmCPUinlineprotected
ioctlRun() overridegem5::X86KvmCPUprotectedvirtual
kick() constgem5::BaseKvmCPUinline
kvmInterrupt(const struct kvm_interrupt &interrupt)gem5::BaseKvmCPUprotected
KvmMSRVector typedefgem5::X86KvmCPUprotected
kvmNonMaskableInterrupt()gem5::BaseKvmCPUprotected
kvmRun(Tick ticks) overridegem5::X86KvmCPUprotectedvirtual
kvmRunDrain() overridegem5::X86KvmCPUprotectedvirtual
kvmStateDirtygem5::BaseKvmCPUprotected
loadState(CheckpointIn &cp)gem5::SimObjectvirtual
memInvalidate()gem5::SimObjectinlinevirtual
memWriteback()gem5::SimObjectinlinevirtual
mergedParentgem5::statistics::Groupprivate
mergedStatGroupsgem5::statistics::Groupprivate
mergeStatGroup(Group *block)gem5::statistics::Group
mmioRinggem5::BaseKvmCPUprivate
mwait(ThreadID tid, PacketPtr pkt)gem5::BaseCPU
mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseMMU *mmu)gem5::BaseCPU
name() constgem5::Namedinlinevirtual
Named(const std::string &name_)gem5::Namedinline
nextCycle() constgem5::Clockedinline
notifyFork() overridegem5::BaseKvmCPUvirtual
numContexts()gem5::BaseCPUinline
numSimulatedCPUs()gem5::BaseCPUinlinestatic
numSimulatedInsts()gem5::BaseCPUinlinestatic
numSimulatedOps()gem5::BaseCPUinlinestatic
numThreadsgem5::BaseCPU
gem5::operator=(const Group &)=deletegem5::statistics::Group
gem5::Clocked::operator=(Clocked &)=deletegem5::Clockedprotected
pageSizegem5::BaseKvmCPUprivate
PARAMS(BaseCPU)gem5::BaseCPU
Params typedefgem5::ClockedObject
params() constgem5::SimObjectinline
pathgem5::Serializableprivatestatic
perfControlledByTimergem5::BaseKvmCPUprivate
pmuProbePoint(const char *name)gem5::BaseCPUprotected
postInterrupt(ThreadID tid, int int_num, int index)gem5::BaseCPU
powerGatingOnIdlegem5::BaseCPUprotected
powerStategem5::ClockedObject
ppActiveCyclesgem5::BaseCPUprotected
ppAllCyclesgem5::BaseCPUprotected
ppRetiredBranchesgem5::BaseCPUprotected
ppRetiredInstsgem5::BaseCPUprotected
ppRetiredInstsPCgem5::BaseCPUprotected
ppRetiredLoadsgem5::BaseCPUprotected
ppRetiredStoresgem5::BaseCPUprotected
ppSleepinggem5::BaseCPUprotected
preDumpStats()gem5::statistics::Groupvirtual
previousCyclegem5::BaseCPUprotected
previousStategem5::BaseCPUprotected
probeInstCommit(const StaticInstPtr &inst, Addr pc)gem5::BaseCPUvirtual
probeManagergem5::SimObjectprivate
pwrGatingLatencygem5::BaseCPUprotected
registerThreadContexts()gem5::BaseCPU
regProbeListeners()gem5::SimObjectvirtual
regProbePoints() overridegem5::BaseCPUvirtual
regStats() overridegem5::BaseCPUvirtual
reschedule(Event &event, Tick when, bool always=false)gem5::EventManagerinline
reschedule(Event *event, Tick when, bool always=false)gem5::EventManagerinline
resetClock() constgem5::Clockedinlineprotected
resetStats()gem5::statistics::Groupvirtual
resolveStat(std::string name) constgem5::statistics::Group
Running enum valuegem5::BaseKvmCPUprotected
RunningMMIOPending enum valuegem5::BaseKvmCPUprotected
RunningService enum valuegem5::BaseKvmCPUprotected
RunningServiceCompletion enum valuegem5::BaseKvmCPUprotected
runTimergem5::BaseKvmCPUprivate
schedule(Event &event, Tick when)gem5::EventManagerinline
schedule(Event *event, Tick when)gem5::EventManagerinline
scheduleInstStop(ThreadID tid, Counter insts, const char *cause)gem5::BaseCPU
schedulePowerGatingEvent()gem5::BaseCPU
Serializable()gem5::Serializable
serialize(CheckpointOut &cp) const overridegem5::BaseCPUvirtual
serializeAll(const std::string &cpt_dir)gem5::SimObjectstatic
serializeSection(CheckpointOut &cp, const char *name) constgem5::Serializable
serializeSection(CheckpointOut &cp, const std::string &name) constgem5::Serializableinline
serializeThread(CheckpointOut &cp, ThreadID tid) const overridegem5::BaseKvmCPUvirtual
setCPUID(const struct kvm_cpuid2 &cpuid)gem5::X86KvmCPUprotected
setCPUID(const Kvm::CPUIDVector &cpuid)gem5::X86KvmCPUprotected
setCurTick(Tick newVal)gem5::EventManagerinline
setDebugRegisters(const struct kvm_debugregs &regs)gem5::X86KvmCPUprotected
setFPUState(const struct kvm_fpu &state)gem5::BaseKvmCPUprotected
setMSR(uint32_t index, uint64_t value)gem5::X86KvmCPUprotected
setMSRs(const struct kvm_msrs &msrs)gem5::X86KvmCPUprotected
setMSRs(const KvmMSRVector &msrs)gem5::X86KvmCPUprotected
setOneReg(uint64_t id, const void *addr)gem5::BaseKvmCPUprotected
setOneReg(uint64_t id, uint64_t value)gem5::BaseKvmCPUinlineprotected
setOneReg(uint64_t id, uint32_t value)gem5::BaseKvmCPUinlineprotected
setPid(uint32_t pid)gem5::BaseCPUinline
setRegisters(const struct kvm_regs &regs)gem5::BaseKvmCPUprotected
setSignalMask(const sigset_t *mask)gem5::BaseKvmCPUprotected
setSimObjectResolver(SimObjectResolver *resolver)gem5::SimObjectstatic
setSpecialRegisters(const struct kvm_sregs &regs)gem5::BaseKvmCPUprotected
setupCounters()gem5::BaseKvmCPUprivate
setupInstCounter(uint64_t period=0)gem5::BaseKvmCPUprivate
setupInstStop()gem5::BaseKvmCPUprivate
setupSignalHandler()gem5::BaseKvmCPUprivate
setVCpuEvents(const struct kvm_vcpu_events &events)gem5::X86KvmCPUprotected
setXCRs(const struct kvm_xcrs &regs)gem5::X86KvmCPUprotected
setXSave(const struct kvm_xsave &xsave)gem5::X86KvmCPUprotected
signalDrainDone() constgem5::Drainableinlineprotected
SimObject(const Params &p)gem5::SimObject
simObjectListgem5::SimObjectprivatestatic
SimObjectList typedefgem5::SimObjectprivate
socketId() constgem5::BaseCPUinline
startup() overridegem5::X86KvmCPUvirtual
startupThread()gem5::BaseKvmCPUprivate
statGroupsgem5::statistics::Groupprivate
statsgem5::BaseKvmCPU
Status enum namegem5::BaseKvmCPUprotected
suspendContext(ThreadID thread_num) overridegem5::BaseKvmCPUvirtual
switchedOut() constgem5::BaseCPUinline
switchOut() overridegem5::BaseKvmCPUvirtual
syncKvmState()gem5::BaseKvmCPUprotected
syncThreadContext()gem5::BaseKvmCPUprotected
syscallRetryLatencygem5::BaseCPU
systemgem5::BaseCPU
takeOverFrom(BaseCPU *cpu) overridegem5::BaseKvmCPUvirtual
taskId() constgem5::BaseCPUinline
taskId(uint32_t id)gem5::BaseCPUinline
tcgem5::BaseKvmCPU
threadgem5::BaseKvmCPU
threadContextDirtygem5::BaseKvmCPUprotected
threadContextsgem5::BaseCPUprotected
tick()gem5::BaseKvmCPUprotected
tickEventgem5::BaseKvmCPUprivate
ticksToCycles(Tick t) constgem5::Clockedinline
totalInsts() const overridegem5::BaseKvmCPUvirtual
totalOps() const overridegem5::BaseKvmCPUvirtual
traceFunctions(Addr pc)gem5::BaseCPUinline
traceFunctionsInternal(Addr pc)gem5::BaseCPUprivate
tracergem5::BaseCPUprotected
tryDrain()gem5::BaseKvmCPUprivate
unserialize(CheckpointIn &cp) overridegem5::BaseCPUvirtual
unserializeSection(CheckpointIn &cp, const char *name)gem5::Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)gem5::Serializableinline
unserializeThread(CheckpointIn &cp, ThreadID tid) overridegem5::BaseKvmCPUvirtual
update() constgem5::Clockedinlineprivate
updateClockPeriod()gem5::Clockedinline
updateCPUID()gem5::X86KvmCPUprivate
updateCycleCounters(CPUState state)gem5::BaseCPUinlineprotected
updateKvmState() overridegem5::X86KvmCPUprotectedvirtual
updateKvmStateFPU()gem5::X86KvmCPUprivate
updateKvmStateFPULegacy()gem5::X86KvmCPUprivate
updateKvmStateFPUXSave()gem5::X86KvmCPUprivate
updateKvmStateMSRs()gem5::X86KvmCPUprivate
updateKvmStateRegs()gem5::X86KvmCPUprivate
updateKvmStateSRegs()gem5::X86KvmCPUprivate
updateThreadContext() overridegem5::X86KvmCPUprotectedvirtual
updateThreadContextFPU(const struct kvm_fpu &fpu)gem5::X86KvmCPUprivate
updateThreadContextMSRs()gem5::X86KvmCPUprivate
updateThreadContextRegs(const struct kvm_regs &regs, const struct kvm_sregs &sregs)gem5::X86KvmCPUprivate
updateThreadContextSRegs(const struct kvm_sregs &sregs)gem5::X86KvmCPUprivate
updateThreadContextXSave(const struct kvm_xsave &kxsave)gem5::X86KvmCPUprivate
useXSavegem5::X86KvmCPUprivate
vcpuFDgem5::BaseKvmCPUprivate
vcpuIDgem5::BaseKvmCPUprotected
vcpuMMapSizegem5::BaseKvmCPUprivate
vcpuThreadgem5::BaseKvmCPUprotected
verifyMemoryMode() const overridegem5::BaseKvmCPUvirtual
vmgem5::BaseKvmCPU
voltage() constgem5::Clockedinline
wakeup(ThreadID tid=0) overridegem5::BaseKvmCPUvirtual
wakeupEventQueue(Tick when=(Tick) -1)gem5::EventManagerinline
workItemBegin()gem5::BaseCPUinline
workItemEnd()gem5::BaseCPUinline
X86KvmCPU(const X86KvmCPUParams &params)gem5::X86KvmCPU
~BaseCPU()gem5::BaseCPUvirtual
~BaseKvmCPU()gem5::BaseKvmCPUvirtual
~Clocked()gem5::Clockedinlineprotectedvirtual
~Drainable()gem5::Drainableprotectedvirtual
~Group()gem5::statistics::Groupvirtual
~Named()=defaultgem5::Namedvirtual
~Serializable()gem5::Serializablevirtual
~SimObject()gem5::SimObjectvirtual
~X86KvmCPU()gem5::X86KvmCPUvirtual

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