x86 implementation of a KVM-based hardware virtualized CPU. More...

#include <x86_cpu.hh>

Inheritance diagram for gem5::X86KvmCPU:

Public Member Functions
	X86KvmCPU (const X86KvmCPUParams &params)

virtual	~X86KvmCPU ()

void	startup () override
	startup() is the final initialization call before simulation.

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.


void	dump () const override
	Dump the internal state to the terminal.

void	dumpFpuRegs () const

void	dumpIntRegs () const

void	dumpSpecRegs () const

void	dumpDebugRegs () const

void	dumpXCRs () const

void	dumpXSave () const

void	dumpVCpuEvents () const

void	dumpMSRs () const

Public Member Functions inherited from gem5::BaseKvmCPU
	BaseKvmCPU (const BaseKvmCPUParams &params)

virtual	~BaseKvmCPU ()

void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
	Serialize a single thread.

void	unserializeThread (CheckpointIn &cp, ThreadID tid) override
	Unserialize one thread.

DrainState	drain () override
	Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight.

void	drainResume () override
	Resume execution after a successful drain.

void	notifyFork () override
	Notify a child process of a fork.

void	switchOut () override
	Prepare for another CPU to take over execution.

void	takeOverFrom (BaseCPU *cpu) override
	Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.

void	verifyMemoryMode () const override
	Verify that the system is in a memory mode supported by the CPU.

Port &	getDataPort () override
	Purely virtual method that returns a reference to the data port.

Port &	getInstPort () override
	Purely virtual method that returns a reference to the instruction port.

void	wakeup (ThreadID tid=0) override

void	activateContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now active.

void	suspendContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now suspended.

void	deallocateContext (ThreadID thread_num)

void	haltContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now halted.

long	getVCpuID () const

ThreadContext *	getContext (int tn) override
	Given a thread num get tho thread context for it.

Counter	totalInsts () const override

Counter	totalOps () const override

void	finishMMIOPending ()
	Callback from KvmCPUPort to transition the CPU out of RunningMMIOPending when all timing requests have completed.

void	kick () const
	Force an exit from KVM.

Public Member Functions inherited from gem5::BaseCPU
int	cpuId () const
	Reads this CPU's ID.

uint32_t	socketId () const
	Reads this CPU's Socket ID.

RequestorID	dataRequestorId () const
	Reads this CPU's unique data requestor ID.

RequestorID	instRequestorId () const
	Reads this CPU's unique instruction requestor ID.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port on this CPU.

uint32_t	taskId () const
	Get cpu task id.

void	taskId (uint32_t id)
	Set cpu task id.

uint32_t	getPid () const

void	setPid (uint32_t pid)

void	workItemBegin ()

void	workItemEnd ()

Tick	instCount ()

BaseInterrupts *	getInterruptController (ThreadID tid)

void	postInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupts (ThreadID tid)

bool	checkInterrupts (ThreadID tid) const

trace::InstTracer *	getTracer ()
	Provide access to the tracer pointer.

int	findContext (ThreadContext *tc)
	Given a Thread Context pointer return the thread num.

unsigned	numContexts ()
	Get the number of thread contexts available.

ThreadID	contextToThread (ContextID cid)
	Convert ContextID to threadID.

	PARAMS (BaseCPU)

	BaseCPU (const Params &params, bool is_checker=false)

virtual	~BaseCPU ()

void	regStats () override
	Callback to set stat parameters.

void	regProbePoints () override
	Register probe points for this object.

void	registerThreadContexts ()

void	deschedulePowerGatingEvent ()

void	schedulePowerGatingEvent ()

virtual void	setReset (bool state)
	Set the reset of the CPU to be either asserted or deasserted.

void	flushTLBs ()
	Flush all TLBs in the CPU.

bool	switchedOut () const
	Determine if the CPU is switched out.

Addr	cacheLineSize () const
	Get the cache line size of the system.

void	serialize (CheckpointOut &cp) const override
	Serialize this object to the given output stream.

void	unserialize (CheckpointIn &cp) override
	Reconstruct the state of this object from a checkpoint.

void	scheduleInstStop (ThreadID tid, Counter insts, std::string cause)
	Schedule an event that exits the simulation loops after a predefined number of instructions.

void	scheduleSimpointsInstStop (std::vector< Counter > inst_starts)
	Schedule simpoint events using the scheduleInstStop function.

void	scheduleInstStopAnyThread (Counter max_insts)
	Schedule an exit event when any threads in the core reach the max_insts instructions using the scheduleInstStop function.

uint64_t	getCurrentInstCount (ThreadID tid)
	Get the number of instructions executed by the specified thread on this CPU.

void	traceFunctions (Addr pc)

void	armMonitor (ThreadID tid, Addr address)

bool	mwait (ThreadID tid, PacketPtr pkt)

void	mwaitAtomic (ThreadID tid, ThreadContext tc, BaseMMU mmu)

AddressMonitor *	getCpuAddrMonitor (ThreadID tid)

virtual void	htmSendAbortSignal (ThreadID tid, uint64_t htm_uid, HtmFailureFaultCause cause)
	This function is used to instruct the memory subsystem that a transaction should be aborted and the speculative state should be thrown away.

virtual void	probeInstCommit (const StaticInstPtr &inst, Addr pc)
	Helper method to trigger PMU probes for a committed instruction.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Types
typedef std::vector< struct kvm_msr_entry >	KvmMSRVector

Protected Types inherited from gem5::BaseKvmCPU
enum	Status { Idle , Running , RunningService , RunningMMIOPending , RunningServiceCompletion }

Protected Types inherited from gem5::BaseCPU
enum	CPUState { CPU_STATE_ON , CPU_STATE_SLEEP , CPU_STATE_WAKEUP }

Protected Member Functions
Tick	kvmRun (Tick ticks) override
	Request KVM to run the guest for a given number of ticks.

Tick	kvmRunDrain () override
	Run the virtual CPU until draining completes.

uint64_t	getHostCycles () const override
	Get the value of the hardware cycle counter in the guest.

void	stutterPC (PCStateBase &pc) const override
	Modify a PCStatePtr's value so that its next PC is the current PC.

const Kvm::MSRIndexVector &	getMsrIntersection () const
	Get a list of MSRs supported by both gem5 and KVM.

void	updateKvmState () override
	Update the KVM state from the current thread context.

void	updateThreadContext () override
	Update the current thread context with the KVM state.

void	deliverInterrupts ()
	Inject pending interrupts from gem5 into the virtual CPU.

Tick	handleKvmExitIO () override
	Handle x86 legacy IO (in/out)

Tick	handleKvmExitIRQWindowOpen () override
	The guest exited because an interrupt window was requested.

bool	archIsDrained () const override
	Check if there are pending events in the vCPU that prevents it from being drained.

void	ioctlRun () override
	Override for synchronizing state in kvm_run.


void	setCPUID (const struct kvm_cpuid2 &cpuid)
	Methods to access CPUID information using the extended API.

void	setCPUID (const Kvm::CPUIDVector &cpuid)


void	setMSRs (const struct kvm_msrs &msrs)
	Methods to access MSRs in the guest.

void	setMSRs (const KvmMSRVector &msrs)

void	getMSRs (struct kvm_msrs &msrs) const

void	setMSR (uint32_t index, uint64_t value)

uint64_t	getMSR (uint32_t index) const


void	getDebugRegisters (struct kvm_debugregs &regs) const
	Wrappers around KVM's state transfer methods.

void	setDebugRegisters (const struct kvm_debugregs &regs)

void	getXCRs (struct kvm_xcrs &regs) const

void	setXCRs (const struct kvm_xcrs &regs)

void	getXSave (struct kvm_xsave &xsave) const

void	setXSave (const struct kvm_xsave &xsave)

void	getVCpuEvents (struct kvm_vcpu_events &events) const

void	setVCpuEvents (const struct kvm_vcpu_events &events)

Protected Member Functions inherited from gem5::BaseKvmCPU
void	tick ()
	Execute the CPU until the next event in the main event queue or until the guest needs service from gem5.

struct kvm_run *	getKvmRunState ()
	Get a pointer to the kvm_run structure containing all the input and output parameters from kvmRun().

uint8_t *	getGuestData (uint64_t offset) const
	Retrieve a pointer to guest data stored at the end of the kvm_run structure.

void	kvmNonMaskableInterrupt ()
	Send a non-maskable interrupt to the guest.

void	kvmInterrupt (const struct kvm_interrupt &interrupt)
	Send a normal interrupt to the guest.

std::string	getAndFormatOneReg (uint64_t id) const
	Get and format one register for printout.

Tick	doMMIOAccess (Addr paddr, void *data, int size, bool write)
	Inject a memory mapped IO request into gem5.

int	ioctl (int request, long p1) const
	vCPU ioctl interface.

int	ioctl (int request, void *p1) const

int	ioctl (int request) const

void	getRegisters (struct kvm_regs &regs) const
	Get/Set the register state of the guest vCPU.

void	setRegisters (const struct kvm_regs &regs)

void	getSpecialRegisters (struct kvm_sregs &regs) const

void	setSpecialRegisters (const struct kvm_sregs &regs)

void	getFPUState (struct kvm_fpu &state) const
	Get/Set the guest FPU/vector state.

void	setFPUState (const struct kvm_fpu &state)

void	setOneReg (uint64_t id, const void *addr)
	Get/Set single register using the KVM_(SET\|GET)_ONE_REG API.

void	setOneReg (uint64_t id, uint64_t value)

void	setOneReg (uint64_t id, uint32_t value)

void	getOneReg (uint64_t id, void *addr) const

uint64_t	getOneRegU64 (uint64_t id) const

uint32_t	getOneRegU32 (uint64_t id) const

void	syncThreadContext ()
	Update a thread context if the KVM state is dirty with respect to the cached thread context.

EventQueue *	deviceEventQueue ()
	Get a pointer to the event queue owning devices.

void	syncKvmState ()
	Update the KVM if the thread context is dirty.

virtual Tick	handleKvmExit ()
	Main kvmRun exit handler, calls the relevant handleKvmExit* depending on exit type.

virtual Tick	handleKvmExitHypercall ()
	The guest requested a monitor service using a hypercall.

virtual Tick	handleKvmExitUnknown ()
	An unknown architecture dependent error occurred when starting the vCPU.

virtual Tick	handleKvmExitException ()
	An unhandled virtualization exception occured.

virtual Tick	handleKvmExitFailEntry ()
	KVM failed to start the virtualized CPU.

void	setSignalMask (const sigset_t *mask)
	Set the signal mask used in kvmRun()

Protected Member Functions inherited from gem5::BaseCPU
void	updateCycleCounters (CPUState state)
	base method keeping track of cycle progression

void	enterPwrGating ()

probing::PMUUPtr	pmuProbePoint (const char *name)
	Helper method to instantiate probe points belonging to this object.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Private Member Functions
void	updateCPUID ()
	Transfer gem5's CPUID values into the virtual CPU.

void	handleIOMiscReg32 (int miscreg)
	Handle a 32-bit IO access that should be mapped to a MiscReg.


void	updateKvmStateRegs ()
	Support routines to update the state of the KVM CPU from gem5's state representation.

void	updateKvmStateSRegs ()
	Update control registers (CRx, segments, etc.)

void	updateKvmStateFPU ()
	Update FPU and SIMD registers.

void	updateKvmStateFPULegacy ()
	Update FPU and SIMD registers using the legacy API.

void	updateKvmStateFPUXSave ()
	Update FPU and SIMD registers using the XSave API.

void	updateKvmStateMSRs ()
	Update MSR registers.

void	updateKvmStateXCRs ()
	Update XCR registers.


void	updateThreadContextRegs (const struct kvm_regs &regs, const struct kvm_sregs &sregs)
	Support routines to update the state of gem5's thread context from KVM's state representation.

void	updateThreadContextSRegs (const struct kvm_sregs &sregs)
	Update control registers (CRx, segments, etc.)

void	updateThreadContextFPU (const struct kvm_fpu &fpu)
	Update FPU and SIMD registers using the legacy API.

void	updateThreadContextXSave (const struct kvm_xsave &kxsave)
	Update FPU and SIMD registers using the XSave API.

void	updateThreadContextMSRs ()
	Update MSR registers.

void	updateThreadContextXCRs ()
	Update XCR registers.

Private Attributes
Kvm::MSRIndexVector	cachedMsrIntersection
	Cached intersection of supported MSRs.


bool	haveDebugRegs
	Kvm::capDebugRegs() available?

bool	haveXSave
	Kvm::capXSave() available?

bool	useXSave
	Should the XSave interface be used to sync the FPU and SIMD registers?

bool	haveXCRs
	Kvm::capXCRs() available?

Additional Inherited Members
Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::BaseCPU
static int	numSimulatedCPUs ()

static Counter	numSimulatedInsts ()

static Counter	numSimulatedOps ()

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Public Attributes inherited from gem5::BaseKvmCPU
SimpleThread *	thread
	A cached copy of a thread's state in the form of a SimpleThread object.

ThreadContext *	tc
	ThreadContext object, provides an interface for external objects to modify this thread's state.

KvmVM *	vm

gem5::BaseKvmCPU::StatGroup	stats

Counter	ctrInsts
	Number of instructions executed by the CPU.

Public Attributes inherited from gem5::BaseCPU
ThreadID	numThreads
	Number of threads we're actually simulating (<= SMT_MAX_THREADS).

System *	system

gem5::BaseCPU::BaseCPUStats	baseStats

Cycles	syscallRetryLatency

std::vector< std::unique_ptr< FetchCPUStats > >	fetchStats

std::vector< std::unique_ptr< ExecuteCPUStats > >	executeStats

std::vector< std::unique_ptr< CommitCPUStats > >	commitStats

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Static Public Attributes inherited from gem5::BaseCPU
static const uint32_t	invldPid = std::numeric_limits<uint32_t>::max()
	Invalid or unknown Pid.

Protected Attributes inherited from gem5::BaseKvmCPU
Status	_status
	CPU run state.

KVMCpuPort	dataPort
	Port for data requests.

KVMCpuPort	instPort
	Unused dummy port for the instruction interface.

const bool	alwaysSyncTC
	Be conservative and always synchronize the thread context on KVM entry/exit.

bool	threadContextDirty
	Is the gem5 context dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun().

bool	kvmStateDirty
	Is the KVM state dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun().

bool	usePerf
	True if using perf; False otherwise.

long	vcpuID
	KVM internal ID of the vCPU.

pthread_t	vcpuThread
	ID of the vCPU thread.

Protected Attributes inherited from gem5::BaseCPU
Tick	instCnt
	Instruction count used for SPARC misc register.

int	_cpuId

const uint32_t	_socketId
	Each cpu will have a socket ID that corresponds to its physical location in the system.

RequestorID	_instRequestorId
	instruction side request id that must be placed in all requests

RequestorID	_dataRequestorId
	data side request id that must be placed in all requests

uint32_t	_taskId
	An intrenal representation of a task identifier within gem5.

uint32_t	_pid
	The current OS process ID that is executing on this processor.

bool	_switchedOut
	Is the CPU switched out or active?

const Addr	_cacheLineSize
	Cache the cache line size that we get from the system.

SignalSinkPort< bool >	modelResetPort

std::vector< BaseInterrupts * >	interrupts

std::vector< ThreadContext * >	threadContexts

trace::InstTracer *	tracer

Cycles	previousCycle

CPUState	previousState

const Cycles	pwrGatingLatency

const bool	powerGatingOnIdle

EventFunctionWrapper	enterPwrGatingEvent

probing::PMUUPtr	ppRetiredInsts
	Instruction commit probe point.

probing::PMUUPtr	ppRetiredInstsPC

probing::PMUUPtr	ppRetiredLoads
	Retired load instructions.

probing::PMUUPtr	ppRetiredStores
	Retired store instructions.

probing::PMUUPtr	ppRetiredBranches
	Retired branches (any type)

probing::PMUUPtr	ppAllCycles
	CPU cycle counter even if any thread Context is suspended.

probing::PMUUPtr	ppActiveCycles
	CPU cycle counter, only counts if any thread contexts is active.

ProbePointArg< bool > *	ppSleeping
	ProbePoint that signals transitions of threadContexts sets.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Static Protected Attributes inherited from gem5::BaseCPU
static std::unique_ptr< GlobalStats >	globalStats
	Pointer to the global stat structure.

Detailed Description

x86 implementation of a KVM-based hardware virtualized CPU.

Definition at line 52 of file x86_cpu.hh.

Member Typedef Documentation

◆ KvmMSRVector

typedef std::vector<struct kvm_msr_entry> gem5::X86KvmCPU::KvmMSRVector

protected

Definition at line 74 of file x86_cpu.hh.

Constructor & Destructor Documentation

◆ X86KvmCPU()

gem5::X86KvmCPU::X86KvmCPU ( const X86KvmCPUParams & params )

Definition at line 572 of file x86_cpu.cc.

◆ ~X86KvmCPU()

gem5::X86KvmCPU::~X86KvmCPU ( )

virtual

Definition at line 606 of file x86_cpu.cc.

Member Function Documentation

◆ archIsDrained()

bool gem5::X86KvmCPU::archIsDrained ( ) const

overrideprotectedvirtual

Check if there are pending events in the vCPU that prevents it from being drained.

There are cases after interrupt injection where the interrupt is still pending in the guest. This method detects such cases and requests additional draining.

Returns: False if there are pending events in the guest, True otherwise.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1458 of file x86_cpu.cc.

References DPRINTF, and getVCpuEvents().

Referenced by kvmRunDrain().

◆ deliverInterrupts()

void gem5::X86KvmCPU::deliverInterrupts ( )

protected

Inject pending interrupts from gem5 into the virtual CPU.

Definition at line 1228 of file x86_cpu.cc.

References DPRINTF, gem5::EventManager::eventQueue(), gem5::X86ISA::X86FaultBase::getVector(), gem5::BaseCPU::interrupts, gem5::BaseKvmCPU::kvmInterrupt(), gem5::BaseKvmCPU::kvmNonMaskableInterrupt(), panic, gem5::SimpleThread::suspend(), gem5::BaseKvmCPU::syncThreadContext(), gem5::BaseKvmCPU::tc, gem5::BaseKvmCPU::thread, gem5::BaseKvmCPU::threadContextDirty, and updateKvmState().

Referenced by kvmRun().

◆ dump()

void gem5::X86KvmCPU::dump ( ) const

overridevirtual

Dump the internal state to the terminal.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 625 of file x86_cpu.cc.

References dumpDebugRegs(), dumpFpuRegs(), dumpIntRegs(), dumpMSRs(), dumpSpecRegs(), dumpVCpuEvents(), dumpXCRs(), dumpXSave(), and useXSave.

Referenced by updateKvmState(), and updateThreadContext().

◆ dumpDebugRegs()

void gem5::X86KvmCPU::dumpDebugRegs ( ) const

Definition at line 664 of file x86_cpu.cc.

References gem5::dumpKvm(), getDebugRegisters(), haveDebugRegs, and inform.

Referenced by dump().

◆ dumpFpuRegs()

void gem5::X86KvmCPU::dumpFpuRegs ( ) const

Definition at line 640 of file x86_cpu.cc.

References gem5::dumpKvm(), and gem5::BaseKvmCPU::getFPUState().

Referenced by dump().

◆ dumpIntRegs()

void gem5::X86KvmCPU::dumpIntRegs ( ) const

Definition at line 648 of file x86_cpu.cc.

References gem5::dumpKvm(), and gem5::BaseKvmCPU::getRegisters().

Referenced by dump().

◆ dumpMSRs()

void gem5::X86KvmCPU::dumpMSRs ( ) const

Definition at line 710 of file x86_cpu.cc.

References gem5::dumpKvm(), gem5::ArmISA::e, getMSRs(), gem5::ArmISA::i, gem5::KvmVM::kvm, gem5::newVarStruct(), and gem5::BaseKvmCPU::vm.

Referenced by dump().

◆ dumpSpecRegs()

void gem5::X86KvmCPU::dumpSpecRegs ( ) const

Definition at line 656 of file x86_cpu.cc.

References gem5::dumpKvm(), and gem5::BaseKvmCPU::getSpecialRegisters().

Referenced by dump().

◆ dumpVCpuEvents()

void gem5::X86KvmCPU::dumpVCpuEvents ( ) const

Definition at line 702 of file x86_cpu.cc.

References gem5::dumpKvm(), and getVCpuEvents().

Referenced by dump().

◆ dumpXCRs()

void gem5::X86KvmCPU::dumpXCRs ( ) const

Definition at line 678 of file x86_cpu.cc.

References gem5::dumpKvm(), getXCRs(), haveXCRs, and inform.

Referenced by dump().

◆ dumpXSave()

void gem5::X86KvmCPU::dumpXSave ( ) const

Definition at line 690 of file x86_cpu.cc.

References gem5::dumpKvm(), getXSave(), haveXSave, and inform.

Referenced by dump().

◆ getDebugRegisters()

void gem5::X86KvmCPU::getDebugRegisters ( struct kvm_debugregs & regs ) const

protected

Wrappers around KVM's state transfer methods.

Definition at line 1698 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by dumpDebugRegs().

◆ getHostCycles()

uint64_t gem5::X86KvmCPU::getHostCycles ( ) const

overrideprotectedvirtual

Get the value of the hardware cycle counter in the guest.

This method is supposed to return the total number of cycles executed in hardware mode relative to some arbitrary point in the past. It's mainly used when estimating the number of cycles actually executed by the CPU in kvmRun(). The default behavior of this method is to use the cycles performance counter, but some architectures may want to use internal registers instead.

Returns: Number of host cycles executed relative to an undefined point in the past.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1354 of file x86_cpu.cc.

References getMSR(), and MSR_TSC.

◆ getMSR()

uint64_t gem5::X86KvmCPU::getMSR ( uint32_t index ) const

protected

Definition at line 1662 of file x86_cpu.cc.

References getMSRs(), gem5::MipsISA::index, and gem5::newVarStruct().

Referenced by getHostCycles().

◆ getMsrIntersection()

const Kvm::MSRIndexVector & gem5::X86KvmCPU::getMsrIntersection ( ) const

protected

Get a list of MSRs supported by both gem5 and KVM.

Note: This method uses an internal cache and only generates the MSR list once.

Returns: reference to a list of msr indices

Definition at line 1677 of file x86_cpu.cc.

References cachedMsrIntersection, DPRINTF, gem5::SimObject::find(), gem5::KvmVM::kvm, gem5::X86ISA::msrMap, gem5::BaseKvmCPU::vm, and warn.

Referenced by updateKvmStateMSRs(), and updateThreadContextMSRs().

◆ getMSRs()

void gem5::X86KvmCPU::getMSRs ( struct kvm_msrs & msrs ) const

protected

Definition at line 1639 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by dumpMSRs(), getMSR(), and updateThreadContextMSRs().

◆ getVCpuEvents()

void gem5::X86KvmCPU::getVCpuEvents ( struct kvm_vcpu_events & events ) const

protected

Definition at line 1749 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by archIsDrained(), and dumpVCpuEvents().

◆ getXCRs()

void gem5::X86KvmCPU::getXCRs ( struct kvm_xcrs & regs ) const

protected

Definition at line 1720 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by dumpXCRs(), and updateThreadContextXCRs().

◆ getXSave()

void gem5::X86KvmCPU::getXSave ( struct kvm_xsave & xsave ) const

protected

Definition at line 1734 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by dumpXSave(), and updateThreadContext().

◆ handleIOMiscReg32()

void gem5::X86KvmCPU::handleIOMiscReg32 ( int miscreg )

private

Handle a 32-bit IO access that should be mapped to a MiscReg.

Note: This method can only be called on when handling IO after a KVM_EXIT_IO.

Parameters

miscreg Register to map the current IO access to.

Definition at line 1360 of file x86_cpu.cc.

References data, gem5::BaseKvmCPU::getGuestData(), gem5::BaseKvmCPU::getKvmRunState(), panic, gem5::ThreadContext::readMiscRegNoEffect(), gem5::ThreadContext::setMiscReg(), and gem5::BaseKvmCPU::tc.

Referenced by handleKvmExitIO().

◆ handleKvmExitIO()

Tick gem5::X86KvmCPU::handleKvmExitIO ( )

overrideprotectedvirtual

◆ handleKvmExitIRQWindowOpen()

Tick gem5::X86KvmCPU::handleKvmExitIRQWindowOpen ( )

overrideprotectedvirtual

The guest exited because an interrupt window was requested.

The guest exited because an interrupt window was requested (request_interrupt_window in the kvm_run structure was set to 1 before calling kvmRun) and it is now ready to receive

Returns: Number of ticks spent servicing the IRQ

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1449 of file x86_cpu.cc.

◆ init()

void gem5::X86KvmCPU::init ( )

overridevirtual

init() is called after all C++ SimObjects have been created and all ports are connected.

Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 578 of file x86_cpu.cc.

References gem5::Kvm::capDebugRegs(), gem5::Kvm::capExtendedCPUID(), gem5::Kvm::capSetTSSAddress(), gem5::Kvm::capUserNMI(), gem5::Kvm::capVCPUEvents(), gem5::Kvm::capXCRs(), gem5::Kvm::capXSave(), haveDebugRegs, haveXCRs, haveXSave, gem5::BaseKvmCPU::init(), gem5::KvmVM::kvm, panic, useXSave, gem5::BaseKvmCPU::vm, and warn.

◆ ioctlRun()

void gem5::X86KvmCPU::ioctlRun ( )

overrideprotectedvirtual

Override for synchronizing state in kvm_run.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1487 of file x86_cpu.cc.

References gem5::X86ISA::misc_reg::ApicBase, gem5::X86ISA::misc_reg::Cr8, gem5::BaseKvmCPU::getKvmRunState(), gem5::BaseKvmCPU::ioctlRun(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::setMiscReg(), and gem5::BaseKvmCPU::tc.

◆ kvmRun()

Tick gem5::X86KvmCPU::kvmRun ( Tick ticks )

overrideprotectedvirtual

Request KVM to run the guest for a given number of ticks.

The method returns the approximate number of ticks executed.

Note: The returned number of ticks can be both larger or smaller than the requested number of ticks. A smaller number can, for example, occur when the guest executes MMIO. A larger number is typically due to performance counter inaccuracies.; This method is virtual in order to allow implementations to check for architecture specific events (e.g., interrupts) before entering the VM.; It is the response of the caller (normally tick()) to make sure that the KVM state is synchronized and that the TC is invalidated after entering KVM.; This method does not normally cause any state transitions. However, if it may suspend the CPU by suspending the thread, which leads to a transition to the Idle state. In such a case, kvm must not be entered.

Parameters

ticks Number of ticks to execute, set to 0 to exit immediately after finishing pending operations.

Returns: Number of ticks executed (see note)

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1281 of file x86_cpu.cc.

References gem5::BaseKvmCPU::_status, deliverInterrupts(), DPRINTF, gem5::BaseKvmCPU::getKvmRunState(), gem5::BaseKvmCPU::Idle, gem5::BaseCPU::interrupts, gem5::BaseKvmCPU::kvmRun(), and gem5::BaseKvmCPU::syncThreadContext().

◆ kvmRunDrain()

Tick gem5::X86KvmCPU::kvmRunDrain ( )

overrideprotectedvirtual

Run the virtual CPU until draining completes.

In addition to the base functionality provided by BaseKvmCPU::kvmRunDrain(), this method handles x86-specific cases where there are pending interrupt events in the virtual CPU. These are handled by requesting an interrupt window if interrupts are pending (causing the vCPU to execute until interrupts can be delivered again).

See also: BaseKvmCPU::kvmRunDrain(); archIsDrained()

Returns: Number of ticks executed

Reimplemented from gem5::BaseKvmCPU.

Definition at line 1329 of file x86_cpu.cc.

References archIsDrained(), DPRINTF, gem5::BaseKvmCPU::getKvmRunState(), gem5::BaseKvmCPU::kvmRun(), and gem5::sim_clock::as_float::ms.

◆ setCPUID() [1/2]

void gem5::X86KvmCPU::setCPUID ( const Kvm::CPUIDVector & cpuid )

protected

Definition at line 1607 of file x86_cpu.cc.

References gem5::MipsISA::cpuid, gem5::newVarStruct(), and setCPUID().

◆ setCPUID() [2/2]

void gem5::X86KvmCPU::setCPUID ( const struct kvm_cpuid2 & cpuid )

protected

Methods to access CPUID information using the extended API.

Only available if Kvm::capExtendedCPUID() is true.

Definition at line 1599 of file x86_cpu.cc.

References gem5::MipsISA::cpuid, gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by setCPUID(), and updateCPUID().

◆ setDebugRegisters()

void gem5::X86KvmCPU::setDebugRegisters ( const struct kvm_debugregs & regs )

protected

Definition at line 1709 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

◆ setMSR()

void gem5::X86KvmCPU::setMSR	(	uint32_t	index,
		uint64_t	value )

protected

Definition at line 1648 of file x86_cpu.cc.

References gem5::MipsISA::index, gem5::newVarStruct(), and setMSRs().

◆ setMSRs() [1/2]

void gem5::X86KvmCPU::setMSRs ( const KvmMSRVector & msrs )

protected

Definition at line 1627 of file x86_cpu.cc.

References gem5::newVarStruct(), and setMSRs().

◆ setMSRs() [2/2]

void gem5::X86KvmCPU::setMSRs ( const struct kvm_msrs & msrs )

protected

Methods to access MSRs in the guest.

Definition at line 1619 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by setMSR(), setMSRs(), and updateKvmStateMSRs().

◆ setVCpuEvents()

void gem5::X86KvmCPU::setVCpuEvents ( const struct kvm_vcpu_events & events )

protected

Definition at line 1756 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

◆ setXCRs()

void gem5::X86KvmCPU::setXCRs ( const struct kvm_xcrs & regs )

protected

Definition at line 1727 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by updateKvmStateXCRs().

◆ setXSave()

void gem5::X86KvmCPU::setXSave ( const struct kvm_xsave & xsave )

protected

Definition at line 1741 of file x86_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

Referenced by updateKvmStateFPUXSave().

◆ startup()

void gem5::X86KvmCPU::startup ( )

overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from gem5::BaseKvmCPU.

Definition at line 611 of file x86_cpu.cc.

References gem5::BaseKvmCPU::startup(), and updateCPUID().

◆ stutterPC()

void gem5::X86KvmCPU::stutterPC ( PCStateBase & pc ) const

inlineoverrideprotectedvirtual

Modify a PCStatePtr's value so that its next PC is the current PC.

This needs to be implemented in KVM base classes since modifying the next PC value is an ISA specific operation. This is only used in doMMIOAccess, for reasons explained in a comment there.

Implements gem5::BaseKvmCPU.

Definition at line 97 of file x86_cpu.hh.

References gem5::MipsISA::pc.

◆ updateCPUID()

void gem5::X86KvmCPU::updateCPUID ( )

private

Transfer gem5's CPUID values into the virtual CPU.

Definition at line 1520 of file x86_cpu.cc.

References gem5::MipsISA::cpuid, gem5::X86ISA::ISA::cpuid, gem5::ThreadContext::getIsaPtr(), gem5::makeKvmCpuid(), gem5::X86ISA::CpuidResult::rax, setCPUID(), and gem5::BaseKvmCPU::tc.

Referenced by startup().

◆ updateKvmState()

void gem5::X86KvmCPU::updateKvmState ( )

overrideprotectedvirtual

Update the KVM state from the current thread context.

The base CPU calls this method before starting the guest CPU when the contextDirty flag is set. The architecture dependent CPU implementation is expected to update all guest state (registers, special registers, and FPU state).

Implements gem5::BaseKvmCPU.

Definition at line 729 of file x86_cpu.cc.

References DPRINTF, dump(), updateKvmStateFPU(), updateKvmStateMSRs(), updateKvmStateRegs(), updateKvmStateSRegs(), and updateKvmStateXCRs().

Referenced by deliverInterrupts().

◆ updateKvmStateFPU()

void gem5::X86KvmCPU::updateKvmStateFPU ( )

private

Update FPU and SIMD registers.

This method uses the appropriate (depending on availability and user configuration) kernel API by calling updateKvmStateFPULegacy() or updateKvmStateFPUXSave().

See also: updateKvmStateFPULegacy(); updateKvmStateFPUXSave()

Definition at line 970 of file x86_cpu.cc.

References updateKvmStateFPULegacy(), updateKvmStateFPUXSave(), and useXSave.

Referenced by updateKvmState().

◆ updateKvmStateFPULegacy()

void gem5::X86KvmCPU::updateKvmStateFPULegacy ( )

private

Update FPU and SIMD registers using the legacy API.

Note: This method should normally only be called by updateKvmStateFPU() which automatically chooses between available APIs.

Definition at line 908 of file x86_cpu.cc.

References gem5::X86ISA::misc_reg::Fioff, gem5::X86ISA::misc_reg::Fiseg, gem5::X86ISA::misc_reg::Fooff, gem5::X86ISA::misc_reg::Foseg, gem5::ThreadContext::readMiscRegNoEffect(), gem5::BaseKvmCPU::setFPUState(), gem5::BaseKvmCPU::tc, gem5::updateKvmStateFPUCommon(), and warn_once.

Referenced by updateKvmStateFPU().

◆ updateKvmStateFPUXSave()

void gem5::X86KvmCPU::updateKvmStateFPUXSave ( )

private

Update FPU and SIMD registers using the XSave API.

Note: This method should normally only be called by updateKvmStateFPU() which automatically chooses between available APIs.

The xsave header (Vol. 1, Section 13.4.2 of the Intel Software Development Manual) directly follows the legacy xsave region (i.e., the FPU/SSE state). The first 8 bytes of the xsave header hold a state-component bitmap called xstate_bv. We need to set the state component bits corresponding to the FPU and SSE states.

Definition at line 932 of file x86_cpu.cc.

References gem5::X86ISA::misc_reg::Fioff, gem5::X86ISA::misc_reg::Fiseg, gem5::X86ISA::misc_reg::Fooff, gem5::X86ISA::misc_reg::Foseg, gem5::ThreadContext::readMiscRegNoEffect(), setXSave(), gem5::BaseKvmCPU::tc, gem5::updateKvmStateFPUCommon(), and warn_once.

Referenced by updateKvmStateFPU().

◆ updateKvmStateMSRs()

void gem5::X86KvmCPU::updateKvmStateMSRs ( )

private

Update MSR registers.

Definition at line 979 of file x86_cpu.cc.

References DPRINTF, gem5::ArmISA::e, getMsrIntersection(), gem5::X86ISA::msrMap, gem5::ThreadContext::readMiscReg(), setMSRs(), and gem5::BaseKvmCPU::tc.

Referenced by updateKvmState().

◆ updateKvmStateRegs()

void gem5::X86KvmCPU::updateKvmStateRegs ( )

private

Support routines to update the state of the KVM CPU from gem5's state representation.

Update integer registers

Definition at line 743 of file x86_cpu.cc.

References gem5::X86ISA::misc_reg::CsBase, FOREACH_IREG, gem5::X86ISA::getRFlags(), gem5::PCStateBase::instAddr(), gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscReg(), gem5::BaseKvmCPU::setRegisters(), and gem5::BaseKvmCPU::tc.

Referenced by updateKvmState().

◆ updateKvmStateSRegs()

void gem5::X86KvmCPU::updateKvmStateSRegs ( )

private

Update control registers (CRx, segments, etc.)

Definition at line 805 of file x86_cpu.cc.

References gem5::forceSegAccessed(), FOREACH_DTABLE, FOREACH_SEGMENT, FOREACH_SREG, hack, gem5::ThreadContext::readMiscReg(), gem5::X86ISA::misc_reg::Rflags, SEG_CS_TYPE_ACCESSED, SEG_CS_TYPE_READ_ACCESSED, SEG_SYS_TYPE_TSS_AVAILABLE, SEG_SYS_TYPE_TSS_BUSY, gem5::BaseKvmCPU::setSpecialRegisters(), and gem5::BaseKvmCPU::tc.

Referenced by updateKvmState().

◆ updateKvmStateXCRs()

void gem5::X86KvmCPU::updateKvmStateXCRs ( )

private

Update XCR registers.

Definition at line 1001 of file x86_cpu.cc.

References haveXCRs, gem5::ArmISA::i, gem5::X86ISA::NumXCRegs, gem5::ThreadContext::readMiscReg(), setXCRs(), gem5::BaseKvmCPU::tc, and gem5::X86ISA::misc_reg::xcr().

Referenced by updateKvmState().

◆ updateThreadContext()

void gem5::X86KvmCPU::updateThreadContext ( )

overrideprotectedvirtual

Update the current thread context with the KVM state.

The base CPU after the guest updates any of the KVM state. In practice, this happens after kvmRun is called. The architecture dependent code is expected to read the state of the guest CPU and update gem5's thread state.

Implements gem5::BaseKvmCPU.

Definition at line 1019 of file x86_cpu.cc.

References DPRINTF, dump(), gem5::BaseKvmCPU::getFPUState(), gem5::BaseKvmCPU::getRegisters(), gem5::BaseKvmCPU::getSpecialRegisters(), getXSave(), gem5::X86ISA::misc_reg::M5Reg, gem5::ThreadContext::setMiscReg(), gem5::BaseKvmCPU::tc, updateThreadContextFPU(), updateThreadContextMSRs(), updateThreadContextRegs(), updateThreadContextSRegs(), updateThreadContextXCRs(), updateThreadContextXSave(), and useXSave.

◆ updateThreadContextFPU()

void gem5::X86KvmCPU::updateThreadContextFPU ( const struct kvm_fpu & fpu )

private

Update FPU and SIMD registers using the legacy API.

Definition at line 1159 of file x86_cpu.cc.

References gem5::X86ISA::misc_reg::Fioff, gem5::X86ISA::misc_reg::Fiseg, gem5::X86ISA::misc_reg::Fooff, gem5::X86ISA::misc_reg::Foseg, gem5::ThreadContext::setMiscRegNoEffect(), gem5::BaseKvmCPU::tc, and gem5::updateThreadContextFPUCommon().

Referenced by updateThreadContext().

◆ updateThreadContextMSRs()

void gem5::X86KvmCPU::updateThreadContextMSRs ( )

private

Update MSR registers.

Definition at line 1183 of file x86_cpu.cc.

References gem5::ArmISA::at, DPRINTF, getMsrIntersection(), getMSRs(), gem5::ArmISA::i, gem5::X86ISA::msrMap, gem5::newVarStruct(), gem5::ThreadContext::setMiscReg(), and gem5::BaseKvmCPU::tc.

Referenced by updateThreadContext().

◆ updateThreadContextRegs()

void gem5::X86KvmCPU::updateThreadContextRegs	(	const struct kvm_regs &	regs,
		const struct kvm_sregs &	sregs )

private

Support routines to update the state of gem5's thread context from KVM's state representation.

Update integer registers

Definition at line 1054 of file x86_cpu.cc.

References FOREACH_IREG, gem5::ThreadContext::pcState(), gem5::X86ISA::setRFlags(), and gem5::BaseKvmCPU::tc.

Referenced by updateThreadContext().

◆ updateThreadContextSRegs()

void gem5::X86KvmCPU::updateThreadContextSRegs ( const struct kvm_sregs & sregs )

private

Update control registers (CRx, segments, etc.)

Definition at line 1108 of file x86_cpu.cc.

References FOREACH_DTABLE, FOREACH_SEGMENT, FOREACH_SREG, and gem5::BaseKvmCPU::getKvmRunState().

Referenced by updateThreadContext().

◆ updateThreadContextXCRs()

void gem5::X86KvmCPU::updateThreadContextXCRs ( )

private

Update XCR registers.

Definition at line 1213 of file x86_cpu.cc.

References getXCRs(), haveXCRs, gem5::ArmISA::i, gem5::ThreadContext::setMiscReg(), gem5::BaseKvmCPU::tc, and gem5::X86ISA::misc_reg::xcr().

Referenced by updateThreadContext().

◆ updateThreadContextXSave()

void gem5::X86KvmCPU::updateThreadContextXSave ( const struct kvm_xsave & kxsave )

private

Update FPU and SIMD registers using the XSave API.

Definition at line 1170 of file x86_cpu.cc.

References gem5::FXSave::ctrl64, gem5::X86ISA::misc_reg::Fioff, gem5::X86ISA::misc_reg::Fiseg, gem5::X86ISA::misc_reg::Fooff, gem5::X86ISA::misc_reg::Foseg, gem5::FXSave::fpu_dp, gem5::FXSave::fpu_ip, gem5::ThreadContext::setMiscRegNoEffect(), gem5::BaseKvmCPU::tc, and gem5::updateThreadContextFPUCommon().

Referenced by updateThreadContext().

Member Data Documentation

◆ cachedMsrIntersection

Kvm::MSRIndexVector gem5::X86KvmCPU::cachedMsrIntersection

mutableprivate

Cached intersection of supported MSRs.

Definition at line 259 of file x86_cpu.hh.

Referenced by getMsrIntersection().

◆ haveDebugRegs

bool gem5::X86KvmCPU::haveDebugRegs

private

Kvm::capDebugRegs() available?

Definition at line 263 of file x86_cpu.hh.

Referenced by dumpDebugRegs(), and init().

◆ haveXCRs

bool gem5::X86KvmCPU::haveXCRs

private

Kvm::capXCRs() available?

Definition at line 272 of file x86_cpu.hh.

Referenced by dumpXCRs(), init(), updateKvmStateXCRs(), and updateThreadContextXCRs().

◆ haveXSave

bool gem5::X86KvmCPU::haveXSave

private

Kvm::capXSave() available?

Definition at line 265 of file x86_cpu.hh.

Referenced by dumpXSave(), and init().

◆ useXSave

bool gem5::X86KvmCPU::useXSave

private

Should the XSave interface be used to sync the FPU and SIMD registers?

Definition at line 270 of file x86_cpu.hh.

Referenced by dump(), init(), updateKvmStateFPU(), and updateThreadContext().

The documentation for this class was generated from the following files:

arch/x86/kvm/x86_cpu.hh
arch/x86/kvm/x86_cpu.cc

Public Member Functions

Protected Types

Protected Member Functions

Private Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ KvmMSRVector

Constructor & Destructor Documentation

◆ X86KvmCPU()

◆ ~X86KvmCPU()

Member Function Documentation

◆ archIsDrained()

◆ deliverInterrupts()

◆ dump()

◆ dumpDebugRegs()

◆ dumpFpuRegs()

◆ dumpIntRegs()

◆ dumpMSRs()

◆ dumpSpecRegs()

◆ dumpVCpuEvents()

◆ dumpXCRs()

◆ dumpXSave()

◆ getDebugRegisters()

◆ getHostCycles()

◆ getMSR()

◆ getMsrIntersection()

◆ getMSRs()

◆ getVCpuEvents()

◆ getXCRs()

◆ getXSave()

◆ handleIOMiscReg32()

◆ handleKvmExitIO()

◆ handleKvmExitIRQWindowOpen()

◆ init()

◆ ioctlRun()

◆ kvmRun()

◆ kvmRunDrain()

◆ setCPUID() [1/2]

◆ setCPUID() [2/2]

◆ setDebugRegisters()

◆ setMSR()

◆ setMSRs() [1/2]

◆ setMSRs() [2/2]

◆ setVCpuEvents()

◆ setXCRs()

◆ setXSave()

◆ startup()

◆ stutterPC()

◆ updateCPUID()

◆ updateKvmState()

◆ updateKvmStateFPU()

◆ updateKvmStateFPULegacy()

◆ updateKvmStateFPUXSave()

◆ updateKvmStateMSRs()

◆ updateKvmStateRegs()

◆ updateKvmStateSRegs()

◆ updateKvmStateXCRs()

◆ updateThreadContext()

◆ updateThreadContextFPU()

◆ updateThreadContextMSRs()

◆ updateThreadContextRegs()

◆ updateThreadContextSRegs()

◆ updateThreadContextXCRs()

◆ updateThreadContextXSave()

Member Data Documentation

◆ cachedMsrIntersection

◆ haveDebugRegs

◆ haveXCRs

◆ haveXSave

◆ useXSave