gem5  v21.1.0.2
clock_domain.cc
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38 
39 #include "sim/clock_domain.hh"
40 
41 #include <algorithm>
42 #include <functional>
43 
44 #include "base/logging.hh"
45 #include "base/trace.hh"
46 #include "debug/ClockDomain.hh"
47 #include "params/ClockDomain.hh"
48 #include "params/DerivedClockDomain.hh"
49 #include "params/SrcClockDomain.hh"
50 #include "sim/clocked_object.hh"
51 #include "sim/serialize.hh"
52 #include "sim/voltage_domain.hh"
53 
54 namespace gem5
55 {
56 
58  : statistics::Group(&cd),
59  ADD_STAT(clock, statistics::units::Tick::get(), "Clock period in ticks")
60 {
61  // Expose the current clock period as a stat for observability in
62  // the dumps
63  clock.scalar(cd._clockPeriod);
64 }
65 
67  : SimObject(p),
68  _clockPeriod(0),
69  _voltageDomain(voltage_domain),
70  stats(*this)
71 {
72 }
73 
74 double
76 {
77  return _voltageDomain->voltage();
78 }
79 
81  ClockDomain(p, p.voltage_domain),
82  freqOpPoints(p.clock),
83  _domainID(p.domain_id),
84  _perfLevel(p.init_perf_level)
85 {
86  VoltageDomain *vdom = p.voltage_domain;
87 
88  fatal_if(freqOpPoints.empty(), "DVFS: Empty set of frequencies for "\
89  "domain %d %s\n", _domainID, name());
90 
91  fatal_if(!vdom, "DVFS: Empty voltage domain specified for "\
92  "domain %d %s\n", _domainID, name());
93 
94  fatal_if((vdom->numVoltages() > 1) &&
95  (vdom->numVoltages() != freqOpPoints.size()),
96  "DVFS: Number of frequency and voltage scaling points do "\
97  "not match: %d:%d ID: %d %s.\n", vdom->numVoltages(),
98  freqOpPoints.size(), _domainID, name());
99 
100  // Frequency (& voltage) points should be declared in descending order,
101  // NOTE: Frequency is inverted to ticks, so checking for ascending ticks
102  fatal_if(!std::is_sorted(freqOpPoints.begin(), freqOpPoints.end()),
103  "DVFS: Frequency operation points not in descending order for "\
104  "domain with ID %d\n", _domainID);
105 
106  fatal_if(_perfLevel >= freqOpPoints.size(), "DVFS: Initial DVFS point %d "\
107  "is outside of list for Domain ID: %d\n", _perfLevel, _domainID);
108 
110 
111  vdom->registerSrcClockDom(this);
112 }
113 
114 void
116 {
117  if (clock_period == 0) {
118  fatal("%s has a clock period of zero\n", name());
119  }
120 
121  // Align all members to the current tick
122  for (auto m = members.begin(); m != members.end(); ++m) {
123  (*m)->updateClockPeriod();
124  }
125 
126  _clockPeriod = clock_period;
127 
129  "Setting clock period to %d ticks for source clock %s\n",
130  _clockPeriod, name());
131 
132  // inform any derived clocks they need to updated their period
133  for (auto c = children.begin(); c != children.end(); ++c) {
134  (*c)->updateClockPeriod();
135  }
136 }
137 
138 void
140 {
141  assert(validPerfLevel(perf_level));
142 
143  if (perf_level == _perfLevel) {
144  // Silently ignore identical overwrites
145  return;
146  }
147 
148  DPRINTF(ClockDomain, "DVFS: Switching performance level of domain %s "\
149  "(id: %d) from %d to %d\n", name(), domainID(), _perfLevel,
150  perf_level);
151 
152  _perfLevel = perf_level;
153 
155 }
156 
158 {
159  // Signal the voltage domain that we have changed our perf level so that the
160  // voltage domain can recompute its performance level
162 
163  // Integrated switching of the actual clock value, too
165 }
166 
167 void
169 {
172 }
173 
174 void
176 {
179 }
180 
181 void
183 {
184  // Perform proper clock update when all related components have been
185  // created (i.e. after unserialization / object creation)
187 }
188 
190  ClockDomain(p, p.clk_domain->voltageDomain()),
191  parent(*p.clk_domain),
192  clockDivider(p.clk_divider)
193 {
194  // Ensure that clock divider setting works as frequency divider and never
195  // work as frequency multiplier
196  if (clockDivider < 1) {
197  fatal("Clock divider param cannot be less than 1");
198  }
199 
200  // let the parent keep track of this derived domain so that it can
201  // propagate changes
202  parent.addDerivedDomain(this);
203 
204  // update our clock period based on the parents clock
206 }
207 
208 void
210 {
211  // Align all members to the current tick
212  for (auto m = members.begin(); m != members.end(); ++m) {
213  (*m)->updateClockPeriod();
214  }
215 
216  // recalculate the clock period, relying on the fact that changes
217  // propagate downwards in the tree
219 
221  "Setting clock period to %d ticks for derived clock %s\n",
222  _clockPeriod, name());
223 
224  // inform any derived clocks
225  for (auto c = children.begin(); c != children.end(); ++c) {
226  (*c)->updateClockPeriod();
227  }
228 }
229 
230 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::ClockDomain::members
std::vector< Clocked * > members
Pointers to members of this clock domain, so that when the clock period changes, we can update each m...
Definition: clock_domain.hh:96
gem5::ClockDomain::ClockDomainStats::ClockDomainStats
ClockDomainStats(ClockDomain &cd)
Definition: clock_domain.cc:57
gem5::SrcClockDomain::SrcClockDomain
SrcClockDomain(const Params &p)
Definition: clock_domain.cc:80
gem5::ClockDomain::voltageDomain
VoltageDomain * voltageDomain() const
Get the voltage domain.
Definition: clock_domain.hh:127
gem5::SimObject::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: sim_object.hh:316
gem5::SrcClockDomain::startup
void startup() override
startup() is the final initialization call before simulation.
Definition: clock_domain.cc:182
gem5::VoltageDomain::registerSrcClockDom
void registerSrcClockDom(SrcClockDomain *src_clock_dom)
Register a SrcClockDomain with this voltage domain.
Definition: voltage_domain.hh:105
voltage_domain.hh
gem5::SrcClockDomain::domainID
uint32_t domainID() const
Definition: clock_domain.hh:189
serialize.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
gem5::ClockDomain::addDerivedDomain
void addDerivedDomain(DerivedClockDomain *clock_domain)
Add a derived domain.
Definition: clock_domain.hh:142
gem5::SrcClockDomain::_domainID
const uint32_t _domainID
Software recognizable id number for the domain, should be unique for each domain.
Definition: clock_domain.hh:258
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::SrcClockDomain::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: clock_domain.cc:175
gem5::SrcClockDomain::validPerfLevel
bool validPerfLevel(PerfLevel perf_level) const
Checks whether the performance level requested exists in the current domain configuration.
Definition: clock_domain.hh:200
gem5::ClockDomain::ClockDomainStats::clock
statistics::Value clock
Stat to report clock period of clock domain.
Definition: clock_domain.hh:153
gem5::SrcClockDomain::signalPerfLevelUpdate
void signalPerfLevelUpdate()
Inform other components about the changed performance level.
Definition: clock_domain.cc:157
gem5::ClockDomain::Params
ClockDomainParams Params
Definition: clock_domain.hh:100
gem5::DerivedClockDomain::updateClockPeriod
void updateClockPeriod()
Called by the parent clock domain to propagate changes.
Definition: clock_domain.cc:209
gem5::SimObject::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: sim_object.hh:315
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::ClockDomain
The ClockDomain provides clock to group of clocked objects bundled under the same clock domain.
Definition: clock_domain.hh:71
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
ADD_STAT
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition: group.hh:75
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::VoltageDomain::sanitiseVoltages
bool sanitiseVoltages()
Recomputes the highest (fastest, i.e., numerically lowest) requested performance level of all associa...
Definition: voltage_domain.cc:83
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::ClockDomain::stats
gem5::ClockDomain::ClockDomainStats stats
gem5::ArmISA::cd
Bitfield< 32 > cd
Definition: misc_types.hh:251
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::ArmISA::c
Bitfield< 29 > c
Definition: misc_types.hh:53
gem5::ClockDomain::voltage
double voltage() const
Get the current voltage this clock domain operates at.
Definition: clock_domain.cc:75
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
gem5::DerivedClockDomain::DerivedClockDomain
DerivedClockDomain(const Params &p)
Definition: clock_domain.cc:189
gem5::SrcClockDomain::_perfLevel
PerfLevel _perfLevel
Current performance level the domain is set to.
Definition: clock_domain.hh:266
gem5::SrcClockDomain::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: clock_domain.cc:168
clock_domain.hh
gem5::VoltageDomain::voltage
double voltage() const
Get the current voltage.
Definition: voltage_domain.hh:70
gem5::ArmISA::m
Bitfield< 0 > m
Definition: misc_types.hh:394
gem5::SrcClockDomain::perfLevel
PerfLevel perfLevel() const
Definition: clock_domain.hh:214
gem5::ClockDomain::_clockPeriod
Tick _clockPeriod
Pre-computed clock period in ticks.
Definition: clock_domain.hh:79
clocked_object.hh
gem5::SrcClockDomain::PerfLevel
uint32_t PerfLevel
Definition: clock_domain.hh:191
logging.hh
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5::statistics::ValueBase::scalar
Derived & scalar(T &value)
Definition: statistics.hh:729
gem5::DerivedClockDomain::clockDivider
const uint64_t clockDivider
Local clock divider of the domain.
Definition: clock_domain.hh:301
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
trace.hh
gem5::VoltageDomain
A VoltageDomain is used to group clock domains that operate under the same voltage.
Definition: voltage_domain.hh:56
gem5::ClockDomain::ClockDomain
ClockDomain(const Params &p, VoltageDomain *voltage_domain)
Definition: clock_domain.cc:66
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:225
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SrcClockDomain::freqOpPoints
const std::vector< Tick > freqOpPoints
List of possible frequency operational points, should be in descending order An empty list correspond...
Definition: clock_domain.hh:252
gem5::VoltageDomain::numVoltages
uint32_t numVoltages() const
Definition: voltage_domain.hh:87
gem5::ClockDomain::clockPeriod
Tick clockPeriod() const
Get the clock period.
Definition: clock_domain.hh:108
gem5::ClockDomain::_voltageDomain
VoltageDomain * _voltageDomain
Voltage domain this clock domain belongs to.
Definition: clock_domain.hh:84
gem5::ClockDomain::children
std::vector< DerivedClockDomain * > children
Pointers to potential derived clock domains so we can propagate changes.
Definition: clock_domain.hh:90
gem5::DerivedClockDomain::parent
ClockDomain & parent
Reference to the parent clock domain this clock domain derives its clock period from.
Definition: clock_domain.hh:296
gem5::SrcClockDomain::clkPeriodAtPerfLevel
Tick clkPeriodAtPerfLevel() const
Definition: clock_domain.hh:227

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