gem5
v24.0.0.0
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arch
x86
bios
e820.hh
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/*
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* Copyright (c) 2008 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_X86_BIOS_E820_HH__
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#define __ARCH_X86_BIOS_E820_HH__
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#include <vector>
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#include "
base/types.hh
"
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#include "params/X86E820Entry.hh"
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#include "params/X86E820Table.hh"
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#include "
sim/sim_object.hh
"
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namespace
gem5
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{
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class
PortProxy;
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namespace
X86ISA
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{
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class
E820Entry
:
public
SimObject
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{
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public
:
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Addr
addr
;
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Addr
size
;
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uint32_t
type
;
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public
:
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typedef
X86E820EntryParams
Params
;
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E820Entry
(
const
Params
&
p
) :
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SimObject
(
p
),
addr
(
p
.
addr
),
size
(
p
.
size
),
type
(
p
.range_type)
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{}
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};
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class
E820Table
:
public
SimObject
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{
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public
:
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std::vector<E820Entry *>
entries
;
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public
:
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typedef
X86E820TableParams
Params
;
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E820Table
(
const
Params
&
p
) :
SimObject
(
p
),
entries
(
p
.
entries
)
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{}
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void
writeTo
(
PortProxy
& proxy,
Addr
countAddr,
Addr
addr
);
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};
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}
// namespace X86ISA
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}
// namespace gem5
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#endif
// __ARCH_X86_BIOS_E820_HH__
types.hh
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
gem5::PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition
port_proxy.hh:87
gem5::SimObject
Abstract superclass for simulation objects.
Definition
sim_object.hh:148
gem5::X86ISA::E820Entry
Definition
e820.hh:56
gem5::X86ISA::E820Entry::addr
Addr addr
Definition
e820.hh:58
gem5::X86ISA::E820Entry::type
uint32_t type
Definition
e820.hh:60
gem5::X86ISA::E820Entry::Params
X86E820EntryParams Params
Definition
e820.hh:63
gem5::X86ISA::E820Entry::size
Addr size
Definition
e820.hh:59
gem5::X86ISA::E820Entry::E820Entry
E820Entry(const Params &p)
Definition
e820.hh:64
gem5::X86ISA::E820Table
Definition
e820.hh:70
gem5::X86ISA::E820Table::E820Table
E820Table(const Params &p)
Definition
e820.hh:76
gem5::X86ISA::E820Table::entries
std::vector< E820Entry * > entries
Definition
e820.hh:72
gem5::X86ISA::E820Table::Params
X86E820TableParams Params
Definition
e820.hh:75
gem5::X86ISA::E820Table::writeTo
void writeTo(PortProxy &proxy, Addr countAddr, Addr addr)
Definition
e820.cc:56
std::vector
STL vector class.
Definition
stl.hh:37
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition
types.hh:84
gem5::X86ISA::p
Bitfield< 0 > p
Definition
pagetable.hh:151
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
sim_object.hh
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