flash_device.cc File Reference

This simplistic flash model is designed to model managed SLC NAND flash. More...

#include "dev/arm/flash_device.hh"
#include "base/trace.hh"
#include "debug/Drain.hh"

Go to the source code of this file.

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	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.

Detailed Description

This simplistic flash model is designed to model managed SLC NAND flash.

This device will need an interface module (such as NVMe or UFS); Note that this model only calculates the delay and does not perform the actual transaction.

To access the memory, use either readMemory or writeMemory. This will schedule an event at the tick where the action will finish. If a callback has been given as argument then that function will be called on completion of that event. Note that this does not guarantee that there are no other actions pending in the flash device.

IMPORTANT: number of planes should be a power of 2.

Definition in file flash_device.cc.