gem5  v21.1.0.2
malta.hh
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28 
35 #ifndef __DEV_MALTA_HH__
36 #define __DEV_MALTA_HH__
37 
38 #include "dev/platform.hh"
39 #include "params/Malta.hh"
40 
41 namespace gem5
42 {
43 
44 class MaltaCChip;
45 class MaltaIO;
46 
54 class Malta : public Platform
55 {
56  public:
58  static const int Max_CPUs = 64;
59 
62 
68 
71 
72  public:
73  typedef MaltaParams Params;
74  Malta(const Params &p);
75 
79  void postConsoleInt() override;
80 
84  void clearConsoleInt() override;
85 
89  void postPciInt(int line) override;
90 
94  void clearPciInt(int line) override;
95 
96  void serialize(CheckpointOut &cp) const override;
97  void unserialize(CheckpointIn &cp) override;
98 };
99 
100 } // namespace gem5
101 
102 #endif // __DEV_MALTA_HH__
gem5::scmi::Platform
Definition: scmi_platform.hh:264
gem5::Malta
Top level class for Malta Chipset emulation.
Definition: malta.hh:54
gem5::Malta::postConsoleInt
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: malta.cc:51
gem5::Malta::cchip
MaltaCChip * cchip
Pointer to the Malta CChip.
Definition: malta.hh:67
gem5::Malta::clearPciInt
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: malta.cc:71
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::MaltaCChip
Malta CChip CSR Emulation.
Definition: malta_cchip.hh:47
gem5::Malta::postPciInt
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: malta.cc:65
gem5::Malta::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: malta.cc:83
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Malta::io
MaltaIO * io
Pointer to the MaltaIO device which has the RTC.
Definition: malta.hh:61
gem5::Malta::ipi_pending
int ipi_pending[Malta::Max_CPUs]
Definition: malta.hh:70
gem5::Malta::Malta
Malta(const Params &p)
Definition: malta.cc:43
gem5::Malta::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: malta.cc:77
gem5::Malta::Max_CPUs
static const int Max_CPUs
Max number of CPUs in a Malta.
Definition: malta.hh:58
platform.hh
gem5::Malta::Params
MaltaParams Params
Definition: malta.hh:73
gem5::Malta::clearConsoleInt
void clearConsoleInt() override
Clear a posted CPU interrupt (id=55)
Definition: malta.cc:58
gem5::Malta::intr_sum_type
int intr_sum_type[Malta::Max_CPUs]
Definition: malta.hh:69
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::MaltaIO
Malta I/O device is a catch all for all the south bridge stuff we care to implement.
Definition: malta_io.hh:51

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