gem5 v24.0.0.0
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malta_cchip.hh
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1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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27 */
28
33#ifndef __MALTA_CCHIP_HH__
34#define __MALTA_CCHIP_HH__
35
36#include "dev/mips/malta.hh"
37#include "dev/io_device.hh"
38#include "params/MaltaCChip.hh"
39
40namespace gem5
41{
42
48{
49 protected:
56
61 //uint64_t dim[Malta::Max_CPUs];
62
67 //uint64_t dir[Malta::Max_CPUs];
68
73 //uint64_t drir;
74
76 //uint64_t ipint;
77
79 //uint64_t itint;
80
81 public:
82 using Params = MaltaCChipParams;
83
89 MaltaCChip(const Params &p);
90
91 Tick read(PacketPtr pkt) override;
92
93 Tick write(PacketPtr pkt) override;
94
98 void postRTC();
99
104 void postIntr(uint32_t interrupt);
105
110 void clearIntr(uint32_t interrupt);
111
116 void clearIPI(uint64_t ipintr);
117
122 void clearITI(uint64_t itintr);
123
128 void reqIPI(uint64_t ipreq);
129
130 void serialize(CheckpointOut &cp) const override;
131 void unserialize(CheckpointIn &cp) override;
132};
133
134} // namespace gem5
135
136#endif // __MALTA_CCHIP_HH__
Malta CChip CSR Emulation.
MaltaCChip(const Params &p)
Initialize the Malta CChip by setting all of the device register to 0.
void clearIntr(uint32_t interrupt)
clear an interrupt previously posted to the CPU.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
MaltaCChipParams Params
The dims are device interrupt mask registers.
void serialize(CheckpointOut &cp) const override
Serialize an object.
void reqIPI(uint64_t ipreq)
request an interrupt be posted to the CPU.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
void clearIPI(uint64_t ipintr)
post an ipi interrupt to the CPU.
void clearITI(uint64_t itintr)
clear a timer interrupt previously posted to the CPU.
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void postIntr(uint32_t interrupt)
post an interrupt to the CPU.
void postRTC()
post an RTC interrupt to the CPU
Malta * malta
pointer to the malta object.
Top level class for Malta Chipset emulation.
Definition malta.hh:55
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Declaration of top level class for the Malta chipset.
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Tick
Tick count type.
Definition types.hh:58

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