gem5  v21.1.0.2
idle_event.hh
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28 
29 #ifndef __ARCH_MIPS_IDLE_EVENT_HH__
30 #define __ARCH_MIPS_IDLE_EVENT_HH__
31 
32 #include "cpu/pc_event.hh"
33 
34 namespace gem5
35 {
36 
37 class IdleStartEvent : public PCEvent
38 {
39  public:
40  IdleStartEvent(PCEventScope *s, const std::string &desc, Addr addr)
41  : PCEvent(s, desc, addr)
42  {}
43  virtual void process(ThreadContext *tc);
44 };
45 
46 } // namespace gem5
47 
48 #endif // __ARCH_MIPS_IDLE_EVENT_HH__
gem5::IdleStartEvent::IdleStartEvent
IdleStartEvent(PCEventScope *s, const std::string &desc, Addr addr)
Definition: idle_event.hh:40
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::IdleStartEvent::process
virtual void process(ThreadContext *tc)
Definition: idle_event.cc:39
gem5::PCEvent
Definition: pc_event.hh:45
gem5::ArmISA::s
Bitfield< 4 > s
Definition: misc_types.hh:561
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
pc_event.hh
gem5::IdleStartEvent
Definition: idle_event.hh:37
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::PCEventScope
Definition: pc_event.hh:67
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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