43#ifndef __DEV_ARM_PL111_HH__
44#define __DEV_ARM_PL111_HH__
53#include "params/Pl111.hh"
64 static const uint64_t
AMBA_ID = 0xb105f00d00141111ULL;
116 Bitfield<1> underflow;
175 class DmaDoneEvent : public
Event
181 DmaDoneEvent(
Pl111 *_obj)
182 :
Event(), obj(*_obj) {}
189 const std::string
name()
const {
190 return obj.
name() +
".DmaDoneEvent";
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
Internal gem5 representation of a frame buffer.
virtual std::string name() const
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Configurable RGB pixel converter.
void dmaDone()
DMA done event.
Bitfield< 13, 12 > lcdvcomp
static const int LcdLpCurr
static const int ClcdCrsrCtrl
Addr curAddr
Frame buffer current address.
EventFunctionWrapper readEvent
DMA framebuffer read event.
static const int ClcdCrsrXY
uint32_t clcdCrsrClip
Cursor clip position register.
Addr startAddr
Frame buffer base address.
ControlReg lcdControl
Control register.
static const int LcdMaxWidth
uint32_t clcdCrsrXY
Cursor XY position register.
static const int LcdTiming3
uint32_t clcdCrsrPalette1
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
uint32_t clcdCrsrPalette0
Cursor palette registers.
void serialize(CheckpointOut &cp) const override
Serialize an object.
EndBitUnion(InterruptReg) BitUnion32(TimingReg0) Bitfield< 7
static const int LcdControl
TimingReg2 lcdTiming2
Clock and signal polarity control register.
TimingReg1 lcdTiming1
Vertical axis panel control register.
Addr maxAddr
Frame buffer max address.
static const int LcdLpBase
static const int LcdMaxHeight
static const int LcdPaletteSize
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
static const int ClcdCrsrConfig
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Tick startTime
Start time for frame buffer dma read.
uint32_t lcdUpbase
Upper panel frame base address register.
static const int maxOutstandingDma
InterruptReg lcdImsc
Interrupt mask set/clear register.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
uint16_t width
Frame buffer width - pixels per line.
static const int ClcdCrsrMis
uint8_t bytesPerPixel
Bytes per pixel.
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
static const int LcdUpBase
void generateReadEvent()
Generate dma framebuffer read event.
static const int LcdTiming2
uint16_t height
Frame buffer height - lines per panel.
EventFunctionWrapper fillFifoEvent
Fill fifo.
TimingReg3 lcdTiming3
Line end control register.
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism.
uint32_t clcdCrsrCtrl
Cursor control register.
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
InterruptReg lcdMis
Masked interrupt status register.
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
static const int LcdUpCurr
uint32_t lcdLpbase
Lower panel frame base address register.
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
static const int ClcdCrsrRis
static const int CrsrImage
void readFramebuffer()
DMA framebuffer read.
Tick pixelClock
Pixel clock.
static const int ClcdCrsrPalette1
uint32_t clcdCrsrConfig
Cursor configuration register.
static const int LcdTiming0
ARM PL111 register map.
VncInput * vnc
VNC server.
static const int LcdTiming1
PixelConverter pixelConverter() const
EventFunctionWrapper intEvent
Wrapper to create an event out of the interrupt.
static const int CrsrImageSize
uint32_t waterMark
DMA FIFO watermark.
static const int LcdPalette
static const int buffer_size
uint32_t dmaPendingNum
Number of pending dma reads.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void generateInterrupt()
Function to generate interrupt.
void startDma()
start the dmas off after power is enabled
static const int ClcdCrsrIcr
BmpWriter bmp
Helper to write out bitmaps.
void fillFifo()
fillFIFO event
static const int ClcdCrsrImsc
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 lcdTiming0
Event wrapper for dmaDone()
OutputStream * pic
Picture of what the current frame buffer looks like.
InterruptReg lcdRis
Raw interrupt status register - const.
static const uint64_t AMBA_ID
static const int ClcdCrsrPalette0
static const int ClcdCrsrClip
void updateVideoParams()
Send updated parameters to the vnc server.
BitUnion8(InterruptReg) Bitfield< 1 > underflow
#define EndBitUnion(name)
This closes off the class and union started by the above macro.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
std::ostream CheckpointOut
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
uint64_t Tick
Tick count type.
const std::string & name()