gem5 v24.0.0.0
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#include <pl111.hh>
Public Types | |
using | Params = Pl111Params |
Public Types inherited from gem5::AmbaDmaDevice | |
typedef AmbaDmaDeviceParams | Params |
Public Types inherited from gem5::DmaDevice | |
typedef DmaDeviceParams | Params |
Public Types inherited from gem5::PioDevice | |
using | Params = PioDeviceParams |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Public Member Functions | |
Pl111 (const Params &p) | |
~Pl111 () | |
Tick | read (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Tick | write (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
AddrRangeList | getAddrRanges () const override |
Determine the address ranges that this device responds to. | |
Public Member Functions inherited from gem5::AmbaDmaDevice | |
AmbaDmaDevice (const Params &p, Addr pio_size=0) | |
Public Member Functions inherited from gem5::DmaDevice | |
DmaDevice (const Params &p) | |
virtual | ~DmaDevice ()=default |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
bool | dmaPending () const |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
Addr | cacheBlockSize () const |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
Public Member Functions inherited from gem5::PioDevice | |
PioDevice (const Params &p) | |
virtual | ~PioDevice () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Types | |
enum | LcdMode { bpp1 = 0 , bpp2 , bpp4 , bpp8 , bpp16 , bpp24 , bpp16m565 , bpp12 } |
Protected Member Functions | |
BitUnion8 (InterruptReg) Bitfield< 1 > underflow | |
EndBitUnion (InterruptReg) BitUnion32(TimingReg0) Bitfield< 7 | |
EndBitUnion (TimingReg0) BitUnion32(TimingReg1) Bitfield< 9 | |
EndBitUnion (TimingReg1) BitUnion32(TimingReg2) Bitfield< 4 | |
EndBitUnion (TimingReg2) BitUnion32(TimingReg3) Bitfield< 6 | |
EndBitUnion (TimingReg3) BitUnion32(ControlReg) Bitfield< 0 > lcden | |
PixelConverter | pixelConverter () const |
void | updateVideoParams () |
Send updated parameters to the vnc server. | |
void | readFramebuffer () |
DMA framebuffer read. | |
void | generateReadEvent () |
Generate dma framebuffer read event. | |
void | generateInterrupt () |
Function to generate interrupt. | |
void | fillFifo () |
fillFIFO event | |
void | startDma () |
start the dmas off after power is enabled | |
void | dmaDone () |
DMA done event. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Protected Member Functions inherited from gem5::AmbaDevice | |
bool | readId (PacketPtr pkt, uint64_t amba_id, Addr pio_addr) |
Protected Attributes | |
Bitfield< 2 > | baseaddr |
Bitfield< 3 > | vcomp |
Bitfield< 4 > | ahbmaster |
ppl | |
Bitfield< 15, 8 > | hsw |
Bitfield< 23, 16 > | hfp |
Bitfield< 31, 24 > | hbp |
lpp | |
Bitfield< 15, 10 > | vsw |
Bitfield< 23, 16 > | vfp |
Bitfield< 31, 24 > | vbp |
pcdlo | |
Bitfield< 5 > | clksel |
Bitfield< 10, 6 > | acb |
Bitfield< 11 > | avs |
Bitfield< 12 > | ihs |
Bitfield< 13 > | ipc |
Bitfield< 14 > | ioe |
Bitfield< 25, 16 > | cpl |
Bitfield< 26 > | bcd |
Bitfield< 31, 27 > | pcdhi |
led | |
Bitfield< 16 > | lee |
Bitfield< 3, 1 > | lcdbpp |
Bitfield< 4 > | lcdbw |
Bitfield< 5 > | lcdtft |
Bitfield< 6 > | lcdmono8 |
Bitfield< 7 > | lcddual |
Bitfield< 8 > | bgr |
Bitfield< 9 > | bebo |
Bitfield< 10 > | bepo |
Bitfield< 11 > | lcdpwr |
Bitfield< 13, 12 > | lcdvcomp |
Bitfield< 16 > | watermark |
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 | lcdTiming0 |
Event wrapper for dmaDone() | |
TimingReg1 | lcdTiming1 |
Vertical axis panel control register. | |
TimingReg2 | lcdTiming2 |
Clock and signal polarity control register. | |
TimingReg3 | lcdTiming3 |
Line end control register. | |
uint32_t | lcdUpbase |
Upper panel frame base address register. | |
uint32_t | lcdLpbase |
Lower panel frame base address register. | |
ControlReg | lcdControl |
Control register. | |
InterruptReg | lcdImsc |
Interrupt mask set/clear register. | |
InterruptReg | lcdRis |
Raw interrupt status register - const. | |
InterruptReg | lcdMis |
Masked interrupt status register. | |
uint32_t | lcdPalette [LcdPaletteSize] |
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per word | |
uint32_t | cursorImage [CrsrImageSize] |
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism. | |
uint32_t | clcdCrsrCtrl |
Cursor control register. | |
uint32_t | clcdCrsrConfig |
Cursor configuration register. | |
uint32_t | clcdCrsrPalette0 |
Cursor palette registers. | |
uint32_t | clcdCrsrPalette1 |
uint32_t | clcdCrsrXY |
Cursor XY position register. | |
uint32_t | clcdCrsrClip |
Cursor clip position register. | |
InterruptReg | clcdCrsrImsc |
Cursor interrupt mask set/clear register. | |
InterruptReg | clcdCrsrIcr |
Cursor interrupt clear register. | |
InterruptReg | clcdCrsrRis |
Cursor raw interrupt status register - const. | |
InterruptReg | clcdCrsrMis |
Cursor masked interrupt status register - const. | |
Tick | pixelClock |
Pixel clock. | |
PixelConverter | converter |
FrameBuffer | fb |
VncInput * | vnc |
VNC server. | |
BmpWriter | bmp |
Helper to write out bitmaps. | |
OutputStream * | pic |
Picture of what the current frame buffer looks like. | |
uint16_t | width |
Frame buffer width - pixels per line. | |
uint16_t | height |
Frame buffer height - lines per panel. | |
uint8_t | bytesPerPixel |
Bytes per pixel. | |
uint8_t * | dmaBuffer |
CLCDC supports up to 1024x768. | |
Tick | startTime |
Start time for frame buffer dma read. | |
Addr | startAddr |
Frame buffer base address. | |
Addr | maxAddr |
Frame buffer max address. | |
Addr | curAddr |
Frame buffer current address. | |
uint32_t | waterMark |
DMA FIFO watermark. | |
uint32_t | dmaPendingNum |
Number of pending dma reads. | |
EventFunctionWrapper | readEvent |
DMA framebuffer read event. | |
EventFunctionWrapper | fillFifoEvent |
Fill fifo. | |
EventFunctionWrapper | intEvent |
Wrapper to create an event out of the interrupt. | |
bool | enableCapture |
std::vector< DmaDoneEvent > | dmaDoneEventAll |
All pre-allocated DMA done events. | |
std::vector< DmaDoneEvent * > | dmaDoneEventFree |
Unused DMA done events that are ready to be scheduled. | |
Protected Attributes inherited from gem5::AmbaDmaDevice | |
uint64_t | ambaId |
Addr | pioAddr |
Addr | pioSize |
Tick | pioDelay |
ArmInterruptPin *const | interrupt |
Protected Attributes inherited from gem5::DmaDevice | |
DmaPort | dmaPort |
Protected Attributes inherited from gem5::PioDevice | |
System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Static Protected Attributes | |
static const uint64_t | AMBA_ID = 0xb105f00d00141111ULL |
static const int | LcdTiming0 = 0x000 |
ARM PL111 register map. | |
static const int | LcdTiming1 = 0x004 |
static const int | LcdTiming2 = 0x008 |
static const int | LcdTiming3 = 0x00C |
static const int | LcdUpBase = 0x010 |
static const int | LcdLpBase = 0x014 |
static const int | LcdControl = 0x018 |
static const int | LcdImsc = 0x01C |
static const int | LcdRis = 0x020 |
static const int | LcdMis = 0x024 |
static const int | LcdIcr = 0x028 |
static const int | LcdUpCurr = 0x02C |
static const int | LcdLpCurr = 0x030 |
static const int | LcdPalette = 0x200 |
static const int | CrsrImage = 0x800 |
static const int | ClcdCrsrCtrl = 0xC00 |
static const int | ClcdCrsrConfig = 0xC04 |
static const int | ClcdCrsrPalette0 = 0xC08 |
static const int | ClcdCrsrPalette1 = 0xC0C |
static const int | ClcdCrsrXY = 0xC10 |
static const int | ClcdCrsrClip = 0xC14 |
static const int | ClcdCrsrImsc = 0xC20 |
static const int | ClcdCrsrIcr = 0xC24 |
static const int | ClcdCrsrRis = 0xC28 |
static const int | ClcdCrsrMis = 0xC2C |
static const int | LcdPaletteSize = 128 |
static const int | CrsrImageSize = 256 |
static const int | LcdMaxWidth = 1024 |
static const int | LcdMaxHeight = 768 |
static const int | dmaSize = 8 |
static const int | maxOutstandingDma = 16 |
static const int | buffer_size = LcdMaxWidth * LcdMaxHeight * sizeof(uint32_t) |
Static Protected Attributes inherited from gem5::AmbaDevice | |
static const int | AMBA_PER_ID0 = 0xFE0 |
static const int | AMBA_PER_ID1 = 0xFE4 |
static const int | AMBA_PER_ID2 = 0xFE8 |
static const int | AMBA_PER_ID3 = 0xFEC |
static const int | AMBA_CEL_ID0 = 0xFF0 |
static const int | AMBA_CEL_ID1 = 0xFF4 |
static const int | AMBA_CEL_ID2 = 0xFF8 |
static const int | AMBA_CEL_ID3 = 0xFFC |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
using gem5::Pl111::Params = Pl111Params |
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gem5::Pl111::Pl111 | ( | const Params & | p | ) |
Definition at line 59 of file pl111.cc.
References readFramebuffer().
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DMA done event.
Definition at line 473 of file pl111.cc.
References bmp, gem5::Clocked::clockEdge(), converter, gem5::FrameBuffer::copyIn(), gem5::OutputDirectory::create(), gem5::csprintf(), curAddr, gem5::curTick(), dmaBuffer, dmaPendingNum, DPRINTF, enableCapture, fb, fillFifoEvent, height, intEvent, lcdControl, lcdRis, lcdTiming2, maxAddr, maxOutstandingDma, gem5::Named::name(), pic, pixelClock, readEvent, gem5::EventManager::schedule(), gem5::Event::scheduled(), gem5::VncInput::setDirty(), gem5::simout, startTime, gem5::OutputStream::stream(), gem5::PioDevice::sys, gem5::Clocked::ticksToCycles(), vnc, warn, waterMark, and gem5::BmpWriter::write().
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fillFIFO event
Definition at line 449 of file pl111.cc.
References curAddr, gem5::DmaPort::dmaAction(), dmaBuffer, dmaDoneEventFree, dmaPendingNum, gem5::DmaDevice::dmaPort, dmaSize, gem5::MipsISA::event, maxAddr, maxOutstandingDma, gem5::MemCmd::ReadReq, startAddr, and gem5::Request::UNCACHEABLE.
Referenced by readFramebuffer().
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Function to generate interrupt.
Definition at line 727 of file pl111.cc.
References DPRINTF, gem5::AmbaDmaDevice::interrupt, lcdImsc, lcdMis, lcdRis, and gem5::ArmInterruptPin::raise().
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Generate dma framebuffer read event.
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Determine the address ranges that this device responds to.
Implements gem5::PioDevice.
Definition at line 740 of file pl111.cc.
References gem5::AmbaDmaDevice::pioAddr, gem5::AmbaDmaDevice::pioSize, and gem5::RangeSize().
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Definition at line 356 of file pl111.cc.
References bpp16m565, bpp24, bytesPerPixel, lcdControl, panic, and gem5::ArmISA::rw.
Referenced by updateVideoParams().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 99 of file pl111.cc.
References AMBA_ID, ClcdCrsrClip, clcdCrsrClip, ClcdCrsrConfig, clcdCrsrConfig, ClcdCrsrCtrl, clcdCrsrCtrl, ClcdCrsrIcr, ClcdCrsrImsc, clcdCrsrImsc, ClcdCrsrMis, clcdCrsrMis, ClcdCrsrPalette0, clcdCrsrPalette0, ClcdCrsrPalette1, clcdCrsrPalette1, ClcdCrsrRis, clcdCrsrRis, ClcdCrsrXY, clcdCrsrXY, CrsrImage, curAddr, cursorImage, data, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::MipsISA::index, LcdControl, lcdControl, LcdIcr, LcdImsc, lcdImsc, LcdLpBase, lcdLpbase, LcdLpCurr, LcdMis, lcdMis, LcdPalette, lcdPalette, LcdRis, lcdRis, LcdTiming0, lcdTiming0, LcdTiming1, lcdTiming1, LcdTiming2, lcdTiming2, LcdTiming3, lcdTiming3, LcdUpBase, lcdUpbase, LcdUpCurr, gem5::Packet::makeAtomicResponse(), panic, gem5::AmbaDmaDevice::pioAddr, gem5::AmbaDmaDevice::pioDelay, gem5::AmbaDmaDevice::pioSize, gem5::AmbaDevice::readId(), and gem5::Packet::setUintX().
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DMA framebuffer read.
Definition at line 426 of file pl111.cc.
References bytesPerPixel, gem5::Clocked::clockEdge(), curAddr, gem5::curTick(), DPRINTF, fillFifo(), height, intEvent, lcdRis, lcdUpbase, maxAddr, gem5::EventManager::schedule(), gem5::Event::scheduled(), startAddr, startTime, and width.
Referenced by Pl111(), and startDma().
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Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::ClockedObject.
Definition at line 524 of file pl111.cc.
References buffer_size, bytesPerPixel, clcdCrsrClip, clcdCrsrConfig, clcdCrsrCtrl, clcdCrsrIcr, clcdCrsrImsc, clcdCrsrMis, clcdCrsrPalette0, clcdCrsrPalette1, clcdCrsrRis, clcdCrsrXY, CrsrImageSize, curAddr, cursorImage, dmaBuffer, dmaDoneEventAll, dmaPendingNum, DPRINTF, fillFifoEvent, height, intEvent, lcdControl, lcdImsc, lcdLpbase, lcdMis, lcdPalette, LcdPaletteSize, lcdRis, lcdTiming0, lcdTiming1, lcdTiming2, lcdTiming3, lcdUpbase, maxAddr, maxOutstandingDma, readEvent, gem5::Event::scheduled(), SERIALIZE_ARRAY, SERIALIZE_CONTAINER, SERIALIZE_SCALAR, startAddr, startTime, waterMark, gem5::Event::when(), width, and gem5::RiscvISA::x.
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start the dmas off after power is enabled
Definition at line 418 of file pl111.cc.
References dmaPendingNum, readEvent, readFramebuffer(), and gem5::Event::scheduled().
Referenced by write().
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::ClockedObject.
Definition at line 614 of file pl111.cc.
References buffer_size, bytesPerPixel, clcdCrsrClip, clcdCrsrConfig, clcdCrsrCtrl, clcdCrsrIcr, clcdCrsrImsc, clcdCrsrMis, clcdCrsrPalette0, clcdCrsrPalette1, clcdCrsrRis, clcdCrsrXY, converter, gem5::FrameBuffer::copyIn(), CrsrImageSize, curAddr, cursorImage, dmaBuffer, dmaDoneEventAll, dmaDoneEventFree, dmaPendingNum, DPRINTF, fb, fillFifoEvent, height, intEvent, lcdControl, lcdImsc, lcdLpbase, lcdMis, lcdPalette, LcdPaletteSize, lcdRis, lcdTiming0, lcdTiming1, lcdTiming2, lcdTiming3, lcdUpbase, maxAddr, maxOutstandingDma, readEvent, gem5::EventManager::schedule(), gem5::VncInput::setDirty(), startAddr, startTime, UNSERIALIZE_ARRAY, UNSERIALIZE_CONTAINER, UNSERIALIZE_SCALAR, updateVideoParams(), vnc, waterMark, width, and gem5::RiscvISA::x.
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Send updated parameters to the vnc server.
Definition at line 398 of file pl111.cc.
References bpp16m565, bpp24, bytesPerPixel, converter, fb, height, lcdControl, pixelConverter(), gem5::FrameBuffer::resize(), gem5::VncInput::setFrameBuffer(), vnc, and width.
Referenced by unserialize(), and write().
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 214 of file pl111.cc.
References ClcdCrsrClip, clcdCrsrClip, ClcdCrsrConfig, clcdCrsrConfig, ClcdCrsrCtrl, clcdCrsrCtrl, ClcdCrsrIcr, clcdCrsrIcr, ClcdCrsrImsc, clcdCrsrImsc, ClcdCrsrMis, ClcdCrsrPalette0, clcdCrsrPalette0, ClcdCrsrPalette1, clcdCrsrPalette1, ClcdCrsrRis, ClcdCrsrXY, clcdCrsrXY, gem5::ArmInterruptPin::clear(), CrsrImage, cursorImage, data, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getLE(), gem5::Packet::getSize(), gem5::Packet::getUintX(), height, gem5::MipsISA::index, gem5::AmbaDmaDevice::interrupt, LcdControl, lcdControl, LcdIcr, LcdImsc, lcdImsc, LcdLpBase, lcdLpbase, LcdLpCurr, LcdMis, lcdMis, LcdPalette, lcdPalette, LcdRis, lcdRis, LcdTiming0, lcdTiming0, LcdTiming1, lcdTiming1, LcdTiming2, lcdTiming2, LcdTiming3, lcdTiming3, LcdUpBase, lcdUpbase, LcdUpCurr, gem5::Packet::makeAtomicResponse(), panic, gem5::AmbaDmaDevice::pioAddr, gem5::AmbaDmaDevice::pioDelay, gem5::AmbaDmaDevice::pioSize, startDma(), updateVideoParams(), warn_once, waterMark, and width.
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Definition at line 101 of file pl111.hh.
Referenced by serialize(), and unserialize().
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Bytes per pixel.
Definition at line 282 of file pl111.hh.
Referenced by pixelConverter(), readFramebuffer(), serialize(), unserialize(), and updateVideoParams().
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Cursor clip position register.
Definition at line 246 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Cursor configuration register.
Definition at line 236 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Cursor control register.
Definition at line 233 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Cursor interrupt clear register.
Definition at line 252 of file pl111.hh.
Referenced by serialize(), unserialize(), and write().
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Cursor interrupt mask set/clear register.
Definition at line 249 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Cursor masked interrupt status register - const.
Definition at line 258 of file pl111.hh.
Referenced by read(), serialize(), and unserialize().
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Cursor palette registers.
Definition at line 239 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Definition at line 240 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Cursor raw interrupt status register - const.
Definition at line 255 of file pl111.hh.
Referenced by read(), serialize(), and unserialize().
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Cursor XY position register.
Definition at line 243 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Definition at line 263 of file pl111.hh.
Referenced by dmaDone(), unserialize(), and updateVideoParams().
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Definition at line 93 of file pl111.hh.
Referenced by serialize(), and unserialize().
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Frame buffer current address.
Definition at line 297 of file pl111.hh.
Referenced by dmaDone(), fillFifo(), read(), readFramebuffer(), serialize(), and unserialize().
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Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism.
Definition at line 230 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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CLCDC supports up to 1024x768.
Definition at line 285 of file pl111.hh.
Referenced by dmaDone(), fillFifo(), serialize(), unserialize(), and ~Pl111().
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All pre-allocated DMA done events.
The PL111 model preallocates maxOutstandingDma number of DmaDoneEvents to avoid having to heap allocate every single event when it is needed. In order to keep track of which events are in flight and which are ready to be used, we use two different vectors. dmaDoneEventAll contains all DmaDoneEvents that the object may use, while dmaDoneEventFree contains a list of currently unused events. When an event needs to be scheduled, the last element of the dmaDoneEventFree is used and removed from the list. When an event fires, it is added to the end of the dmaEventFreeList. dmaDoneEventAll is never used except for in initialization and serialization.
Definition at line 351 of file pl111.hh.
Referenced by serialize(), and unserialize().
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Unused DMA done events that are ready to be scheduled.
Definition at line 354 of file pl111.hh.
Referenced by fillFifo(), and unserialize().
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Number of pending dma reads.
Definition at line 303 of file pl111.hh.
Referenced by dmaDone(), fillFifo(), serialize(), startDma(), and unserialize().
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Definition at line 98 of file pl111.hh.
Referenced by fillFifo().
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Definition at line 264 of file pl111.hh.
Referenced by dmaDone(), unserialize(), and updateVideoParams().
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Fill fifo.
Definition at line 332 of file pl111.hh.
Referenced by dmaDone(), serialize(), and unserialize().
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Frame buffer height - lines per panel.
Definition at line 279 of file pl111.hh.
Referenced by dmaDone(), readFramebuffer(), serialize(), unserialize(), updateVideoParams(), and write().
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Wrapper to create an event out of the interrupt.
Definition at line 358 of file pl111.hh.
Referenced by dmaDone(), readFramebuffer(), serialize(), and unserialize().
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Control register.
Definition at line 213 of file pl111.hh.
Referenced by dmaDone(), pixelConverter(), read(), serialize(), unserialize(), updateVideoParams(), and write().
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Interrupt mask set/clear register.
Definition at line 216 of file pl111.hh.
Referenced by generateInterrupt(), read(), serialize(), unserialize(), and write().
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Lower panel frame base address register.
Definition at line 210 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Masked interrupt status register.
Definition at line 222 of file pl111.hh.
Referenced by generateInterrupt(), read(), serialize(), unserialize(), and write().
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256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per word
Definition at line 226 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Definition at line 92 of file pl111.hh.
Referenced by serialize(), and unserialize().
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Raw interrupt status register - const.
Definition at line 219 of file pl111.hh.
Referenced by dmaDone(), generateInterrupt(), read(), readFramebuffer(), serialize(), unserialize(), and write().
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This event calls pushes its this pointer onto the freeDoneEvent vector and calls dmaDone() when triggered. Horizontal axis panel control register
Definition at line 195 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Vertical axis panel control register.
Definition at line 198 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Clock and signal polarity control register.
Definition at line 201 of file pl111.hh.
Referenced by dmaDone(), read(), serialize(), unserialize(), and write().
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Line end control register.
Definition at line 204 of file pl111.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Upper panel frame base address register.
Definition at line 207 of file pl111.hh.
Referenced by read(), readFramebuffer(), serialize(), unserialize(), and write().
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Frame buffer max address.
Definition at line 294 of file pl111.hh.
Referenced by dmaDone(), fillFifo(), readFramebuffer(), serialize(), and unserialize().
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Definition at line 99 of file pl111.hh.
Referenced by dmaDone(), fillFifo(), serialize(), and unserialize().
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DMA framebuffer read event.
Definition at line 329 of file pl111.hh.
Referenced by dmaDone(), serialize(), startDma(), and unserialize().
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Frame buffer base address.
Definition at line 291 of file pl111.hh.
Referenced by fillFifo(), readFramebuffer(), serialize(), and unserialize().
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Start time for frame buffer dma read.
Definition at line 288 of file pl111.hh.
Referenced by dmaDone(), readFramebuffer(), serialize(), and unserialize().
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VNC server.
Definition at line 267 of file pl111.hh.
Referenced by dmaDone(), unserialize(), and updateVideoParams().
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DMA FIFO watermark.
Definition at line 300 of file pl111.hh.
Referenced by dmaDone(), serialize(), unserialize(), and write().
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Frame buffer width - pixels per line.
Definition at line 276 of file pl111.hh.
Referenced by readFramebuffer(), serialize(), unserialize(), updateVideoParams(), and write().