gem5  v22.1.0.0
float.hh
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28 
29 #ifndef __ARCH_POWER_REGS_FLOAT_HH__
30 #define __ARCH_POWER_REGS_FLOAT_HH__
31 
32 #include "cpu/reg_class.hh"
33 #include "debug/FloatRegs.hh"
34 
35 namespace gem5
36 {
37 
38 namespace PowerISA
39 {
40 
41 namespace float_reg
42 {
43 
44 const int NumArchRegs = 32;
45 const int NumRegs = NumArchRegs;
46 
47 } // namespace float_reg
48 
50  float_reg::NumRegs, debug::FloatRegs);
51 
52 } // namespace PowerISA
53 } // namespace gem5
54 
55 #endif // __ARCH_POWER_REGS_FLOAT_HH__
const int NumArchRegs
Definition: float.hh:44
constexpr RegClass floatRegClass(FloatRegClass, FloatRegClassName, float_reg::NumRegs, debug::FloatRegs)
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
@ FloatRegClass
Floating-point register.
Definition: reg_class.hh:61
constexpr char FloatRegClassName[]
Definition: reg_class.hh:74

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