gem5  v21.1.0.2
float.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2007 The Hewlett-Packard Development Company
3  * All rights reserved.
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef __ARCH_X86_FLOATREGS_HH__
39 #define __ARCH_X86_FLOATREGS_HH__
40 
41 #include "arch/x86/x86_traits.hh"
42 #include "base/bitunion.hh"
43 
44 namespace gem5
45 {
46 
47 namespace X86ISA
48 {
50  {
51  // MMX/X87 registers
62 
71 
105 
115 
117  };
118 
119  static inline FloatRegIndex
121  {
123  }
124 
125  static inline FloatRegIndex
127  {
129  }
130 
131  static inline FloatRegIndex
133  {
134  return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index);
135  }
136 
137  static inline FloatRegIndex
139  {
140  return (FloatRegIndex)(FLOATREG_XMM_BASE + 2 * index + 1);
141  }
142 
143  static inline FloatRegIndex
145  {
147  }
148 
149  static inline FloatRegIndex
151  {
152  return FLOATREG_FPR((top + index + 8) % 8);
153  }
154 
155  // Each 128 bit xmm register is broken into two effective 64 bit registers.
156  // Add 8 for the indices that are mapped over the fp stack
157  const int NumFloatRegs =
159 
160 } // namespace X86ISA
161 } // namespace gem5
162 
163 #endif // __ARCH_X86_FLOATREGS_HH__
gem5::X86ISA::FLOATREG_MMX5
@ FLOATREG_MMX5
Definition: float.hh:59
gem5::X86ISA::FLOATREG_XMM3_LOW
@ FLOATREG_XMM3_LOW
Definition: float.hh:79
x86_traits.hh
gem5::X86ISA::FLOATREG_FPR_BASE
@ FLOATREG_FPR_BASE
Definition: float.hh:53
gem5::X86ISA::FLOATREG_XMM9_LOW
@ FLOATREG_XMM9_LOW
Definition: float.hh:91
gem5::X86ISA::FLOATREG_MICROFP0
@ FLOATREG_MICROFP0
Definition: float.hh:107
gem5::X86ISA::FLOATREG_XMM5_HIGH
@ FLOATREG_XMM5_HIGH
Definition: float.hh:84
gem5::X86ISA::FLOATREG_XMM5_LOW
@ FLOATREG_XMM5_LOW
Definition: float.hh:83
gem5::X86ISA::FLOATREG_MICROFP1
@ FLOATREG_MICROFP1
Definition: float.hh:108
gem5::X86ISA::FLOATREG_MICROFP3
@ FLOATREG_MICROFP3
Definition: float.hh:110
gem5::X86ISA::FLOATREG_MICROFP2
@ FLOATREG_MICROFP2
Definition: float.hh:109
gem5::X86ISA::FLOATREG_XMM13_HIGH
@ FLOATREG_XMM13_HIGH
Definition: float.hh:100
gem5::X86ISA::FLOATREG_MMX
static FloatRegIndex FLOATREG_MMX(int index)
Definition: float.hh:120
gem5::X86ISA::FLOATREG_XMM12_HIGH
@ FLOATREG_XMM12_HIGH
Definition: float.hh:98
gem5::X86ISA::FLOATREG_XMM2_HIGH
@ FLOATREG_XMM2_HIGH
Definition: float.hh:78
gem5::X86ISA::FLOATREG_XMM12_LOW
@ FLOATREG_XMM12_LOW
Definition: float.hh:97
gem5::X86ISA::FLOATREG_XMM0_HIGH
@ FLOATREG_XMM0_HIGH
Definition: float.hh:74
gem5::X86ISA::FLOATREG_MICROFP
static FloatRegIndex FLOATREG_MICROFP(int index)
Definition: float.hh:144
gem5::X86ISA::FLOATREG_XMM11_HIGH
@ FLOATREG_XMM11_HIGH
Definition: float.hh:96
gem5::X86ISA::FLOATREG_MMX3
@ FLOATREG_MMX3
Definition: float.hh:57
gem5::X86ISA::FLOATREG_FPR6
@ FLOATREG_FPR6
Definition: float.hh:69
top
Definition: test.h:61
gem5::X86ISA::FLOATREG_MICROFP4
@ FLOATREG_MICROFP4
Definition: float.hh:111
gem5::X86ISA::FLOATREG_XMM_LOW
static FloatRegIndex FLOATREG_XMM_LOW(int index)
Definition: float.hh:132
gem5::X86ISA::FLOATREG_XMM8_HIGH
@ FLOATREG_XMM8_HIGH
Definition: float.hh:90
gem5::X86ISA::FLOATREG_XMM9_HIGH
@ FLOATREG_XMM9_HIGH
Definition: float.hh:92
gem5::X86ISA::FLOATREG_FPR5
@ FLOATREG_FPR5
Definition: float.hh:68
gem5::X86ISA::FLOATREG_XMM6_LOW
@ FLOATREG_XMM6_LOW
Definition: float.hh:85
gem5::X86ISA::FLOATREG_XMM0_LOW
@ FLOATREG_XMM0_LOW
Definition: float.hh:73
gem5::X86ISA::FLOATREG_XMM15_HIGH
@ FLOATREG_XMM15_HIGH
Definition: float.hh:104
gem5::X86ISA::FLOATREG_MMX0
@ FLOATREG_MMX0
Definition: float.hh:54
gem5::X86ISA::FLOATREG_MICROFP7
@ FLOATREG_MICROFP7
Definition: float.hh:114
gem5::X86ISA::FLOATREG_XMM15_LOW
@ FLOATREG_XMM15_LOW
Definition: float.hh:103
gem5::X86ISA::FLOATREG_XMM8_LOW
@ FLOATREG_XMM8_LOW
Definition: float.hh:89
gem5::X86ISA::FLOATREG_MICROFP5
@ FLOATREG_MICROFP5
Definition: float.hh:112
bitunion.hh
gem5::X86ISA::NumXMMRegs
const int NumXMMRegs
Definition: x86_traits.hh:53
gem5::X86ISA::NumMMXRegs
const int NumMMXRegs
Definition: x86_traits.hh:52
gem5::X86ISA::FLOATREG_FPR3
@ FLOATREG_FPR3
Definition: float.hh:66
gem5::X86ISA::FLOATREG_XMM_HIGH
static FloatRegIndex FLOATREG_XMM_HIGH(int index)
Definition: float.hh:138
gem5::X86ISA::FLOATREG_XMM7_HIGH
@ FLOATREG_XMM7_HIGH
Definition: float.hh:88
gem5::X86ISA::FLOATREG_FPR0
@ FLOATREG_FPR0
Definition: float.hh:63
gem5::X86ISA::NumFloatRegs
const int NumFloatRegs
Definition: float.hh:157
gem5::X86ISA::FLOATREG_MMX6
@ FLOATREG_MMX6
Definition: float.hh:60
gem5::X86ISA::FLOATREG_XMM1_LOW
@ FLOATREG_XMM1_LOW
Definition: float.hh:75
gem5::X86ISA::FLOATREG_XMM4_HIGH
@ FLOATREG_XMM4_HIGH
Definition: float.hh:82
gem5::X86ISA::FLOATREG_XMM14_LOW
@ FLOATREG_XMM14_LOW
Definition: float.hh:101
gem5::X86ISA::FLOATREG_MMX7
@ FLOATREG_MMX7
Definition: float.hh:61
gem5::X86ISA::FLOATREG_FPR
static FloatRegIndex FLOATREG_FPR(int index)
Definition: float.hh:126
gem5::X86ISA::FLOATREG_MMX2
@ FLOATREG_MMX2
Definition: float.hh:56
gem5::X86ISA::FLOATREG_FPR7
@ FLOATREG_FPR7
Definition: float.hh:70
gem5::X86ISA::FLOATREG_XMM11_LOW
@ FLOATREG_XMM11_LOW
Definition: float.hh:95
gem5::X86ISA::FLOATREG_XMM1_HIGH
@ FLOATREG_XMM1_HIGH
Definition: float.hh:76
gem5::X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:98
gem5::X86ISA::FloatRegIndex
FloatRegIndex
Definition: float.hh:49
gem5::X86ISA::FLOATREG_STACK
static FloatRegIndex FLOATREG_STACK(int index, int top)
Definition: float.hh:150
gem5::X86ISA::FLOATREG_XMM13_LOW
@ FLOATREG_XMM13_LOW
Definition: float.hh:99
gem5::X86ISA::FLOATREG_XMM6_HIGH
@ FLOATREG_XMM6_HIGH
Definition: float.hh:86
gem5::X86ISA::FLOATREG_MICROFP_BASE
@ FLOATREG_MICROFP_BASE
Definition: float.hh:106
gem5::X86ISA::FLOATREG_MICROFP6
@ FLOATREG_MICROFP6
Definition: float.hh:113
gem5::X86ISA::FLOATREG_XMM3_HIGH
@ FLOATREG_XMM3_HIGH
Definition: float.hh:80
gem5::X86ISA::FLOATREG_FPR1
@ FLOATREG_FPR1
Definition: float.hh:64
gem5::X86ISA::FLOATREG_MMX4
@ FLOATREG_MMX4
Definition: float.hh:58
gem5::X86ISA::FLOATREG_XMM7_LOW
@ FLOATREG_XMM7_LOW
Definition: float.hh:87
gem5::X86ISA::NUM_FLOATREGS
@ NUM_FLOATREGS
Definition: float.hh:116
gem5::X86ISA::FLOATREG_MMX_BASE
@ FLOATREG_MMX_BASE
Definition: float.hh:52
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::X86ISA::FLOATREG_XMM2_LOW
@ FLOATREG_XMM2_LOW
Definition: float.hh:77
gem5::X86ISA::FLOATREG_XMM_BASE
@ FLOATREG_XMM_BASE
Definition: float.hh:72
gem5::X86ISA::FLOATREG_XMM10_LOW
@ FLOATREG_XMM10_LOW
Definition: float.hh:93
gem5::X86ISA::FLOATREG_XMM10_HIGH
@ FLOATREG_XMM10_HIGH
Definition: float.hh:94
gem5::X86ISA::FLOATREG_FPR2
@ FLOATREG_FPR2
Definition: float.hh:65
gem5::X86ISA::FLOATREG_XMM4_LOW
@ FLOATREG_XMM4_LOW
Definition: float.hh:81
gem5::X86ISA::FLOATREG_MMX1
@ FLOATREG_MMX1
Definition: float.hh:55
gem5::X86ISA::FLOATREG_FPR4
@ FLOATREG_FPR4
Definition: float.hh:67
gem5::X86ISA::FLOATREG_XMM14_HIGH
@ FLOATREG_XMM14_HIGH
Definition: float.hh:102
gem5::X86ISA::NumMicroFpRegs
const int NumMicroFpRegs
Definition: x86_traits.hh:54

Generated on Tue Sep 21 2021 12:24:51 for gem5 by doxygen 1.8.17