reg_class.hh File Reference

#include <cstddef>
#include <iterator>
#include <string>
#include "base/cprintf.hh"
#include "base/debug.hh"
#include "base/intmath.hh"
#include "base/types.hh"
#include "debug/InvalidReg.hh"

Go to the source code of this file.

Classes
class	gem5::RegId
	Register ID: describe an architectural register with its class and index. More...
class	gem5::RegClassOps
class	gem5::RegClass
class	gem5::RegClassIterator
class	gem5::TypedRegClassOps< ValueType >
class	gem5::VecElemRegClassOps< ValueType >
class	gem5::PhysRegId
	Physical register ID. More...
struct	std::hash< gem5::RegId >

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	std
	Overload hash function for BasicBlockRange type.

Typedefs
using	gem5::PhysRegIdPtr = PhysRegId *

Enumerations
enum	gem5::RegClassType {   gem5::IntRegClass , gem5::FloatRegClass , gem5::VecRegClass , gem5::VecElemClass ,   gem5::VecPredRegClass , gem5::CCRegClass , gem5::MiscRegClass , gem5::InvalidRegClass = -1 }
	Enumerate the classes of registers. More...

Functions
constexpr RegClass	gem5::invalidRegClass (InvalidRegClass, "invalid", 0, debug::InvalidReg)
std::ostream &	gem5::operator<< (std::ostream &os, const RegId &rid)

Variables
constexpr char	gem5::IntRegClassName [] = "integer"
constexpr char	gem5::FloatRegClassName [] = "floating_point"
constexpr char	gem5::VecRegClassName [] = "vector"
constexpr char	gem5::VecElemClassName [] = "vector_element"
constexpr char	gem5::VecPredRegClassName [] = "vector_predicate"
constexpr char	gem5::CCRegClassName [] = "condition_code"
constexpr char	gem5::MiscRegClassName [] = "miscellaneous"