41 #ifndef __CPU__REG_CLASS_HH__
42 #define __CPU__REG_CLASS_HH__
52 #include "debug/InvalidReg.hh"
97 friend struct std::hash<
RegId>;
101 inline constexpr
RegId();
121 return !(*
this==that);
156 inline constexpr
bool isFlat()
const;
171 virtual std::string
valString(
const void *
val,
size_t size)
const;
180 class RegClassIterator;
211 reg_class.
_flat =
false;
219 reg_class.
_ops = &new_ops;
223 template <
class RegType>
327 return id == other.
id;
333 return id != other.
id;
352 return RegId(*
this, idx);
355 template <
typename ValueType>
362 assert(size ==
sizeof(ValueType));
367 template <
typename ValueType>
383 return csprintf(
"v%d[%d]", reg_idx, elem_idx);
462 pinned = (numWrites != 0);
500 const size_t index =
static_cast<size_t>(reg_id.
index());
501 const size_t class_num =
static_cast<size_t>(reg_id.
classValue());
503 const size_t shifted_class_num =
508 const size_t concatenated_hash =
index | shifted_class_num;
514 "sizeof(RegIndex) should be less than sizeof(size_t)");
516 return concatenated_hash;
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
PhysRegId(const RegClass ®_class, RegIndex _regIdx, RegIndex _flatIdx)
Scalar PhysRegId constructor.
int getNumPinnedWrites() const
int numPinnedWritesToComplete
bool operator<(const PhysRegId &that) const
Explicit forward methods, to prevent comparisons of PhysRegId with RegIds.
bool operator!=(const PhysRegId &that) const
int getNumPinnedWritesToComplete() const
bool operator==(const PhysRegId &that) const
void incrNumPinnedWritesToComplete()
void decrNumPinnedWrites()
void setNumPinnedWrites(int numWrites)
void incrNumPinnedWrites()
void decrNumPinnedWritesToComplete()
void setNumPinnedWritesToComplete(int numWrites)
const RegIndex & flatIndex() const
Flat index accessor.
bool isFixedMapping() const
Returns true if this register is always associated to the same architectural register.
std::forward_iterator_tag iterator_category
RegClassIterator operator++(int)
RegClassIterator & operator++()
std::size_t difference_type
bool operator!=(const RegClassIterator &other) const
reference operator*() const
bool operator==(const RegClassIterator &other) const
RegClassIterator(const RegClass ®_class, RegIndex idx)
virtual std::string regName(const RegId &id) const
Print the name of the register specified in id.
virtual RegId flatten(const BaseISA &isa, const RegId &id) const
Flatten register id id using information in the ISA object isa.
virtual std::string valString(const void *val, size_t size) const
Print the value of a register pointed to by val of size size.
RegId flatten(const BaseISA &isa, const RegId &id) const
constexpr RegId operator[](RegIndex idx) const
constexpr RegClass(RegClassType type, const char *new_name, size_t num_regs, const debug::Flag &debug_flag)
constexpr const debug::Flag & debug() const
constexpr RegClass ops(const RegClassOps &new_ops) const
constexpr size_t regShift() const
std::string regName(const RegId &id) const
constexpr size_t numRegs() const
constexpr RegClass regType() const
constexpr const char * name() const
constexpr RegClass needsFlattening() const
constexpr bool isFlat() const
static RegClassOps defaultOps
constexpr RegClassType type() const
std::string valString(const void *val) const
const debug::Flag & debugFlag
constexpr size_t regBytes() const
Register ID: describe an architectural register with its class and index.
constexpr bool isRenameable() const
Return true if this register can be renamed.
constexpr bool operator<(const RegId &that) const
Order operator.
constexpr RegClassType classValue() const
constexpr bool operator==(const RegId &that) const
constexpr bool operator!=(const RegId &that) const
constexpr bool is(RegClassType reg_class) const
friend std::ostream & operator<<(std::ostream &os, const RegId &rid)
constexpr RegId(const RegClass ®_class, RegIndex reg_idx)
void setNumPinnedWrites(int num_writes)
constexpr RegIndex index() const
Index accessors.
int getNumPinnedWrites() const
constexpr bool isFlat() const
const RegClass * _regClass
RegId flatten(const BaseISA &isa) const
constexpr const char * className() const
Return a const char* with the register class name.
constexpr const RegClass & regClass() const
Class accessor.
std::string valString(const void *val, size_t size) const override
Print the value of a register pointed to by val of size size.
std::string regName(const RegId &id) const override
Print the name of the register specified in id.
VecElemRegClassOps(size_t elems_per_vec)
static constexpr int ceilLog2(const T &n)
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
constexpr char MiscRegClassName[]
constexpr char CCRegClassName[]
constexpr char VecPredRegClassName[]
constexpr char IntRegClassName[]
std::ostream & operator<<(std::ostream &os, const ArmSemihosting::InPlaceArg &ipa)
constexpr char VecRegClassName[]
constexpr RegClass invalidRegClass(InvalidRegClass, "invalid", 0, debug::InvalidReg)
std::string csprintf(const char *format, const Args &...args)
RegClassType
Enumerate the classes of registers.
@ FloatRegClass
Floating-point register.
@ CCRegClass
Condition-code register.
@ VecRegClass
Vector Register.
@ IntRegClass
Integer register.
@ MiscRegClass
Control (misc) register.
@ VecElemClass
Vector Register Native Elem lane.
constexpr char VecElemClassName[]
constexpr char FloatRegClassName[]
Overload hash function for BasicBlockRange type.
size_t operator()(const gem5::RegId ®_id) const