gem5  v22.1.0.0
reg_class.hh
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40 
41 #ifndef __CPU__REG_CLASS_HH__
42 #define __CPU__REG_CLASS_HH__
43 
44 #include <cstddef>
45 #include <iterator>
46 #include <string>
47 
48 #include "base/cprintf.hh"
49 #include "base/debug.hh"
50 #include "base/intmath.hh"
51 #include "base/types.hh"
52 #include "debug/InvalidReg.hh"
53 
54 namespace gem5
55 {
56 
59 {
69  InvalidRegClass = -1
70 };
71 
72 // "Standard" register class names. Using these is encouraged but optional.
73 inline constexpr char IntRegClassName[] = "integer";
74 inline constexpr char FloatRegClassName[] = "floating_point";
75 inline constexpr char VecRegClassName[] = "vector";
76 inline constexpr char VecElemClassName[] = "vector_element";
77 inline constexpr char VecPredRegClassName[] = "vector_predicate";
78 inline constexpr char CCRegClassName[] = "condition_code";
79 inline constexpr char MiscRegClassName[] = "miscellaneous";
80 
81 class RegClass;
82 class RegClassIterator;
83 class BaseISA;
84 
90 class RegId
91 {
92  protected:
93  const RegClass *_regClass = nullptr;
96 
97  friend struct std::hash<RegId>;
98  friend class RegClassIterator;
99 
100  public:
101  inline constexpr RegId();
102 
103  constexpr RegId(const RegClass &reg_class, RegIndex reg_idx)
104  : _regClass(&reg_class), regIdx(reg_idx), numPinnedWrites(0)
105  {}
106 
107  constexpr operator RegIndex() const
108  {
109  return index();
110  }
111 
112  constexpr bool
113  operator==(const RegId& that) const
114  {
115  return classValue() == that.classValue() && regIdx == that.index();
116  }
117 
118  constexpr bool
119  operator!=(const RegId& that) const
120  {
121  return !(*this==that);
122  }
123 
127  constexpr bool
128  operator<(const RegId& that) const
129  {
130  return classValue() < that.classValue() ||
131  (classValue() == that.classValue() && (regIdx < that.index()));
132  }
133 
137  constexpr bool
138  isRenameable() const
139  {
141  }
142 
144  inline constexpr bool is(RegClassType reg_class) const;
145 
148  constexpr RegIndex index() const { return regIdx; }
149 
151  constexpr const RegClass &regClass() const { return *_regClass; }
152  inline constexpr RegClassType classValue() const;
154  inline constexpr const char* className() const;
155 
156  inline constexpr bool isFlat() const;
157  inline RegId flatten(const BaseISA &isa) const;
158 
159  int getNumPinnedWrites() const { return numPinnedWrites; }
160  void setNumPinnedWrites(int num_writes) { numPinnedWrites = num_writes; }
161 
162  friend inline std::ostream& operator<<(std::ostream& os, const RegId& rid);
163 };
164 
166 {
167  public:
169  virtual std::string regName(const RegId &id) const;
171  virtual std::string valString(const void *val, size_t size) const;
173  virtual RegId
174  flatten(const BaseISA &isa, const RegId &id) const
175  {
176  return id;
177  }
178 };
179 
180 class RegClassIterator;
181 
182 class RegClass
183 {
184  private:
186  const char *_name;
187 
188  size_t _numRegs;
189  size_t _regBytes = sizeof(RegVal);
190  // This is how much to shift an index by to get an offset of a register in
191  // a register file from the register index, which would otherwise need to
192  // be calculated with a multiply.
193  size_t _regShift = ceilLog2(sizeof(RegVal));
194 
195  static inline RegClassOps defaultOps;
198 
199  bool _flat = true;
200 
201  public:
202  constexpr RegClass(RegClassType type, const char *new_name,
203  size_t num_regs, const debug::Flag &debug_flag) :
204  _type(type), _name(new_name), _numRegs(num_regs), debugFlag(debug_flag)
205  {}
206 
207  constexpr RegClass
209  {
210  RegClass reg_class = *this;
211  reg_class._flat = false;
212  return reg_class;
213  }
214 
215  constexpr RegClass
216  ops(const RegClassOps &new_ops) const
217  {
218  RegClass reg_class = *this;
219  reg_class._ops = &new_ops;
220  return reg_class;
221  }
222 
223  template <class RegType>
224  constexpr RegClass
225  regType() const
226  {
227  RegClass reg_class = *this;
228  reg_class._regBytes = sizeof(RegType);
229  reg_class._regShift = ceilLog2(reg_class._regBytes);
230  return reg_class;
231  }
232 
233  constexpr RegClassType type() const { return _type; }
234  constexpr const char *name() const { return _name; }
235  constexpr size_t numRegs() const { return _numRegs; }
236  constexpr size_t regBytes() const { return _regBytes; }
237  constexpr size_t regShift() const { return _regShift; }
238  constexpr const debug::Flag &debug() const { return debugFlag; }
239  constexpr bool isFlat() const { return _flat; }
240 
241  std::string regName(const RegId &id) const { return _ops->regName(id); }
242  std::string
243  valString(const void *val) const
244  {
245  return _ops->valString(val, regBytes());
246  }
247  RegId
248  flatten(const BaseISA &isa, const RegId &id) const
249  {
250  return isFlat() ? id : _ops->flatten(isa, id);
251  }
252 
254 
255  inline iterator begin() const;
256  inline iterator end() const;
257 
258  inline constexpr RegId operator[](RegIndex idx) const;
259 };
260 
261 inline constexpr RegClass
262  invalidRegClass(InvalidRegClass, "invalid", 0, debug::InvalidReg);
263 
264 constexpr RegId::RegId() : RegId(invalidRegClass, 0) {}
265 
266 constexpr bool
267 RegId::is(RegClassType reg_class) const
268 {
269  return _regClass->type() == reg_class;
270 }
271 
272 constexpr RegClassType RegId::classValue() const { return _regClass->type(); }
273 constexpr const char* RegId::className() const { return _regClass->name(); }
274 
275 constexpr bool RegId::isFlat() const { return _regClass->isFlat(); }
276 RegId
277 RegId::flatten(const BaseISA &isa) const
278 {
279  return _regClass->flatten(isa, *this);
280 }
281 
282 std::ostream&
283 operator<<(std::ostream& os, const RegId& rid)
284 {
285  return os << rid.regClass().regName(rid);
286 }
287 
289 {
290  private:
292 
293  RegClassIterator(const RegClass &reg_class, RegIndex idx) :
294  id(reg_class, idx)
295  {}
296 
297  friend class RegClass;
298 
299  public:
300  using iterator_category = std::forward_iterator_tag;
301  using difference_type = std::size_t;
302  using value_type = const RegId;
303  using pointer = value_type *;
305 
306  reference operator*() const { return id; }
307  pointer operator->() { return &id; }
308 
311  {
312  id.regIdx++;
313  return *this;
314  }
315 
318  {
319  auto tmp = *this;
320  ++(*this);
321  return tmp;
322  }
323 
324  bool
325  operator==(const RegClassIterator &other) const
326  {
327  return id == other.id;
328  }
329 
330  bool
331  operator!=(const RegClassIterator &other) const
332  {
333  return id != other.id;
334  }
335 };
336 
337 RegClassIterator
339 {
340  return RegClassIterator(*this, 0);
341 }
342 
345 {
346  return RegClassIterator(*this, numRegs());
347 }
348 
349 constexpr RegId
351 {
352  return RegId(*this, idx);
353 }
354 
355 template <typename ValueType>
357 {
358  public:
359  std::string
360  valString(const void *val, size_t size) const override
361  {
362  assert(size == sizeof(ValueType));
363  return csprintf("%s", *(const ValueType *)val);
364  }
365 };
366 
367 template <typename ValueType>
368 class VecElemRegClassOps : public TypedRegClassOps<ValueType>
369 {
370  protected:
371  size_t elemsPerVec;
372 
373  public:
374  explicit VecElemRegClassOps(size_t elems_per_vec) :
375  elemsPerVec(elems_per_vec)
376  {}
377 
378  std::string
379  regName(const RegId &id) const override
380  {
381  RegIndex reg_idx = id.index() / elemsPerVec;
382  RegIndex elem_idx = id.index() % elemsPerVec;
383  return csprintf("v%d[%d]", reg_idx, elem_idx);
384  }
385 };
386 
391 class PhysRegId : private RegId
392 {
393  private:
396  bool pinned;
397 
398  public:
399  explicit PhysRegId() : RegId(invalidRegClass, -1), flatIdx(-1),
401  {}
402 
404  explicit PhysRegId(const RegClass &reg_class, RegIndex _regIdx,
405  RegIndex _flatIdx)
406  : RegId(reg_class, _regIdx), flatIdx(_flatIdx),
408  {}
409 
412  using RegId::index;
413  using RegId::regClass;
414  using RegId::classValue;
415  using RegId::className;
416  using RegId::is;
423  bool
424  operator<(const PhysRegId& that) const
425  {
426  return RegId::operator<(that);
427  }
428 
429  bool
430  operator==(const PhysRegId& that) const
431  {
432  return RegId::operator==(that);
433  }
434 
435  bool
436  operator!=(const PhysRegId& that) const
437  {
438  return RegId::operator!=(that);
439  }
446  bool isFixedMapping() const { return !isRenameable(); }
447 
449  const RegIndex& flatIndex() const { return flatIdx; }
450 
451  int getNumPinnedWrites() const { return numPinnedWrites; }
452 
453  void
454  setNumPinnedWrites(int numWrites)
455  {
456  // An instruction with a pinned destination reg can get
457  // squashed. The numPinnedWrites counter may be zero when
458  // the squash happens but we need to know if the dest reg
459  // was pinned originally in order to reset counters properly
460  // for a possible re-rename using the same physical reg (which
461  // may be required in case of a mem access order violation).
462  pinned = (numWrites != 0);
463  numPinnedWrites = numWrites;
464  }
465 
468 
469  bool isPinned() const { return pinned; }
470 
471  int
473  {
475  }
476 
477  void
479  {
480  numPinnedWritesToComplete = numWrites;
481  }
482 
485 };
486 
488 
489 } // namespace gem5
490 
491 namespace std
492 {
493 template<>
494 struct hash<gem5::RegId>
495 {
496  size_t
497  operator()(const gem5::RegId& reg_id) const
498  {
499  // Extract unique integral values for the effective fields of a RegId.
500  const size_t index = static_cast<size_t>(reg_id.index());
501  const size_t class_num = static_cast<size_t>(reg_id.classValue());
502 
503  const size_t shifted_class_num =
504  class_num << (sizeof(gem5::RegIndex) << 3);
505 
506  // Concatenate the class_num to the end of the flat_index, in order to
507  // maximize information retained.
508  const size_t concatenated_hash = index | shifted_class_num;
509 
510  // If RegIndex is larger than size_t, then class_num will not be
511  // considered by this hash function, so we may wish to perform a
512  // different operation to include that information in the hash.
513  static_assert(sizeof(gem5::RegIndex) < sizeof(size_t),
514  "sizeof(RegIndex) should be less than sizeof(size_t)");
515 
516  return concatenated_hash;
517  }
518 };
519 } // namespace std
520 
521 #endif // __CPU__REG_CLASS_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Physical register ID.
Definition: reg_class.hh:392
PhysRegId(const RegClass &reg_class, RegIndex _regIdx, RegIndex _flatIdx)
Scalar PhysRegId constructor.
Definition: reg_class.hh:404
int getNumPinnedWrites() const
Definition: reg_class.hh:451
int numPinnedWritesToComplete
Definition: reg_class.hh:395
bool operator<(const PhysRegId &that) const
Explicit forward methods, to prevent comparisons of PhysRegId with RegIds.
Definition: reg_class.hh:424
bool operator!=(const PhysRegId &that) const
Definition: reg_class.hh:436
int getNumPinnedWritesToComplete() const
Definition: reg_class.hh:472
bool operator==(const PhysRegId &that) const
Definition: reg_class.hh:430
void incrNumPinnedWritesToComplete()
Definition: reg_class.hh:484
void decrNumPinnedWrites()
Definition: reg_class.hh:466
void setNumPinnedWrites(int numWrites)
Definition: reg_class.hh:454
void incrNumPinnedWrites()
Definition: reg_class.hh:467
void decrNumPinnedWritesToComplete()
Definition: reg_class.hh:483
void setNumPinnedWritesToComplete(int numWrites)
Definition: reg_class.hh:478
bool isPinned() const
Definition: reg_class.hh:469
const RegIndex & flatIndex() const
Flat index accessor.
Definition: reg_class.hh:449
RegIndex flatIdx
Definition: reg_class.hh:394
bool isFixedMapping() const
Returns true if this register is always associated to the same architectural register.
Definition: reg_class.hh:446
std::forward_iterator_tag iterator_category
Definition: reg_class.hh:300
RegClassIterator operator++(int)
Definition: reg_class.hh:317
RegClassIterator & operator++()
Definition: reg_class.hh:310
std::size_t difference_type
Definition: reg_class.hh:301
bool operator!=(const RegClassIterator &other) const
Definition: reg_class.hh:331
reference operator*() const
Definition: reg_class.hh:306
bool operator==(const RegClassIterator &other) const
Definition: reg_class.hh:325
RegClassIterator(const RegClass &reg_class, RegIndex idx)
Definition: reg_class.hh:293
virtual std::string regName(const RegId &id) const
Print the name of the register specified in id.
Definition: reg_class.cc:53
virtual RegId flatten(const BaseISA &isa, const RegId &id) const
Flatten register id id using information in the ISA object isa.
Definition: reg_class.hh:174
virtual std::string valString(const void *val, size_t size) const
Print the value of a register pointed to by val of size size.
Definition: reg_class.cc:59
RegId flatten(const BaseISA &isa, const RegId &id) const
Definition: reg_class.hh:248
constexpr RegId operator[](RegIndex idx) const
Definition: reg_class.hh:350
size_t _numRegs
Definition: reg_class.hh:188
constexpr RegClass(RegClassType type, const char *new_name, size_t num_regs, const debug::Flag &debug_flag)
Definition: reg_class.hh:202
size_t _regBytes
Definition: reg_class.hh:189
constexpr const debug::Flag & debug() const
Definition: reg_class.hh:238
constexpr RegClass ops(const RegClassOps &new_ops) const
Definition: reg_class.hh:216
iterator begin() const
Definition: reg_class.hh:338
constexpr size_t regShift() const
Definition: reg_class.hh:237
std::string regName(const RegId &id) const
Definition: reg_class.hh:241
constexpr size_t numRegs() const
Definition: reg_class.hh:235
constexpr RegClass regType() const
Definition: reg_class.hh:225
constexpr const char * name() const
Definition: reg_class.hh:234
constexpr RegClass needsFlattening() const
Definition: reg_class.hh:208
constexpr bool isFlat() const
Definition: reg_class.hh:239
static RegClassOps defaultOps
Definition: reg_class.hh:195
iterator end() const
Definition: reg_class.hh:344
constexpr RegClassType type() const
Definition: reg_class.hh:233
std::string valString(const void *val) const
Definition: reg_class.hh:243
size_t _regShift
Definition: reg_class.hh:193
const debug::Flag & debugFlag
Definition: reg_class.hh:197
RegClassType _type
Definition: reg_class.hh:185
const char * _name
Definition: reg_class.hh:186
const RegClassOps * _ops
Definition: reg_class.hh:196
constexpr size_t regBytes() const
Definition: reg_class.hh:236
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:91
constexpr RegId()
Definition: reg_class.hh:264
constexpr bool isRenameable() const
Return true if this register can be renamed.
Definition: reg_class.hh:138
constexpr bool operator<(const RegId &that) const
Order operator.
Definition: reg_class.hh:128
constexpr RegClassType classValue() const
Definition: reg_class.hh:272
constexpr bool operator==(const RegId &that) const
Definition: reg_class.hh:113
constexpr bool operator!=(const RegId &that) const
Definition: reg_class.hh:119
constexpr bool is(RegClassType reg_class) const
Definition: reg_class.hh:267
friend std::ostream & operator<<(std::ostream &os, const RegId &rid)
Definition: reg_class.hh:283
constexpr RegId(const RegClass &reg_class, RegIndex reg_idx)
Definition: reg_class.hh:103
void setNumPinnedWrites(int num_writes)
Definition: reg_class.hh:160
constexpr RegIndex index() const
Index accessors.
Definition: reg_class.hh:148
int getNumPinnedWrites() const
Definition: reg_class.hh:159
constexpr bool isFlat() const
Definition: reg_class.hh:275
const RegClass * _regClass
Definition: reg_class.hh:93
int numPinnedWrites
Definition: reg_class.hh:95
RegIndex regIdx
Definition: reg_class.hh:94
RegId flatten(const BaseISA &isa) const
Definition: reg_class.hh:277
constexpr const char * className() const
Return a const char* with the register class name.
Definition: reg_class.hh:273
constexpr const RegClass & regClass() const
Class accessor.
Definition: reg_class.hh:151
std::string valString(const void *val, size_t size) const override
Print the value of a register pointed to by val of size size.
Definition: reg_class.hh:360
std::string regName(const RegId &id) const override
Print the name of the register specified in id.
Definition: reg_class.hh:379
VecElemRegClassOps(size_t elems_per_vec)
Definition: reg_class.hh:374
static constexpr int ceilLog2(const T &n)
Definition: intmath.hh:84
Bitfield< 33 > id
Definition: misc_types.hh:257
Bitfield< 30, 0 > index
Bitfield< 17 > os
Definition: misc.hh:810
Bitfield< 63 > val
Definition: misc.hh:776
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
constexpr char MiscRegClassName[]
Definition: reg_class.hh:79
constexpr char CCRegClassName[]
Definition: reg_class.hh:78
uint16_t RegIndex
Definition: types.hh:176
constexpr char VecPredRegClassName[]
Definition: reg_class.hh:77
constexpr char IntRegClassName[]
Definition: reg_class.hh:73
std::ostream & operator<<(std::ostream &os, const ArmSemihosting::InPlaceArg &ipa)
constexpr char VecRegClassName[]
Definition: reg_class.hh:75
constexpr RegClass invalidRegClass(InvalidRegClass, "invalid", 0, debug::InvalidReg)
uint64_t RegVal
Definition: types.hh:173
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
RegClassType
Enumerate the classes of registers.
Definition: reg_class.hh:59
@ VecPredRegClass
Definition: reg_class.hh:66
@ FloatRegClass
Floating-point register.
Definition: reg_class.hh:61
@ CCRegClass
Condition-code register.
Definition: reg_class.hh:67
@ VecRegClass
Vector Register.
Definition: reg_class.hh:63
@ IntRegClass
Integer register.
Definition: reg_class.hh:60
@ InvalidRegClass
Definition: reg_class.hh:69
@ MiscRegClass
Control (misc) register.
Definition: reg_class.hh:68
@ VecElemClass
Vector Register Native Elem lane.
Definition: reg_class.hh:65
constexpr char VecElemClassName[]
Definition: reg_class.hh:76
constexpr char FloatRegClassName[]
Definition: reg_class.hh:74
Overload hash function for BasicBlockRange type.
Definition: misc.hh:2826
size_t operator()(const gem5::RegId &reg_id) const
Definition: reg_class.hh:497

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