gem5 v24.0.0.0
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#include <algorithm>
#include <array>
#include <iostream>
#include <limits>
#include <utility>
#include <vector>
#include "arch/generic/isa.hh"
#include "cpu/o3/dyn_inst_ptr.hh"
#include "cpu/o3/free_list.hh"
#include "cpu/o3/regfile.hh"
#include "cpu/reg_class.hh"
Go to the source code of this file.
Classes | |
class | gem5::o3::SimpleRenameMap |
Register rename map for a single class of registers (e.g., integer or floating point). More... | |
class | gem5::o3::UnifiedRenameMap |
Unified register rename map for all classes of registers. More... | |
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::o3 |