gem5 v24.0.0.0
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rtc_pl031.hh
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1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __DEV_ARM_RTC_PL310_HH__
39#define __DEV_ARM_RTC_PL310_HH__
40
42#include "params/PL031.hh"
43
48namespace gem5
49{
50
51class PL031 : public AmbaIntDevice
52{
53 protected:
54 enum
55 {
56 DataReg = 0x00,
57 MatchReg = 0x04,
58 LoadReg = 0x08,
59 ControlReg = 0x0C,
60 IntMask = 0x10,
61 RawISR = 0x14,
62 MaskedISR = 0x18,
63 IntClear = 0x1C,
64 };
65
66 /* Seconds since epoch that correspond to time simulation was started at the
67 * begining of simulation and is then updated if ever written. */
68 uint32_t timeVal;
69
70 /* Time when the timeVal register was written */
72
73 /* Previous load value */
74 uint32_t loadVal;
75
76 /* RTC Match Value
77 * Cause an interrupt when this value hits counter
78 */
79 uint32_t matchVal;
80
83 bool rawInt;
84
88 bool maskInt;
89
93
95 void counterMatch();
97
101 void resyncMatch();
102
103 public:
104 using Params = PL031Params;
105
110 PL031(const Params &p);
111
117 Tick read(PacketPtr pkt) override;
118
124 Tick write(PacketPtr pkt) override;
125
126 void serialize(CheckpointOut &cp) const override;
127 void unserialize(CheckpointIn &cp) override;
128};
129
130} // namespace gem5
131
132#endif // __DEV_ARM_RTC_PL031_HH__
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
uint32_t timeVal
Definition rtc_pl031.hh:68
bool rawInt
If timer has caused an interrupt.
Definition rtc_pl031.hh:83
bool pendingInt
If an interrupt is currently pending.
Definition rtc_pl031.hh:92
Tick read(PacketPtr pkt) override
Handle a read to the device.
Definition rtc_pl031.cc:64
Tick write(PacketPtr pkt) override
Handle writes to the device.
Definition rtc_pl031.cc:112
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition rtc_pl031.cc:186
PL031(const Params &p)
The constructor for RealView just registers itself with the MMU.
Definition rtc_pl031.cc:52
void counterMatch()
Called when the counter reaches matches.
Definition rtc_pl031.cc:172
EventFunctionWrapper matchEvent
Definition rtc_pl031.hh:96
uint32_t loadVal
Definition rtc_pl031.hh:74
void resyncMatch()
Called to update the matchEvent when the load Value or match value are written.
Definition rtc_pl031.cc:155
uint32_t matchVal
Definition rtc_pl031.hh:79
Tick lastWrittenTick
Definition rtc_pl031.hh:71
bool maskInt
If the timer interrupt mask that is anded with the raw interrupt to generate a pending interrupt.
Definition rtc_pl031.hh:88
PL031Params Params
Definition rtc_pl031.hh:104
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition rtc_pl031.cc:208
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Tick
Tick count type.
Definition types.hh:58

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