gem5
v24.0.0.0
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sim
se_workload.cc
Go to the documentation of this file.
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/*
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* Copyright 2020 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
sim/se_workload.hh
"
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#include "
cpu/thread_context.hh
"
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#include "params/SEWorkload.hh"
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#include "
sim/process.hh
"
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#include "
sim/system.hh
"
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namespace
gem5
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{
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SEWorkload::SEWorkload
(
const
Params &
p
,
Addr
page_shift) :
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Workload(
p
), memPools(page_shift)
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{}
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void
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SEWorkload::setSystem(System *sys)
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{
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Workload::setSystem(sys);
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AddrRangeList
memories = sys->getPhysMem().getConfAddrRanges();
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const
auto
&m5op_range = sys->m5opRange();
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if
(m5op_range.valid())
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memories -= m5op_range;
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memPools.populate(memories);
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}
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void
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SEWorkload::serialize(
CheckpointOut
&cp)
const
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{
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memPools.serialize(cp);
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}
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void
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SEWorkload::unserialize(
CheckpointIn
&cp)
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{
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memPools.unserialize(cp);
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}
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void
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SEWorkload::syscall(
ThreadContext
*tc)
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{
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tc->
getProcessPtr
()->
syscall
(tc);
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}
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Addr
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SEWorkload::allocPhysPages(
int
npages,
int
pool_id)
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{
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return
memPools.allocPhysPages(npages, pool_id);
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}
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Addr
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SEWorkload::memSize(
int
pool_id)
const
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{
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return
memPools.memSize(pool_id);
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}
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Addr
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SEWorkload::freeMemSize(
int
pool_id)
const
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{
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return
memPools.freeMemSize(pool_id);
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}
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}
// namespace gem5
gem5::CheckpointIn
Definition
serialize.hh:69
gem5::Process::syscall
virtual void syscall(ThreadContext *tc)
Definition
process.hh:80
gem5::SEWorkload::SEWorkload
SEWorkload(const Params &p, Addr page_shift=0)
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition
guest_abi.test.cc:41
gem5::ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
thread_context.hh
gem5::AddrRangeList
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition
addr_range.hh:64
gem5::MipsISA::p
Bitfield< 0 > p
Definition
pra_constants.hh:326
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
gem5::CheckpointOut
std::ostream CheckpointOut
Definition
serialize.hh:66
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
process.hh
se_workload.hh
system.hh
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