gem5  v22.1.0.0
pseudo_inst_abi.hh
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27 
28 #ifndef __ARCH_SPARC_PSEUDO_INST_ABI_HH__
29 #define __ARCH_SPARC_PSEUDO_INST_ABI_HH__
30 
31 #include "arch/sparc/regs/int.hh"
32 #include "cpu/thread_context.hh"
33 #include "sim/guest_abi.hh"
34 
35 namespace gem5
36 {
37 
39 {
40  using State = int;
41 };
42 
43 GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi);
44 namespace guest_abi
45 {
46 
47 template <typename T>
49 {
50  static void
51  store(ThreadContext *tc, const T &ret)
52  {
53  // This assumes that all pseudo ops have their return value set
54  // by the pseudo op instruction. This may need to be revisited if we
55  // modify the pseudo op ABI in util/m5/m5op_x86.S
56  tc->setReg(SparcISA::int_reg::O0, ret);
57  }
58 };
59 
60 template <>
61 struct Argument<SparcPseudoInstABI, uint64_t>
62 {
63  static uint64_t
65  {
66  panic_if(state >= 6, "Too many psuedo inst arguments.");
67  return tc->getReg(SparcISA::int_reg::o(state++));
68  }
69 };
70 
71 } // namespace guest_abi
72 } // namespace gem5
73 
74 #endif // __ARCH_SPARC_PSEUDO_INST_ABI_HH__
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual RegVal getReg(const RegId &reg) const
virtual void setReg(const RegId &reg, RegVal val)
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
atomic_var_t state
Definition: helpers.cc:188
constexpr RegId O0
Definition: int.hh:101
constexpr RegId o(int index)
Definition: int.hh:147
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
static uint64_t get(ThreadContext *tc, SparcPseudoInstABI::State &state)
static void store(ThreadContext *tc, const T &ret)

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