gem5  v22.0.0.2
Namespaces | Functions
pseudo_inst.hh File Reference
#include <gem5/asm/generic/m5ops.h>
#include "base/bitfield.hh"
#include "base/compiler.hh"
#include "base/logging.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/thread_context.hh"
#include "debug/PseudoInst.hh"
#include "sim/guest_abi.hh"

Go to the source code of this file.


 Reference material can be found at the JEDEC website: UFS standard UFS HCI specification


 gem5::GEM5_DEPRECATED_NAMESPACE (PseudoInst, pseudo_inst)
static void gem5::pseudo_inst::decodeAddrOffset (Addr offset, uint8_t &func)
void gem5::pseudo_inst::arm (ThreadContext *tc)
void gem5::pseudo_inst::quiesce (ThreadContext *tc)
void gem5::pseudo_inst::quiesceSkip (ThreadContext *tc)
void gem5::pseudo_inst::quiesceNs (ThreadContext *tc, uint64_t ns)
void gem5::pseudo_inst::quiesceCycles (ThreadContext *tc, uint64_t cycles)
uint64_t gem5::pseudo_inst::quiesceTime (ThreadContext *tc)
uint64_t gem5::pseudo_inst::readfile (ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
uint64_t gem5::pseudo_inst::writefile (ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, Addr filename_addr)
void gem5::pseudo_inst::loadsymbol (ThreadContext *tc)
void gem5::pseudo_inst::addsymbol (ThreadContext *tc, Addr addr, Addr symbolAddr)
uint64_t gem5::pseudo_inst::initParam (ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
uint64_t gem5::pseudo_inst::rpns (ThreadContext *tc)
void gem5::pseudo_inst::wakeCPU (ThreadContext *tc, uint64_t cpuid)
void gem5::pseudo_inst::m5exit (ThreadContext *tc, Tick delay)
void gem5::pseudo_inst::m5fail (ThreadContext *tc, Tick delay, uint64_t code)
uint64_t gem5::pseudo_inst::m5sum (ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e, uint64_t f)
void gem5::pseudo_inst::resetstats (ThreadContext *tc, Tick delay, Tick period)
void gem5::pseudo_inst::dumpstats (ThreadContext *tc, Tick delay, Tick period)
void gem5::pseudo_inst::dumpresetstats (ThreadContext *tc, Tick delay, Tick period)
void gem5::pseudo_inst::m5checkpoint (ThreadContext *tc, Tick delay, Tick period)
void gem5::pseudo_inst::debugbreak (ThreadContext *tc)
void gem5::pseudo_inst::switchcpu (ThreadContext *tc)
void gem5::pseudo_inst::workbegin (ThreadContext *tc, uint64_t workid, uint64_t threadid)
void gem5::pseudo_inst::workend (ThreadContext *tc, uint64_t workid, uint64_t threadid)
void gem5::pseudo_inst::m5Syscall (ThreadContext *tc)
void gem5::pseudo_inst::togglesync (ThreadContext *tc)
void gem5::pseudo_inst::triggerWorkloadEvent (ThreadContext *tc)
template<typename ABI , bool store_ret>
bool gem5::pseudo_inst::pseudoInstWork (ThreadContext *tc, uint8_t func, uint64_t &result)
 Execute a decoded M5 pseudo instruction. More...
template<typename ABI , bool store_ret = false>
bool gem5::pseudo_inst::pseudoInst (ThreadContext *tc, uint8_t func, uint64_t &result)
template<typename ABI , bool store_ret = true>
bool gem5::pseudo_inst::pseudoInst (ThreadContext *tc, uint8_t func)

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