gem5::SparcISA::int_reg Namespace Reference

Enumerations
enum	{   _G0Idx , _G1Idx , _G2Idx , _G3Idx ,   _G4Idx , _G5Idx , _G6Idx , _G7Idx ,   _O0Idx , _O1Idx , _O2Idx , _O3Idx ,   _O4Idx , _O5Idx , _O6Idx , _O7Idx ,   _L0Idx , _L1Idx , _L2Idx , _L3Idx ,   _L4Idx , _L5Idx , _L6Idx , _L7Idx ,   _I0Idx , _I1Idx , _I2Idx , _I3Idx ,   _I4Idx , _I5Idx , _I6Idx , _I7Idx ,   NumArchRegs , _Ureg0Idx = NumArchRegs , _YIdx , _CcrIdx ,   _CansaveIdx , _CanrestoreIdx , _CleanwinIdx , _OtherwinIdx ,   _WstateIdx , _GsrIdx , NumMicroRegs = _GsrIdx - _Ureg0Idx + 1 }

Functions
constexpr RegId	g (int index)
constexpr RegId	o (int index)
constexpr RegId	l (int index)
constexpr RegId	i (int index)

Variables
const int	NumRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroRegs
constexpr RegId	G0 = intRegClass[_G0Idx]
constexpr RegId	G1 = intRegClass[_G1Idx]
constexpr RegId	G2 = intRegClass[_G2Idx]
constexpr RegId	G3 = intRegClass[_G3Idx]
constexpr RegId	G4 = intRegClass[_G4Idx]
constexpr RegId	G5 = intRegClass[_G5Idx]
constexpr RegId	G6 = intRegClass[_G6Idx]
constexpr RegId	G7 = intRegClass[_G7Idx]
constexpr RegId	O0 = intRegClass[_O0Idx]
constexpr RegId	O1 = intRegClass[_O1Idx]
constexpr RegId	O2 = intRegClass[_O2Idx]
constexpr RegId	O3 = intRegClass[_O3Idx]
constexpr RegId	O4 = intRegClass[_O4Idx]
constexpr RegId	O5 = intRegClass[_O5Idx]
constexpr RegId	O6 = intRegClass[_O6Idx]
constexpr RegId	O7 = intRegClass[_O7Idx]
constexpr RegId	L0 = intRegClass[_L0Idx]
constexpr RegId	L1 = intRegClass[_L1Idx]
constexpr RegId	L2 = intRegClass[_L2Idx]
constexpr RegId	L3 = intRegClass[_L3Idx]
constexpr RegId	L4 = intRegClass[_L4Idx]
constexpr RegId	L5 = intRegClass[_L5Idx]
constexpr RegId	L6 = intRegClass[_L6Idx]
constexpr RegId	L7 = intRegClass[_L7Idx]
constexpr RegId	I0 = intRegClass[_I0Idx]
constexpr RegId	I1 = intRegClass[_I1Idx]
constexpr RegId	I2 = intRegClass[_I2Idx]
constexpr RegId	I3 = intRegClass[_I3Idx]
constexpr RegId	I4 = intRegClass[_I4Idx]
constexpr RegId	I5 = intRegClass[_I5Idx]
constexpr RegId	I6 = intRegClass[_I6Idx]
constexpr RegId	I7 = intRegClass[_I7Idx]
constexpr RegId	Ureg0 = intRegClass[_Ureg0Idx]
constexpr RegId	Y = intRegClass[_YIdx]
constexpr RegId	Ccr = intRegClass[_CcrIdx]
constexpr RegId	Cansave = intRegClass[_CansaveIdx]
constexpr RegId	Canrestore = intRegClass[_CanrestoreIdx]
constexpr RegId	Cleanwin = intRegClass[_CleanwinIdx]
constexpr RegId	Otherwin = intRegClass[_OtherwinIdx]
constexpr RegId	Wstate = intRegClass[_WstateIdx]
constexpr RegId	Gsr = intRegClass[_GsrIdx]

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
_G0Idx
_G1Idx
_G2Idx
_G3Idx
_G4Idx
_G5Idx
_G6Idx
_G7Idx
_O0Idx
_O1Idx
_O2Idx
_O3Idx
_O4Idx
_O5Idx
_O6Idx
_O7Idx
_L0Idx
_L1Idx
_L2Idx
_L3Idx
_L4Idx
_L5Idx
_L6Idx
_L7Idx
_I0Idx
_I1Idx
_I2Idx
_I3Idx
_I4Idx
_I5Idx
_I6Idx
_I7Idx
NumArchRegs
_Ureg0Idx
_YIdx
_CcrIdx
_CansaveIdx
_CanrestoreIdx
_CleanwinIdx
_OtherwinIdx
_WstateIdx
_GsrIdx
NumMicroRegs

Definition at line 46 of file int.hh.

Function Documentation

g()

RegId gem5::SparcISA::int_reg::g ( int index )

inlineconstexpr

Definition at line 141 of file int.hh.

References G0, gem5::MipsISA::index, and gem5::SparcISA::intRegClass.

i()

RegId gem5::SparcISA::int_reg::i ( int index )

inlineconstexpr

Definition at line 159 of file int.hh.

References I0, gem5::MipsISA::index, and gem5::SparcISA::intRegClass.

l()

RegId gem5::SparcISA::int_reg::l ( int index )

inlineconstexpr

Definition at line 153 of file int.hh.

References gem5::MipsISA::index, gem5::SparcISA::intRegClass, and L0.

o()

RegId gem5::SparcISA::int_reg::o ( int index )

inlineconstexpr

Definition at line 147 of file int.hh.

References gem5::MipsISA::index, gem5::SparcISA::intRegClass, and O0.

Referenced by gem5::guest_abi::Argument< SparcPseudoInstABI, pseudo_inst::GuestAddr >::get(), and gem5::guest_abi::Argument< SparcPseudoInstABI, uint64_t >::get().

Variable Documentation

Canrestore

RegId gem5::SparcISA::int_reg::Canrestore = intRegClass[_CanrestoreIdx]

Definition at line 134 of file int.hh.

Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().

Cansave

RegId gem5::SparcISA::int_reg::Cansave = intRegClass[_CansaveIdx]

Definition at line 133 of file int.hh.

Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().

Ccr

RegId gem5::SparcISA::int_reg::Ccr = intRegClass[_CcrIdx]

Definition at line 132 of file int.hh.

Referenced by gem5::trace::SparcNativeTrace::check(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), and gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of_v< SparcISA::SEWorkload::BaseSyscallABI, ABI > > >::store().

Cleanwin

RegId gem5::SparcISA::int_reg::Cleanwin = intRegClass[_CleanwinIdx]

Definition at line 135 of file int.hh.

Referenced by gem5::SparcLinux::archClone(), and gem5::SparcProcess::initState().

G0

RegId gem5::SparcISA::int_reg::G0 = intRegClass[_G0Idx]

inlineconstexpr

Definition at line 91 of file int.hh.

Referenced by g().

G1

RegId gem5::SparcISA::int_reg::G1 = intRegClass[_G1Idx]

Definition at line 92 of file int.hh.

Referenced by gem5::SparcProcess::argsInit(), gem5::SparcISA::EmuLinux::syscall32(), and gem5::SparcISA::EmuLinux::syscall64().

G2

RegId gem5::SparcISA::int_reg::G2 = intRegClass[_G2Idx]

Definition at line 93 of file int.hh.

G3

RegId gem5::SparcISA::int_reg::G3 = intRegClass[_G3Idx]

Definition at line 94 of file int.hh.

G4

RegId gem5::SparcISA::int_reg::G4 = intRegClass[_G4Idx]

Definition at line 95 of file int.hh.

G5

RegId gem5::SparcISA::int_reg::G5 = intRegClass[_G5Idx]

Definition at line 96 of file int.hh.

G6

RegId gem5::SparcISA::int_reg::G6 = intRegClass[_G6Idx]

Definition at line 97 of file int.hh.

G7

RegId gem5::SparcISA::int_reg::G7 = intRegClass[_G7Idx]

Definition at line 98 of file int.hh.

Gsr

RegId gem5::SparcISA::int_reg::Gsr = intRegClass[_GsrIdx]

Definition at line 138 of file int.hh.

I0

RegId gem5::SparcISA::int_reg::I0 = intRegClass[_I0Idx]

Definition at line 121 of file int.hh.

Referenced by i().

I1

RegId gem5::SparcISA::int_reg::I1 = intRegClass[_I1Idx]

Definition at line 122 of file int.hh.

I2

RegId gem5::SparcISA::int_reg::I2 = intRegClass[_I2Idx]

Definition at line 123 of file int.hh.

I3

RegId gem5::SparcISA::int_reg::I3 = intRegClass[_I3Idx]

Definition at line 124 of file int.hh.

I4

RegId gem5::SparcISA::int_reg::I4 = intRegClass[_I4Idx]

Definition at line 125 of file int.hh.

I5

RegId gem5::SparcISA::int_reg::I5 = intRegClass[_I5Idx]

Definition at line 126 of file int.hh.

I6

RegId gem5::SparcISA::int_reg::I6 = intRegClass[_I6Idx]

Definition at line 127 of file int.hh.

I7

RegId gem5::SparcISA::int_reg::I7 = intRegClass[_I7Idx]

Definition at line 128 of file int.hh.

L0

RegId gem5::SparcISA::int_reg::L0 = intRegClass[_L0Idx]

Definition at line 111 of file int.hh.

Referenced by l().

L1

RegId gem5::SparcISA::int_reg::L1 = intRegClass[_L1Idx]

Definition at line 112 of file int.hh.

L2

RegId gem5::SparcISA::int_reg::L2 = intRegClass[_L2Idx]

Definition at line 113 of file int.hh.

L3

RegId gem5::SparcISA::int_reg::L3 = intRegClass[_L3Idx]

Definition at line 114 of file int.hh.

L4

RegId gem5::SparcISA::int_reg::L4 = intRegClass[_L4Idx]

Definition at line 115 of file int.hh.

L5

RegId gem5::SparcISA::int_reg::L5 = intRegClass[_L5Idx]

Definition at line 116 of file int.hh.

L6

RegId gem5::SparcISA::int_reg::L6 = intRegClass[_L6Idx]

Definition at line 117 of file int.hh.

L7

RegId gem5::SparcISA::int_reg::L7 = intRegClass[_L7Idx]

Definition at line 118 of file int.hh.

NumRegs

const int gem5::SparcISA::int_reg::NumRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroRegs

Definition at line 67 of file int.hh.

Referenced by gem5::SparcISA::ISA::installGlobals(), and gem5::SparcISA::ISA::installWindow().

O0

RegId gem5::SparcISA::int_reg::O0 = intRegClass[_O0Idx]

Definition at line 101 of file int.hh.

Referenced by o(), and gem5::guest_abi::Result< SparcPseudoInstABI, T >::store().

O1

RegId gem5::SparcISA::int_reg::O1 = intRegClass[_O1Idx]

Definition at line 102 of file int.hh.

O2

RegId gem5::SparcISA::int_reg::O2 = intRegClass[_O2Idx]

Definition at line 103 of file int.hh.

O3

RegId gem5::SparcISA::int_reg::O3 = intRegClass[_O3Idx]

Definition at line 104 of file int.hh.

O4

RegId gem5::SparcISA::int_reg::O4 = intRegClass[_O4Idx]

Definition at line 105 of file int.hh.

O5

RegId gem5::SparcISA::int_reg::O5 = intRegClass[_O5Idx]

Definition at line 106 of file int.hh.

O6

RegId gem5::SparcISA::int_reg::O6 = intRegClass[_O6Idx]

Definition at line 107 of file int.hh.

O7

RegId gem5::SparcISA::int_reg::O7 = intRegClass[_O7Idx]

Definition at line 108 of file int.hh.

Otherwin

RegId gem5::SparcISA::int_reg::Otherwin = intRegClass[_OtherwinIdx]

Definition at line 136 of file int.hh.

Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().

Ureg0

RegId gem5::SparcISA::int_reg::Ureg0 = intRegClass[_Ureg0Idx]

Definition at line 130 of file int.hh.

Wstate

RegId gem5::SparcISA::int_reg::Wstate = intRegClass[_WstateIdx]

Definition at line 137 of file int.hh.

Referenced by gem5::SparcLinux::archClone(), and gem5::SparcProcess::initState().

Y

RegId gem5::SparcISA::int_reg::Y = intRegClass[_YIdx]

Definition at line 131 of file int.hh.