float.hh File Reference

#include "arch/x86/x86_traits.hh"
#include "base/bitunion.hh"
#include "cpu/reg_class.hh"
#include "debug/FloatRegs.hh"

Go to the source code of this file.

Classes
class	gem5::X86ISA::FlatFloatRegClassOps
class	gem5::X86ISA::FloatRegClassOps

Namespaces
namespace	gem5
	Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
namespace	gem5::X86ISA
	This is exposed globally, independent of the ISA.
namespace	gem5::X86ISA::float_reg

Enumerations
enum	gem5::X86ISA::float_reg::FloatRegIndex {   gem5::X86ISA::float_reg::MmxBase , gem5::X86ISA::float_reg::FprBase = MmxBase , gem5::X86ISA::float_reg::_Mmx0Idx = MmxBase , gem5::X86ISA::float_reg::_Mmx1Idx ,   gem5::X86ISA::float_reg::_Mmx2Idx , gem5::X86ISA::float_reg::_Mmx3Idx , gem5::X86ISA::float_reg::_Mmx4Idx , gem5::X86ISA::float_reg::_Mmx5Idx ,   gem5::X86ISA::float_reg::_Mmx6Idx , gem5::X86ISA::float_reg::_Mmx7Idx , gem5::X86ISA::float_reg::_Fpr0Idx = FprBase , gem5::X86ISA::float_reg::_Fpr1Idx ,   gem5::X86ISA::float_reg::_Fpr2Idx , gem5::X86ISA::float_reg::_Fpr3Idx , gem5::X86ISA::float_reg::_Fpr4Idx , gem5::X86ISA::float_reg::_Fpr5Idx ,   gem5::X86ISA::float_reg::_Fpr6Idx , gem5::X86ISA::float_reg::_Fpr7Idx , gem5::X86ISA::float_reg::XmmBase = MmxBase + NumMMXRegs , gem5::X86ISA::float_reg::_Xmm0LowIdx = XmmBase ,   gem5::X86ISA::float_reg::_Xmm0HighIdx , gem5::X86ISA::float_reg::_Xmm1LowIdx , gem5::X86ISA::float_reg::_Xmm1HighIdx , gem5::X86ISA::float_reg::_Xmm2LowIdx ,   gem5::X86ISA::float_reg::_Xmm2HighIdx , gem5::X86ISA::float_reg::_Xmm3LowIdx , gem5::X86ISA::float_reg::_Xmm3HighIdx , gem5::X86ISA::float_reg::_Xmm4LowIdx ,   gem5::X86ISA::float_reg::_Xmm4HighIdx , gem5::X86ISA::float_reg::_Xmm5LowIdx , gem5::X86ISA::float_reg::_Xmm5HighIdx , gem5::X86ISA::float_reg::_Xmm6LowIdx ,   gem5::X86ISA::float_reg::_Xmm6HighIdx , gem5::X86ISA::float_reg::_Xmm7LowIdx , gem5::X86ISA::float_reg::_Xmm7HighIdx , gem5::X86ISA::float_reg::_Xmm8LowIdx ,   gem5::X86ISA::float_reg::_Xmm8HighIdx , gem5::X86ISA::float_reg::_Xmm9LowIdx , gem5::X86ISA::float_reg::_Xmm9HighIdx , gem5::X86ISA::float_reg::_Xmm10LowIdx ,   gem5::X86ISA::float_reg::_Xmm10HighIdx , gem5::X86ISA::float_reg::_Xmm11LowIdx , gem5::X86ISA::float_reg::_Xmm11HighIdx , gem5::X86ISA::float_reg::_Xmm12LowIdx ,   gem5::X86ISA::float_reg::_Xmm12HighIdx , gem5::X86ISA::float_reg::_Xmm13LowIdx , gem5::X86ISA::float_reg::_Xmm13HighIdx , gem5::X86ISA::float_reg::_Xmm14LowIdx ,   gem5::X86ISA::float_reg::_Xmm14HighIdx , gem5::X86ISA::float_reg::_Xmm15LowIdx , gem5::X86ISA::float_reg::_Xmm15HighIdx , gem5::X86ISA::float_reg::MicrofpBase = XmmBase + 2 * NumXMMRegs ,   gem5::X86ISA::float_reg::_Microfp0Idx = MicrofpBase , gem5::X86ISA::float_reg::_Microfp1Idx , gem5::X86ISA::float_reg::_Microfp2Idx , gem5::X86ISA::float_reg::_Microfp3Idx ,   gem5::X86ISA::float_reg::_Microfp4Idx , gem5::X86ISA::float_reg::_Microfp5Idx , gem5::X86ISA::float_reg::_Microfp6Idx , gem5::X86ISA::float_reg::_Microfp7Idx ,   gem5::X86ISA::float_reg::NumRegs = MicrofpBase + NumMicroFpRegs }

Functions
static RegId	gem5::X86ISA::float_reg::mmx (int index)
static RegId	gem5::X86ISA::float_reg::fpr (int index)
static RegId	gem5::X86ISA::float_reg::xmm (int index)
static RegId	gem5::X86ISA::float_reg::xmmLow (int index)
static RegId	gem5::X86ISA::float_reg::xmmHigh (int index)
static RegId	gem5::X86ISA::float_reg::microfp (int index)
static RegId	gem5::X86ISA::float_reg::stack (int index, int top)

Variables
constexpr FlatFloatRegClassOps	gem5::X86ISA::flatFloatRegClassOps
constexpr RegClass	gem5::X86ISA::flatFloatRegClass
constexpr FloatRegClassOps	gem5::X86ISA::floatRegClassOps
constexpr RegClass	gem5::X86ISA::floatRegClass