47 #include <sys/types.h> 57 #include "mem/ruby/protocol/MachineType.hh" 58 #include "mem/ruby/protocol/RubyRequest.hh" 81 using m5::stl_helpers::operator<<;
84 : m_ruby_system(rs), m_hot_lines(p->hot_lines),
85 m_all_instructions(p->all_instructions),
86 m_num_vnets(p->number_of_virtual_networks)
116 .
name(pName +
".delayHist")
117 .
desc(
"delay histogram for all message")
124 .name(pName +
csprintf(
".delayVCHist.vnet_%i",
i))
125 .desc(
csprintf(
"delay histogram for vnet_%i",
i))
131 .
name(pName +
".outstanding_req_hist_seqr")
137 .
name(pName +
".outstanding_req_hist_coalsr")
143 .
name(pName +
".latency_hist_seqr")
149 .
name(pName +
".latency_hist_coalsr")
155 .
name(pName +
".hit_latency_hist_seqr")
161 .
name(pName +
".miss_latency_hist_seqr")
167 .
name(pName +
".miss_latency_hist_coalsr")
171 for (
int i = 0;
i < RubyRequestType_NUM;
i++) {
175 .name(pName +
csprintf(
".%s.latency_hist_seqr",
183 .name(pName +
csprintf(
".%s.latency_hist_coalsr",
191 .name(pName +
csprintf(
".%s.hit_latency_hist_seqr",
199 .name(pName +
csprintf(
".%s.miss_latency_hist_seqr",
207 .name(pName +
csprintf(
".%s.miss_latency_hist_coalsr",
213 for (
int i = 0;
i < MachineType_NUM;
i++) {
217 .name(pName +
csprintf(
".%s.hit_mach_latency_hist_seqr",
225 .name(pName +
csprintf(
".%s.miss_mach_latency_hist_seqr",
233 .name(pName +
csprintf(
".%s.miss_mach_latency_hist_coalsr",
242 ".%s.miss_latency_hist_seqr.issue_to_initial_request",
251 ".%s.miss_latency_hist_coalsr.issue_to_initial_request",
259 .name(pName +
csprintf(
".%s.miss_latency_hist_seqr.initial_to_forward",
267 .name(pName +
csprintf(
".%s.miss_latency_hist_coalsr.initial_to_forward",
276 ".%s.miss_latency_hist_seqr.forward_to_first_response",
285 ".%s.miss_latency_hist_coalsr.forward_to_first_response",
294 ".%s.miss_latency_hist_seqr.first_response_to_completion",
303 ".%s.miss_latency_hist_coalsr.first_response_to_completion",
309 .
name(pName +
csprintf(
".%s.incomplete_times_seqr", MachineType(
i)))
314 for (
int i = 0;
i < RubyRequestType_NUM;
i++) {
319 for (
int j = 0;
j < MachineType_NUM;
j++) {
323 .name(pName +
csprintf(
".%s.%s.hit_type_mach_latency_hist_seqr",
324 RubyRequestType(
i), MachineType(
j)))
331 .name(pName +
csprintf(
".%s.%s.miss_type_mach_latency_hist_seqr",
332 RubyRequestType(
i), MachineType(
j)))
339 .name(pName +
csprintf(
".%s.%s.miss_type_mach_latency_hist_coalsr",
340 RubyRequestType(
i), MachineType(
j)))
358 for (uint32_t
i = 0;
i < MachineType_NUM;
i++) {
359 for (map<uint32_t, AbstractController*>::iterator it =
372 for (uint32_t
i = 0;
i < MachineType_NUM;
i++) {
373 for (map<uint32_t, AbstractController*>::iterator it =
391 for (uint32_t
i = 0;
i < MachineType_NUM;
i++) {
392 for (map<uint32_t, AbstractController*>::iterator it =
405 for (uint32_t
j = 0;
j < RubyRequestType_NUM; ++
j) {
415 for (uint32_t
j = 0;
j < MachineType_NUM; ++
j) {
427 getForwardRequestToFirstResponseHist(MachineType(
j)));
430 getFirstResponseToCompletionDelayHist(
437 for (uint32_t
j = 0;
j < RubyRequestType_NUM;
j++) {
438 for (uint32_t
k = 0;
k < MachineType_NUM;
k++) {
454 for (uint32_t
j = 0;
j < RubyRequestType_NUM; ++
j) {
462 for (uint32_t
j = 0;
j < MachineType_NUM; ++
j) {
472 getForwardRequestToFirstResponseHist(MachineType(
j)));
475 getFirstResponseToCompletionDelayHist(
480 for (uint32_t
j = 0;
j < RubyRequestType_NUM;
j++) {
481 for (uint32_t
k = 0;
k < MachineType_NUM;
k++) {
495 if (msg.
getType() != RubyRequestType_IFETCH) {
Stats::Histogram & getLatencyHist()
const FlagsType pdf
Print the percent of the total that this entry represents.
Stats::Histogram & getMissLatencyHist()
Stats::Scalar m_IncompleteTimesSeqr[MachineType_NUM]
Stats::Histogram & getHitTypeLatencyHist(uint32_t t)
Stats::Histogram m_hitLatencyHistSeqr
Histogram for holding latency profile of all requests that hit in the controller connected to this se...
std::vector< Stats::Histogram * > m_hitMachLatencyHistSeqr
Histograms for profiling the latencies for requests that did not required external messages...
std::vector< Stats::Histogram * > m_FirstResponseToCompletionDelayHistSeqr
std::vector< Stats::Histogram * > m_missTypeLatencyHistCoalsr
AddressProfiler * m_address_profiler_ptr
Stats::Histogram & getIssueToInitialDelayHist(uint32_t t) const
Stats::Histogram & getTypeLatencyHist(uint32_t t)
Stats::Histogram & getMissMachLatencyHist(uint32_t t) const
Stats::Histogram & getMissTypeMachLatencyHist(uint32_t r, uint32_t t) const
std::vector< Stats::Histogram * > m_typeLatencyHistCoalsr
std::vector< Stats::Histogram * > m_IssueToInitialDelayHistCoalsr
std::vector< Stats::Histogram * > m_hitTypeLatencyHistSeqr
Stats::Histogram & getMissTypeLatencyHist(uint32_t t)
Histogram & init(size_type size)
Set the parameters of this histogram.
Overload hash function for BasicBlockRange type.
Stats::Histogram & getHitTypeMachLatencyHist(uint32_t r, uint32_t t)
void setHotLines(bool hot_lines)
Stats::Histogram & getMissTypeMachLatencyHist(uint32_t r, uint32_t t) const
Derived & flags(Flags _flags)
Set the flags and marks this stat to print at the end of simulation.
std::vector< Stats::Histogram * > delayVCHistogram
const RubyRequestType & getType() const
Stats::Histogram & getInitialToForwardDelayHist(const MachineType t) const
std::vector< Stats::Histogram * > m_typeLatencyHistSeqr
Addr getLineAddress() const
Stats::Histogram & getMissMachLatencyHist(uint32_t t) const
std::vector< Stats::Histogram * > m_missTypeLatencyHistSeqr
Stats::Histogram delayHistogram
std::vector< Stats::Histogram * > m_ForwardToFirstResponseDelayHistCoalsr
std::string csprintf(const char *format, const Args &...args)
void addAddressTraceSample(const RubyRequest &msg, NodeID id)
std::vector< std::vector< Stats::Histogram * > > m_hitTypeMachLatencyHistSeqr
Stats::Histogram m_outstandReqHistSeqr
Histogram for number of outstanding requests per cycle.
Stats::Histogram & getOutstandReqHist()
std::vector< Stats::Histogram * > m_FirstResponseToCompletionDelayHistCoalsr
Stats::Histogram & getHitLatencyHist()
Stats::Histogram & getLatencyHist()
const FlagsType oneline
Print all values on a single line.
std::vector< std::map< uint32_t, AbstractController * > > m_abstract_controls
Stats::Histogram & getDelayVCHist(uint32_t index)
std::vector< std::vector< Stats::Histogram * > > m_missTypeMachLatencyHistSeqr
Stats::Histogram & getHitMachLatencyHist(uint32_t t)
std::vector< Stats::Histogram * > m_InitialToForwardDelayHistSeqr
Stats::Histogram m_missLatencyHistSeqr
Histogram for holding latency profile of all requests that miss in the controller connected to this s...
void regStats(const std::string &name)
RubySystem * m_ruby_system
std::vector< Stats::Histogram * > m_InitialToForwardDelayHistCoalsr
const uint32_t m_num_vnets
Stats::Histogram & getOutstandReqHist()
virtual Sequencer * getCPUSequencer() const =0
void setAllInstructions(bool all_instructions)
Stats::Counter getIncompleteTimes(const MachineType t) const
Stats::Histogram m_outstandReqHistCoalsr
Derived & name(const std::string &name)
Set the name and marks this stat to print at the end of simulation.
Stats::Histogram & getMissLatencyHist()
Stats::Histogram & getTypeLatencyHist(uint32_t t)
std::vector< Stats::Histogram * > m_ForwardToFirstResponseDelayHistSeqr
void add(DistBase &d)
Add the argument distribution to the this distribution.
Stats::Histogram & getInitialToForwardDelayHist(const MachineType t) const
Stats::Histogram & getDelayHist()
Addr getProgramCounter() const
Stats::Histogram m_latencyHistCoalsr
virtual GPUCoalescer * getGPUCoalescer() const =0
const bool m_all_instructions
AddressProfiler * m_inst_profiler_ptr
const RubyAccessMode & getAccessMode() const
Stats::Histogram & getMissTypeLatencyHist(uint32_t t)
Derived & desc(const std::string &_desc)
Set the description and marks this stat to print at the end of simulation.
std::vector< Stats::Histogram * > m_missMachLatencyHistCoalsr
std::vector< std::vector< Stats::Histogram * > > m_missTypeMachLatencyHistCoalsr
Stats::Histogram m_latencyHistSeqr
Histogram for holding latency profile of all requests.
const FlagsType nozero
Don't print if this is zero.
std::vector< Stats::Histogram * > m_IssueToInitialDelayHistSeqr
Histograms for recording the breakdown of miss latency.
Stats::Histogram m_missLatencyHistCoalsr
Profiler(const RubySystemParams *params, RubySystem *rs)
std::vector< Stats::Histogram * > m_missMachLatencyHistSeqr
Histograms for profiling the latencies for requests that required external messages.
void regStats(const std::string &name)
Stats::Histogram & getIssueToInitialDelayHist(uint32_t t) const