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arch
arm
insts
pseudo.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2014,2016,2018 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
6
* not be construed as granting a license to any other intellectual
7
* property including but not limited to intellectual property relating
8
* to a hardware implementation of the functionality of the software
9
* licensed hereunder. You may use the software subject to the license
10
* terms below provided that you ensure that this notice is replicated
11
* unmodified and in its entirety in all distributions of the software,
12
* modified or unmodified, in source code or in binary form.
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*
14
* Copyright (c) 2007-2008 The Florida State University
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* All rights reserved.
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*
17
* Redistribution and use in source and binary forms, with or without
18
* modification, are permitted provided that the following conditions are
19
* met: redistributions of source code must retain the above copyright
20
* notice, this list of conditions and the following disclaimer;
21
* redistributions in binary form must reproduce the above copyright
22
* notice, this list of conditions and the following disclaimer in the
23
* documentation and/or other materials provided with the distribution;
24
* neither the name of the copyright holders nor the names of its
25
* contributors may be used to endorse or promote products derived from
26
* this software without specific prior written permission.
27
*
28
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39
*/
40
41
#ifndef __ARCH_ARM_INSTS_PSEUDO_HH__
42
#define __ARCH_ARM_INSTS_PSEUDO_HH__
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44
#include "
arch/arm/insts/static_inst.hh
"
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46
class
DecoderFaultInst
:
public
ArmStaticInst
47
{
48
protected
:
49
DecoderFault
faultId
;
50
51
const
char
*
faultName
()
const
;
52
53
public
:
54
DecoderFaultInst
(
ExtMachInst
_machInst);
55
56
Fault
execute
(
ExecContext
*xc,
57
Trace::InstRecord
*traceData)
const override
;
58
59
std::string
generateDisassembly
(
60
Addr
pc
,
const
Loader::SymbolTable
*symtab)
const override
;
61
};
62
70
class
FailUnimplemented
:
public
ArmStaticInst
71
{
72
private
:
75
std::string
fullMnemonic
;
76
77
public
:
78
FailUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst);
79
FailUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst,
80
const
std::string& _fullMnemonic);
81
82
Fault
execute
(
ExecContext
*xc,
83
Trace::InstRecord
*traceData)
const override
;
84
85
std::string
generateDisassembly
(
86
Addr
pc
,
const
Loader::SymbolTable
*symtab)
const override
;
87
};
88
98
class
WarnUnimplemented
:
public
ArmStaticInst
99
{
100
private
:
102
mutable
bool
warned
;
105
std::string
fullMnemonic
;
106
107
public
:
108
WarnUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst);
109
WarnUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst,
110
const
std::string& _fullMnemonic);
111
112
Fault
execute
(
ExecContext
*xc,
113
Trace::InstRecord
*traceData)
const override
;
114
115
std::string
generateDisassembly
(
116
Addr
pc
,
const
Loader::SymbolTable
*symtab)
const override
;
117
};
118
126
class
IllegalExecInst
:
public
ArmStaticInst
127
{
128
public
:
129
IllegalExecInst
(
ExtMachInst
_machInst);
130
131
Fault
execute
(
ExecContext
*xc,
Trace::InstRecord
*traceData)
const
;
132
};
133
134
#endif
DecoderFaultInst::faultId
DecoderFault faultId
Definition:
pseudo.hh:49
DecoderFaultInst::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition:
pseudo.cc:56
Loader::SymbolTable
Definition:
symtab.hh:42
WarnUnimplemented::warned
bool warned
Have we warned on this instruction yet?
Definition:
pseudo.hh:102
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition:
exec_context.hh:70
MipsISA::pc
Bitfield< 4 > pc
Definition:
pra_constants.hh:240
static_inst.hh
ArmISA::ArmStaticInst
Definition:
static_inst.hh:58
FailUnimplemented
Static instruction class for unimplemented instructions that cause simulator termination.
Definition:
pseudo.hh:70
DecoderFaultInst::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition:
pseudo.cc:100
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:140
WarnUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition:
pseudo.hh:105
DecoderFaultInst::DecoderFaultInst
DecoderFaultInst(ExtMachInst _machInst)
Definition:
pseudo.cc:45
DecoderFaultInst::faultName
const char * faultName() const
Definition:
pseudo.cc:83
Trace::InstRecord
Definition:
insttracer.hh:55
FailUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition:
pseudo.hh:75
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition:
static_inst.hh:89
Fault
std::shared_ptr< FaultBase > Fault
Definition:
types.hh:238
IllegalExecInst
This class is modelling instructions which are not going to be executed since they are flagged as Ill...
Definition:
pseudo.hh:126
ArmISA::DecoderFault
DecoderFault
Instruction decoder fault codes in ExtMachInst.
Definition:
types.hh:655
WarnUnimplemented
Base class for unimplemented instructions that cause a warning to be printed (but do not terminate si...
Definition:
pseudo.hh:98
DecoderFaultInst
Definition:
pseudo.hh:46
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