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LSQUnit< Impl > Class Template Reference

Class that implements the actual LQ and SQ for each specific thread. More...

#include <lsq_unit.hh>

Classes

class  LQSenderState
 Particularisation of the LSQSenderState to the LQ. More...
 
class  LSQEntry
 
class  SQEntry
 
class  SQSenderState
 Particularisation of the LSQSenderState to the SQ. More...
 
class  WritebackEvent
 Writeback event, specifically for when stores forward data to loads. More...
 

Public Types

typedef Impl::O3CPU O3CPU
 
typedef Impl::DynInstPtr DynInstPtr
 
typedef Impl::CPUPol::IEW IEW
 
typedef Impl::CPUPol::LSQ LSQ
 
typedef Impl::CPUPol::IssueStruct IssueStruct
 
using LSQSenderState = typename LSQ::LSQSenderState
 
using LSQRequest = typename Impl::CPUPol::LSQ::LSQRequest
 
using LoadQueue = CircularQueue< LQEntry >
 
using StoreQueue = CircularQueue< SQEntry >
 
typedef CircularQueue< LQEntry >::iterator LQIterator
 
typedef CircularQueue< SQEntry >::iterator SQIterator
 
typedef CircularQueue< LQEntryLQueue
 
typedef CircularQueue< SQEntrySQueue
 

Public Member Functions

 LSQUnit (uint32_t lqEntries, uint32_t sqEntries)
 Constructs an LSQ unit. More...
 
 LSQUnit (const LSQUnit &l)
 We cannot copy LSQUnit because it has stats for which copy contructor is deleted explicitly. More...
 
void init (O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params, LSQ *lsq_ptr, unsigned id)
 Initializes the LSQ unit with the specified number of entries. More...
 
std::string name () const
 Returns the name of the LSQ unit. More...
 
void regStats ()
 Registers statistics. More...
 
void setDcachePort (MasterPort *dcache_port)
 Sets the pointer to the dcache port. More...
 
void drainSanityCheck () const
 Perform sanity checks after a drain. More...
 
void takeOverFrom ()
 Takes over from another CPU's thread. More...
 
void insert (const DynInstPtr &inst)
 Inserts an instruction. More...
 
void insertLoad (const DynInstPtr &load_inst)
 Inserts a load instruction. More...
 
void insertStore (const DynInstPtr &store_inst)
 Inserts a store instruction. More...
 
Fault checkViolations (typename LoadQueue::iterator &loadIt, const DynInstPtr &inst)
 Check for ordering violations in the LSQ. More...
 
void checkSnoop (PacketPtr pkt)
 Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate. More...
 
Fault executeLoad (const DynInstPtr &inst)
 Executes a load instruction. More...
 
Fault executeLoad (int lq_idx)
 
Fault executeStore (const DynInstPtr &inst)
 Executes a store instruction. More...
 
void commitLoad ()
 Commits the head load. More...
 
void commitLoads (InstSeqNum &youngest_inst)
 Commits loads older than a specific sequence number. More...
 
void commitStores (InstSeqNum &youngest_inst)
 Commits stores older than a specific sequence number. More...
 
void writebackStores ()
 Writes back stores. More...
 
void completeDataAccess (PacketPtr pkt)
 Completes the data access that has been returned from the memory system. More...
 
void squash (const InstSeqNum &squashed_num)
 Squashes all instructions younger than a specific sequence number. More...
 
bool violation ()
 Returns if there is a memory ordering violation. More...
 
DynInstPtr getMemDepViolator ()
 Returns the memory ordering violator. More...
 
unsigned numFreeLoadEntries ()
 Returns the number of free LQ entries. More...
 
unsigned numFreeStoreEntries ()
 Returns the number of free SQ entries. More...
 
int numLoads ()
 Returns the number of loads in the LQ. More...
 
int numStores ()
 Returns the number of stores in the SQ. More...
 
bool isFull ()
 Returns if either the LQ or SQ is full. More...
 
bool isEmpty () const
 Returns if both the LQ and SQ are empty. More...
 
bool lqFull ()
 Returns if the LQ is full. More...
 
bool sqFull ()
 Returns if the SQ is full. More...
 
bool lqEmpty () const
 Returns if the LQ is empty. More...
 
bool sqEmpty () const
 Returns if the SQ is empty. More...
 
unsigned getCount ()
 Returns the number of instructions in the LSQ. More...
 
bool hasStoresToWB ()
 Returns if there are any stores to writeback. More...
 
int numStoresToWB ()
 Returns the number of stores to writeback. More...
 
bool willWB ()
 Returns if the LSQ unit will writeback on this cycle. More...
 
void recvRetry ()
 Handles doing the retry. More...
 
unsigned int cacheLineSize ()
 
bool trySendPacket (bool isLoad, PacketPtr data_pkt)
 Attempts to send a packet to the cache. More...
 
void dumpInsts () const
 Debugging function to dump instructions in the LSQ. More...
 
void schedule (Event &ev, Tick when)
 Schedule event for the cpu. More...
 
BaseTLBdTLB ()
 
bool recvTimingResp (PacketPtr pkt)
 Handles writing back and completing the load or store that has returned from memory. More...
 
Fault read (LSQRequest *req, int load_idx)
 Executes the load at the given index. More...
 
Fault write (LSQRequest *req, uint8_t *data, int store_idx)
 Executes the store at the given index. More...
 
int getLoadHead ()
 Returns the index of the head load instruction. More...
 
InstSeqNum getLoadHeadSeqNum ()
 Returns the sequence number of the head load instruction. More...
 
int getStoreHead ()
 Returns the index of the head store instruction. More...
 
InstSeqNum getStoreHeadSeqNum ()
 Returns the sequence number of the head store instruction. More...
 
bool isStalled ()
 Returns whether or not the LSQ unit is stalled. More...
 

Public Attributes

CircularQueue< SQEntrystoreQueue
 The store queue. More...
 
LoadQueue loadQueue
 The load queue. More...
 

Static Public Attributes

static constexpr auto MaxDataBytes = MaxVecRegLenInBytes
 

Private Types

enum  AddrRangeCoverage { AddrRangeCoverage::PartialAddrRangeCoverage, AddrRangeCoverage::FullAddrRangeCoverage, AddrRangeCoverage::NoAddrRangeCoverage }
 Coverage of one address range with another. More...
 
using LQEntry = LSQEntry
 

Private Member Functions

void resetState ()
 Reset the LSQ state. More...
 
void writeback (const DynInstPtr &inst, PacketPtr pkt)
 Writes back the instruction, sending it to IEW. More...
 
void writebackBlockedStore ()
 Try to finish a previously blocked write back attempt. More...
 
void completeStore (typename StoreQueue::iterator store_idx)
 Completes the store at the specified index. More...
 
void storePostSend ()
 Handles completing the send of a store to memory. More...
 

Private Attributes

O3CPUcpu
 Pointer to the CPU. More...
 
IEWiewStage
 Pointer to the IEW stage. More...
 
LSQlsq
 Pointer to the LSQ. More...
 
MasterPortdcachePort
 Pointer to the dcache port. More...
 
ThreadID lsqID
 The LSQUnit thread id. More...
 
unsigned depCheckShift
 The number of places to shift addresses in the LSQ before checking for dependency violations. More...
 
bool checkLoads
 Should loads be checked for dependency issues. More...
 
int loads
 The number of load instructions in the LQ. More...
 
int stores
 The number of store instructions in the SQ. More...
 
int storesToWB
 The number of store instructions in the SQ waiting to writeback. More...
 
StoreQueue::iterator storeWBIt
 The index of the first instruction that may be ready to be written back, and has not yet been written back. More...
 
Addr cacheBlockMask
 Address Mask for a cache block (e.g. More...
 
TimeBuffer< IssueStruct >::wire fromIssue
 Wire to read information from the issue stage time queue. More...
 
bool stalled
 Whether or not the LSQ is stalled. More...
 
InstSeqNum stallingStoreIsn
 The store that causes the stall due to partial store to load forwarding. More...
 
int stallingLoadIdx
 The index of the above store. More...
 
PacketPtr retryPkt
 The packet that needs to be retried. More...
 
bool isStoreBlocked
 Whehter or not a store is blocked due to the memory system. More...
 
bool storeInFlight
 Whether or not a store is in flight. More...
 
DynInstPtr memDepViolator
 The oldest load that caused a memory ordering violation. More...
 
bool hasPendingRequest
 Whether or not there is a packet that couldn't be sent because of a lack of cache ports. More...
 
LSQRequestpendingRequest
 The packet that is pending free cache ports. More...
 
bool needsTSO
 Flag for memory model. More...
 
Stats::Scalar lsqForwLoads
 Total number of loads forwaded from LSQ stores. More...
 
Stats::Scalar invAddrLoads
 Total number of loads ignored due to invalid addresses. More...
 
Stats::Scalar lsqSquashedLoads
 Total number of squashed loads. More...
 
Stats::Scalar lsqIgnoredResponses
 Total number of responses from the memory system that are ignored due to the instruction already being squashed. More...
 
Stats::Scalar lsqMemOrderViolation
 Tota number of memory ordering violations. More...
 
Stats::Scalar lsqSquashedStores
 Total number of squashed stores. More...
 
Stats::Scalar invAddrSwpfs
 Total number of software prefetches ignored due to invalid addresses. More...
 
Stats::Scalar lsqBlockedLoads
 Ready loads blocked due to partial store-forwarding. More...
 
Stats::Scalar lsqRescheduledLoads
 Number of loads that were rescheduled. More...
 
Stats::Scalar lsqCacheBlocked
 Number of times the LSQ is blocked due to the cache. More...
 

Detailed Description

template<class Impl>
class LSQUnit< Impl >

Class that implements the actual LQ and SQ for each specific thread.

Both are circular queues; load entries are freed upon committing, while store entries are freed once they writeback. The LSQUnit tracks if there are memory ordering violations, and also detects partial load to store forwarding cases (a store only has part of a load's data) that requires the load to wait until the store writes back. In the former case it holds onto the instruction until the dependence unit looks at it, and in the latter it stalls the LSQ until the store writes back. At that point the load is replayed.

Definition at line 77 of file lsq_unit.hh.

Member Typedef Documentation

◆ DynInstPtr

template<class Impl>
typedef Impl::DynInstPtr LSQUnit< Impl >::DynInstPtr

Definition at line 83 of file lsq_unit.hh.

◆ IEW

template<class Impl>
typedef Impl::CPUPol::IEW LSQUnit< Impl >::IEW

Definition at line 84 of file lsq_unit.hh.

◆ IssueStruct

template<class Impl>
typedef Impl::CPUPol::IssueStruct LSQUnit< Impl >::IssueStruct

Definition at line 86 of file lsq_unit.hh.

◆ LoadQueue

template<class Impl>
using LSQUnit< Impl >::LoadQueue = CircularQueue<LQEntry>

Definition at line 217 of file lsq_unit.hh.

◆ LQEntry

template<class Impl>
using LSQUnit< Impl >::LQEntry = LSQEntry
private

Definition at line 206 of file lsq_unit.hh.

◆ LQIterator

template<class Impl>
typedef CircularQueue<LQEntry>::iterator LSQUnit< Impl >::LQIterator

Definition at line 609 of file lsq_unit.hh.

◆ LQueue

template<class Impl>
typedef CircularQueue<LQEntry> LSQUnit< Impl >::LQueue

Definition at line 611 of file lsq_unit.hh.

◆ LSQ

template<class Impl>
typedef Impl::CPUPol::LSQ LSQUnit< Impl >::LSQ

Definition at line 85 of file lsq_unit.hh.

◆ LSQRequest

template<class Impl>
using LSQUnit< Impl >::LSQRequest = typename Impl::CPUPol::LSQ::LSQRequest

Definition at line 89 of file lsq_unit.hh.

◆ LSQSenderState

template<class Impl>
using LSQUnit< Impl >::LSQSenderState = typename LSQ::LSQSenderState

Definition at line 88 of file lsq_unit.hh.

◆ O3CPU

template<class Impl>
typedef Impl::O3CPU LSQUnit< Impl >::O3CPU

Definition at line 82 of file lsq_unit.hh.

◆ SQIterator

template<class Impl>
typedef CircularQueue<SQEntry>::iterator LSQUnit< Impl >::SQIterator

Definition at line 610 of file lsq_unit.hh.

◆ SQueue

template<class Impl>
typedef CircularQueue<SQEntry> LSQUnit< Impl >::SQueue

Definition at line 612 of file lsq_unit.hh.

◆ StoreQueue

template<class Impl>
using LSQUnit< Impl >::StoreQueue = CircularQueue<SQEntry>

Definition at line 218 of file lsq_unit.hh.

Member Enumeration Documentation

◆ AddrRangeCoverage

template<class Impl>
enum LSQUnit::AddrRangeCoverage
strongprivate

Coverage of one address range with another.

Enumerator
PartialAddrRangeCoverage 
FullAddrRangeCoverage 
NoAddrRangeCoverage 

Definition at line 209 of file lsq_unit.hh.

Constructor & Destructor Documentation

◆ LSQUnit() [1/2]

template<class Impl >
LSQUnit< Impl >::LSQUnit ( uint32_t  lqEntries,
uint32_t  sqEntries 
)

Constructs an LSQ unit.

init() must be called prior to use.

Definition at line 143 of file lsq_unit_impl.hh.

◆ LSQUnit() [2/2]

template<class Impl>
LSQUnit< Impl >::LSQUnit ( const LSQUnit< Impl > &  l)
inline

Member Function Documentation

◆ cacheLineSize()

template<class Impl >
unsigned int LSQUnit< Impl >::cacheLineSize ( )

Definition at line 1130 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::cpu.

Referenced by LSQUnit< Impl >::willWB().

◆ checkSnoop()

template<class Impl >
void LSQUnit< Impl >::checkSnoop ( PacketPtr  pkt)

◆ checkViolations()

template<class Impl >
Fault LSQUnit< Impl >::checkViolations ( typename LoadQueue::iterator &  loadIt,
const DynInstPtr inst 
)

Check for ordering violations in the LSQ.

For a store squash if we ever find a conflicting load. For a load, only squash if we an external snoop invalidate has been seen for that load address

Parameters
load_idxindex to start checking at
instthe instruction to check
Todo:
in theory you only need to check an instruction that has executed however, there isn't a good way in the pipeline at the moment to check all instructions that will execute before the store writes back. Thus, like the implementation that came before it, we're overly conservative.

Definition at line 449 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::depCheckShift, DPRINTF, CircularQueue< T >::end(), LSQUnit< Impl >::loadQueue, LSQUnit< Impl >::lsqMemOrderViolation, LSQUnit< Impl >::memDepViolator, and NoFault.

Referenced by LSQUnit< Impl >::executeLoad(), LSQUnit< Impl >::executeStore(), and LSQUnit< Impl >::LSQUnit().

◆ commitLoad()

template<class Impl >
void LSQUnit< Impl >::commitLoad ( )

◆ commitLoads()

template<class Impl >
void LSQUnit< Impl >::commitLoads ( InstSeqNum youngest_inst)

Commits loads older than a specific sequence number.

Definition at line 666 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::commitLoad(), CircularQueue< T >::front(), LSQUnit< Impl >::loadQueue, and LSQUnit< Impl >::loads.

Referenced by LSQUnit< Impl >::executeLoad().

◆ commitStores()

template<class Impl >
void LSQUnit< Impl >::commitStores ( InstSeqNum youngest_inst)

Commits stores older than a specific sequence number.

Definition at line 678 of file lsq_unit_impl.hh.

References DPRINTF, LSQUnit< Impl >::storeQueue, LSQUnit< Impl >::stores, LSQUnit< Impl >::storesToWB, and RiscvISA::x.

Referenced by LSQUnit< Impl >::executeLoad().

◆ completeDataAccess()

template<class Impl >
void LSQUnit< Impl >::completeDataAccess ( PacketPtr  pkt)

Completes the data access that has been returned from the memory system.

Definition at line 110 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::cpu, LSQUnit< Impl >::WritebackEvent::inst, Packet::senderState, ArmISA::ss, and LSQUnit< Impl >::writeback().

Referenced by LSQUnit< Impl >::executeLoad().

◆ completeStore()

template<class Impl >
void LSQUnit< Impl >::completeStore ( typename StoreQueue::iterator  store_idx)
private

◆ drainSanityCheck()

template<class Impl >
void LSQUnit< Impl >::drainSanityCheck ( ) const

Perform sanity checks after a drain.

Definition at line 255 of file lsq_unit_impl.hh.

References CircularQueue< T >::capacity(), ArmISA::i, LSQUnit< Impl >::loadQueue, LSQUnit< Impl >::retryPkt, and LSQUnit< Impl >::storesToWB.

Referenced by LSQUnit< Impl >::LSQUnit().

◆ dTLB()

template<class Impl>
BaseTLB* LSQUnit< Impl >::dTLB ( )
inline

Definition at line 388 of file lsq_unit.hh.

References LSQUnit< Impl >::cpu.

◆ dumpInsts()

template<class Impl >
void LSQUnit< Impl >::dumpInsts ( ) const

Debugging function to dump instructions in the LSQ.

Definition at line 1105 of file lsq_unit_impl.hh.

References cprintf(), ArmISA::e, LSQUnit< Impl >::loadQueue, LSQUnit< Impl >::loads, LSQUnit< Impl >::storeQueue, and LSQUnit< Impl >::stores.

Referenced by LSQUnit< Impl >::willWB().

◆ executeLoad() [1/2]

template<class Impl >
Fault LSQUnit< Impl >::executeLoad ( const DynInstPtr inst)

Executes a load instruction.

Definition at line 530 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::checkLoads, LSQUnit< Impl >::checkViolations(), DPRINTF, LSQUnit< Impl >::iewStage, and NoFault.

Referenced by LSQUnit< Impl >::LSQUnit().

◆ executeLoad() [2/2]

template<class Impl>
Fault LSQUnit< Impl >::executeLoad ( int  lq_idx)
inline

◆ executeStore()

template<class Impl >
Fault LSQUnit< Impl >::executeStore ( const DynInstPtr inst)

◆ getCount()

template<class Impl>
unsigned LSQUnit< Impl >::getCount ( )
inline

Returns the number of instructions in the LSQ.

Definition at line 335 of file lsq_unit.hh.

References LSQUnit< Impl >::loads, and LSQUnit< Impl >::stores.

◆ getLoadHead()

template<class Impl>
int LSQUnit< Impl >::getLoadHead ( )
inline

Returns the index of the head load instruction.

Definition at line 584 of file lsq_unit.hh.

References CircularQueue< T >::head().

◆ getLoadHeadSeqNum()

template<class Impl>
InstSeqNum LSQUnit< Impl >::getLoadHeadSeqNum ( )
inline

Returns the sequence number of the head load instruction.

Definition at line 588 of file lsq_unit.hh.

References CircularQueue< T >::front().

◆ getMemDepViolator()

template<class Impl >
Impl::DynInstPtr LSQUnit< Impl >::getMemDepViolator ( )

Returns the memory ordering violator.

Definition at line 334 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::memDepViolator.

Referenced by LSQUnit< Impl >::violation().

◆ getStoreHead()

template<class Impl>
int LSQUnit< Impl >::getStoreHead ( )
inline

Returns the index of the head store instruction.

Definition at line 596 of file lsq_unit.hh.

References CircularQueue< T >::head().

◆ getStoreHeadSeqNum()

template<class Impl>
InstSeqNum LSQUnit< Impl >::getStoreHeadSeqNum ( )
inline

Returns the sequence number of the head store instruction.

Definition at line 599 of file lsq_unit.hh.

References CircularQueue< T >::front().

◆ hasStoresToWB()

template<class Impl>
bool LSQUnit< Impl >::hasStoresToWB ( )
inline

Returns if there are any stores to writeback.

Definition at line 338 of file lsq_unit.hh.

References LSQUnit< Impl >::storesToWB.

◆ init()

template<class Impl >
void LSQUnit< Impl >::init ( O3CPU cpu_ptr,
IEW iew_ptr,
DerivO3CPUParams *  params,
LSQ lsq_ptr,
unsigned  id 
)

◆ insert()

template<class Impl >
void LSQUnit< Impl >::insert ( const DynInstPtr inst)

Inserts an instruction.

Definition at line 273 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::insertLoad(), and LSQUnit< Impl >::insertStore().

Referenced by LSQUnit< Impl >::LSQUnit().

◆ insertLoad()

template<class Impl >
void LSQUnit< Impl >::insertLoad ( const DynInstPtr load_inst)

◆ insertStore()

template<class Impl >
void LSQUnit< Impl >::insertStore ( const DynInstPtr store_inst)

◆ isEmpty()

template<class Impl>
bool LSQUnit< Impl >::isEmpty ( ) const
inline

Returns if both the LQ and SQ are empty.

Definition at line 320 of file lsq_unit.hh.

References LSQUnit< Impl >::lqEmpty(), and LSQUnit< Impl >::sqEmpty().

◆ isFull()

template<class Impl>
bool LSQUnit< Impl >::isFull ( )
inline

Returns if either the LQ or SQ is full.

Definition at line 317 of file lsq_unit.hh.

References LSQUnit< Impl >::lqFull(), and LSQUnit< Impl >::sqFull().

◆ isStalled()

template<class Impl>
bool LSQUnit< Impl >::isStalled ( )
inline

Returns whether or not the LSQ unit is stalled.

Definition at line 607 of file lsq_unit.hh.

References LSQUnit< Impl >::stalled.

Referenced by LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::squash(), and LSQUnit< Impl >::storePostSend().

◆ lqEmpty()

template<class Impl>
bool LSQUnit< Impl >::lqEmpty ( ) const
inline

Returns if the LQ is empty.

Definition at line 329 of file lsq_unit.hh.

References LSQUnit< Impl >::loads.

Referenced by LSQUnit< Impl >::isEmpty().

◆ lqFull()

template<class Impl>
bool LSQUnit< Impl >::lqFull ( )
inline

Returns if the LQ is full.

Definition at line 323 of file lsq_unit.hh.

References CircularQueue< T >::full(), and LSQUnit< Impl >::loadQueue.

Referenced by LSQUnit< Impl >::isFull().

◆ name()

template<class Impl >
std::string LSQUnit< Impl >::name ( ) const

Returns the name of the LSQ unit.

Definition at line 192 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::iewStage, LSQUnit< Impl >::lsqID, and sc_dt::to_string().

Referenced by LSQUnit< Impl >::LSQUnit(), and LSQUnit< Impl >::regStats().

◆ numFreeLoadEntries()

template<class Impl >
unsigned LSQUnit< Impl >::numFreeLoadEntries ( )

Returns the number of free LQ entries.

Definition at line 345 of file lsq_unit_impl.hh.

References CircularQueue< T >::capacity(), DPRINTF, LSQUnit< Impl >::loadQueue, and LSQUnit< Impl >::loads.

Referenced by LSQUnit< Impl >::violation().

◆ numFreeStoreEntries()

template<class Impl >
unsigned LSQUnit< Impl >::numFreeStoreEntries ( )

Returns the number of free SQ entries.

Definition at line 356 of file lsq_unit_impl.hh.

References DPRINTF, LSQUnit< Impl >::storeQueue, and LSQUnit< Impl >::stores.

Referenced by LSQUnit< Impl >::violation().

◆ numLoads()

template<class Impl>
int LSQUnit< Impl >::numLoads ( )
inline

Returns the number of loads in the LQ.

Definition at line 311 of file lsq_unit.hh.

References LSQUnit< Impl >::loads.

◆ numStores()

template<class Impl>
int LSQUnit< Impl >::numStores ( )
inline

Returns the number of stores in the SQ.

Definition at line 314 of file lsq_unit.hh.

References LSQUnit< Impl >::stores.

◆ numStoresToWB()

template<class Impl>
int LSQUnit< Impl >::numStoresToWB ( )
inline

Returns the number of stores to writeback.

Definition at line 341 of file lsq_unit.hh.

References LSQUnit< Impl >::storesToWB.

◆ read()

template<class Impl >
Fault LSQUnit< Impl >::read ( LSQRequest req,
int  load_idx 
)

◆ recvRetry()

template<class Impl >
void LSQUnit< Impl >::recvRetry ( )

Handles doing the retry.

Definition at line 1095 of file lsq_unit_impl.hh.

References DPRINTF, LSQUnit< Impl >::isStoreBlocked, and LSQUnit< Impl >::writebackBlockedStore().

Referenced by LSQUnit< Impl >::willWB().

◆ recvTimingResp()

template<class Impl >
bool LSQUnit< Impl >::recvTimingResp ( PacketPtr  pkt)

Handles writing back and completing the load or store that has returned from memory.

Parameters
pktResponse packet from the memory sub-system

Definition at line 92 of file lsq_unit_impl.hh.

References Packet::senderState.

◆ regStats()

template<class Impl >
void LSQUnit< Impl >::regStats ( )

◆ resetState()

template<class Impl >
void LSQUnit< Impl >::resetState ( )
private

◆ schedule()

template<class Impl>
void LSQUnit< Impl >::schedule ( Event ev,
Tick  when 
)
inline

Schedule event for the cpu.

Definition at line 386 of file lsq_unit.hh.

References LSQUnit< Impl >::cpu.

◆ setDcachePort()

template<class Impl >
void LSQUnit< Impl >::setDcachePort ( MasterPort dcache_port)

Sets the pointer to the dcache port.

Definition at line 248 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::dcachePort.

Referenced by LSQUnit< Impl >::LSQUnit().

◆ sqEmpty()

template<class Impl>
bool LSQUnit< Impl >::sqEmpty ( ) const
inline

Returns if the SQ is empty.

Definition at line 332 of file lsq_unit.hh.

References LSQUnit< Impl >::stores.

Referenced by LSQUnit< Impl >::isEmpty().

◆ sqFull()

template<class Impl>
bool LSQUnit< Impl >::sqFull ( )
inline

Returns if the SQ is full.

Definition at line 326 of file lsq_unit.hh.

References LSQUnit< Impl >::storeQueue.

Referenced by LSQUnit< Impl >::isFull().

◆ squash()

template<class Impl >
void LSQUnit< Impl >::squash ( const InstSeqNum squashed_num)

◆ storePostSend()

template<class Impl >
void LSQUnit< Impl >::storePostSend ( )
private

◆ takeOverFrom()

template<class Impl >
void LSQUnit< Impl >::takeOverFrom ( )

Takes over from another CPU's thread.

Definition at line 266 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::resetState().

Referenced by LSQUnit< Impl >::LSQUnit().

◆ trySendPacket()

template<class Impl >
bool LSQUnit< Impl >::trySendPacket ( bool  isLoad,
PacketPtr  data_pkt 
)

◆ violation()

template<class Impl>
bool LSQUnit< Impl >::violation ( )
inline

Returns if there is a memory ordering violation.

Value is reset upon call to getMemDepViolator().

Definition at line 299 of file lsq_unit.hh.

References LSQUnit< Impl >::getMemDepViolator(), LSQUnit< Impl >::memDepViolator, LSQUnit< Impl >::numFreeLoadEntries(), and LSQUnit< Impl >::numFreeStoreEntries().

◆ willWB()

template<class Impl>
bool LSQUnit< Impl >::willWB ( )
inline

◆ write()

template<class Impl >
Fault LSQUnit< Impl >::write ( LSQRequest req,
uint8_t *  data,
int  store_idx 
)

◆ writeback()

template<class Impl >
void LSQUnit< Impl >::writeback ( const DynInstPtr inst,
PacketPtr  pkt 
)
private

Writes back the instruction, sending it to IEW.

Definition at line 947 of file lsq_unit_impl.hh.

References DPRINTF, LSQUnit< Impl >::iewStage, LSQUnit< Impl >::lsqIgnoredResponses, and NoFault.

Referenced by LSQUnit< Impl >::completeDataAccess(), and LSQUnit< Impl >::willWB().

◆ writebackBlockedStore()

template<class Impl >
void LSQUnit< Impl >::writebackBlockedStore ( )
private

Try to finish a previously blocked write back attempt.

Definition at line 705 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::isStoreBlocked, LSQUnit< Impl >::storePostSend(), and LSQUnit< Impl >::storeWBIt.

Referenced by LSQUnit< Impl >::recvRetry(), LSQUnit< Impl >::willWB(), and LSQUnit< Impl >::writebackStores().

◆ writebackStores()

template<class Impl >
void LSQUnit< Impl >::writebackStores ( )

Member Data Documentation

◆ cacheBlockMask

template<class Impl>
Addr LSQUnit< Impl >::cacheBlockMask
private

Address Mask for a cache block (e.g.

~(cache_block_size-1))

Definition at line 506 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::checkSnoop(), LSQUnit< Impl >::resetState(), and LSQUnit< Impl >::writebackStores().

◆ checkLoads

template<class Impl>
bool LSQUnit< Impl >::checkLoads
private

Should loads be checked for dependency issues.

Definition at line 491 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::executeLoad(), and LSQUnit< Impl >::init().

◆ cpu

template<class Impl>
O3CPU* LSQUnit< Impl >::cpu
private

◆ dcachePort

template<class Impl>
MasterPort* LSQUnit< Impl >::dcachePort
private

Pointer to the dcache port.

Used only for sending.

Definition at line 401 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::setDcachePort(), and LSQUnit< Impl >::trySendPacket().

◆ depCheckShift

template<class Impl>
unsigned LSQUnit< Impl >::depCheckShift
private

The number of places to shift addresses in the LSQ before checking for dependency violations.

Definition at line 488 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::checkViolations(), and LSQUnit< Impl >::init().

◆ fromIssue

template<class Impl>
TimeBuffer<IssueStruct>::wire LSQUnit< Impl >::fromIssue
private

Wire to read information from the issue stage time queue.

Definition at line 509 of file lsq_unit.hh.

◆ hasPendingRequest

template<class Impl>
bool LSQUnit< Impl >::hasPendingRequest
private

Whether or not there is a packet that couldn't be sent because of a lack of cache ports.

Definition at line 534 of file lsq_unit.hh.

◆ iewStage

template<class Impl>
IEW* LSQUnit< Impl >::iewStage
private

◆ invAddrLoads

template<class Impl>
Stats::Scalar LSQUnit< Impl >::invAddrLoads
private

Total number of loads ignored due to invalid addresses.

Definition at line 549 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats().

◆ invAddrSwpfs

template<class Impl>
Stats::Scalar LSQUnit< Impl >::invAddrSwpfs
private

Total number of software prefetches ignored due to invalid addresses.

Definition at line 565 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats().

◆ isStoreBlocked

template<class Impl>
bool LSQUnit< Impl >::isStoreBlocked
private

Whehter or not a store is blocked due to the memory system.

Definition at line 524 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::recvRetry(), LSQUnit< Impl >::trySendPacket(), LSQUnit< Impl >::willWB(), LSQUnit< Impl >::writebackBlockedStore(), and LSQUnit< Impl >::writebackStores().

◆ loadQueue

template<class Impl>
LoadQueue LSQUnit< Impl >::loadQueue

◆ loads

template<class Impl>
int LSQUnit< Impl >::loads
private

◆ lsq

template<class Impl>
LSQ* LSQUnit< Impl >::lsq
private

Pointer to the LSQ.

Definition at line 398 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::init(), LSQUnit< Impl >::trySendPacket(), and LSQUnit< Impl >::writebackStores().

◆ lsqBlockedLoads

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqBlockedLoads
private

Ready loads blocked due to partial store-forwarding.

Definition at line 568 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats().

◆ lsqCacheBlocked

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqCacheBlocked
private

Number of times the LSQ is blocked due to the cache.

Definition at line 574 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats(), and LSQUnit< Impl >::trySendPacket().

◆ lsqForwLoads

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqForwLoads
private

Total number of loads forwaded from LSQ stores.

Definition at line 546 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::read(), and LSQUnit< Impl >::regStats().

◆ lsqID

template<class Impl>
ThreadID LSQUnit< Impl >::lsqID
private

◆ lsqIgnoredResponses

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqIgnoredResponses
private

Total number of responses from the memory system that are ignored due to the instruction already being squashed.

Definition at line 556 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats(), and LSQUnit< Impl >::writeback().

◆ lsqMemOrderViolation

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqMemOrderViolation
private

Tota number of memory ordering violations.

Definition at line 559 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::checkViolations(), and LSQUnit< Impl >::regStats().

◆ lsqRescheduledLoads

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqRescheduledLoads
private

Number of loads that were rescheduled.

Definition at line 571 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::read(), and LSQUnit< Impl >::regStats().

◆ lsqSquashedLoads

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqSquashedLoads
private

Total number of squashed loads.

Definition at line 552 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats(), and LSQUnit< Impl >::squash().

◆ lsqSquashedStores

template<class Impl>
Stats::Scalar LSQUnit< Impl >::lsqSquashedStores
private

Total number of squashed stores.

Definition at line 562 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::regStats(), and LSQUnit< Impl >::squash().

◆ MaxDataBytes

template<class Impl>
constexpr auto LSQUnit< Impl >::MaxDataBytes = MaxVecRegLenInBytes
static

Definition at line 80 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::read().

◆ memDepViolator

template<class Impl>
DynInstPtr LSQUnit< Impl >::memDepViolator
private

The oldest load that caused a memory ordering violation.

Definition at line 530 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::checkViolations(), LSQUnit< Impl >::getMemDepViolator(), LSQUnit< Impl >::resetState(), LSQUnit< Impl >::squash(), and LSQUnit< Impl >::violation().

◆ needsTSO

template<class Impl>
bool LSQUnit< Impl >::needsTSO
private

◆ pendingRequest

template<class Impl>
LSQRequest* LSQUnit< Impl >::pendingRequest
private

The packet that is pending free cache ports.

Definition at line 537 of file lsq_unit.hh.

◆ retryPkt

template<class Impl>
PacketPtr LSQUnit< Impl >::retryPkt
private

The packet that needs to be retried.

Definition at line 521 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::drainSanityCheck(), and LSQUnit< Impl >::resetState().

◆ stalled

template<class Impl>
bool LSQUnit< Impl >::stalled
private

◆ stallingLoadIdx

template<class Impl>
int LSQUnit< Impl >::stallingLoadIdx
private

The index of the above store.

Definition at line 518 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::read(), LSQUnit< Impl >::squash(), and LSQUnit< Impl >::storePostSend().

◆ stallingStoreIsn

template<class Impl>
InstSeqNum LSQUnit< Impl >::stallingStoreIsn
private

The store that causes the stall due to partial store to load forwarding.

Definition at line 516 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::read(), LSQUnit< Impl >::squash(), and LSQUnit< Impl >::storePostSend().

◆ storeInFlight

template<class Impl>
bool LSQUnit< Impl >::storeInFlight
private

Whether or not a store is in flight.

Definition at line 527 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::storePostSend(), and LSQUnit< Impl >::writebackStores().

◆ storeQueue

template<class Impl>
CircularQueue<SQEntry> LSQUnit< Impl >::storeQueue

◆ stores

template<class Impl>
int LSQUnit< Impl >::stores
private

◆ storesToWB

template<class Impl>
int LSQUnit< Impl >::storesToWB
private

◆ storeWBIt

template<class Impl>
StoreQueue::iterator LSQUnit< Impl >::storeWBIt
private

The index of the first instruction that may be ready to be written back, and has not yet been written back.

Definition at line 503 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::read(), LSQUnit< Impl >::resetState(), LSQUnit< Impl >::storePostSend(), LSQUnit< Impl >::trySendPacket(), LSQUnit< Impl >::willWB(), LSQUnit< Impl >::writebackBlockedStore(), and LSQUnit< Impl >::writebackStores().


The documentation for this class was generated from the following files:

Generated on Thu May 28 2020 16:21:47 for gem5 by doxygen 1.8.13