condcodes.hh File Reference

#include "base/bitfield.hh"

Go to the source code of this file.

Functions
static bool	findCarry (int width, uint64_t dest, uint64_t src1, uint64_t src2)
	Calculate the carry flag from an addition. More...
static bool	findOverflow (int width, uint64_t dest, uint64_t src1, uint64_t src2)
	Calculate the overflow flag from an addition. More...
static bool	findParity (int width, uint64_t dest)
	Calculate the parity of a value. More...
static bool	findNegative (int width, uint64_t dest)
	Calculate the negative flag. More...
static bool	findZero (int width, uint64_t dest)
	Calculate the zero flag. More...

Function Documentation

findCarry()

static bool findCarry ( int  width, uint64_t  dest, uint64_t  src1, uint64_t  src2  )

inlinestatic

Calculate the carry flag from an addition.

This should work even when a carry value is also added in.

Parameters: dest: The result value of the addition. src1: One of the addends that was added. src2: The other addend that was added in.

Rationale: This code analyzes the most sig. bits of the source addends and result, and deduces the carry out flag from them without needing the carry in bit.

Observe that we have four cases after an addition regarding the carry in and carry out bits:

If we have no carry in but a carry out: src1 and src2 must both be 1, with the result bit being 0. Hence, ~0 + 1 + 1 => 11, which has a high second bit. We return true.

If we have a carry in and a carry out: src1 and src2 can either be 1 and 0, or vice versa. In this case, the addition with the carry in gives a result bit of 0 but a carry out. Hence, ~0 + 1 + 0 => 10, or ~0 + 0 + 1 => 10. We return true.

Or, src1 and src2 can both be one. Along with the carry, this gives a result of 1 and a carry out of 1. Hence, ~1 + 1 + 1 => 10. We return true.

If we have no carry in and no carry out: src1 and src2 can either be 1 and 0, 0 and 1, or 0 and 0. In the first two cases the result bit is 1, which when negated does not contribute to the sum algorithm at all. In the last case the result bit is zero, but neither src1 nor src2 contribute to the sum either. Hence, ~1 + 1 + 0 => 1, ~1 + 0 + 1 => 1, ~0 + 0 + 0 => 1. So we return false for all of these cases.

If we have a carry in, but no carry out: src1 and src2 can neither be 1. So the overall result bit is 1. Hence: ~1 + 0 + 0 => 0. We return false.

Definition at line 79 of file condcodes.hh.

References ArmISA::shift.

Referenced by X86ISA::RegOpBase::genFlags(), and TEST().

findNegative()

static bool findNegative ( int  width, uint64_t  dest  )

inlinestatic

Calculate the negative flag.

Definition at line 130 of file condcodes.hh.

References bits().

Referenced by X86ISA::RegOpBase::genFlags(), and TEST().

findOverflow()

static bool findOverflow ( int  width, uint64_t  dest, uint64_t  src1, uint64_t  src2  )

inlinestatic

Calculate the overflow flag from an addition.

Definition at line 91 of file condcodes.hh.

References ArmISA::shift, and ULL.

Referenced by X86ISA::RegOpBase::genFlags(), and TEST().

findParity()

static bool findParity ( int  width, uint64_t  dest  )

inlinestatic

Calculate the parity of a value.

1 is for odd parity and 0 is for even.

Parameters: dest: a value to be tested.

Rationale: findParity simply performs bitwise XOR operations on each "pair" of bits in the dest parameter; the procedure being that a pair of ones will be XOR'ed out of the intermediate value.

This process is repeated until one last pair of bits are XOR'ed together. If the intermediate is still one, then there is exactly one high bit which does not have a corresponding high bit. Therefore, the value must have odd parity, and we return 1 accordingly. Otherwise we return 0.

Definition at line 114 of file condcodes.hh.

References ArmISA::mask.

Referenced by X86ISA::RegOpBase::genFlags(), and TEST().

findZero()

static bool findZero ( int  width, uint64_t  dest  )

inlinestatic

Calculate the zero flag.

Definition at line 139 of file condcodes.hh.

References ArmISA::mask.

Referenced by X86ISA::RegOpBase::genFlags(), and TEST().