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static_inst.cc
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28 
29 #include "cpu/static_inst.hh"
30 
31 #include <iostream>
32 
33 #include "sim/core.hh"
34 
35 namespace {
36 
37 static TheISA::ExtMachInst nopMachInst;
38 
39 class NopStaticInst : public StaticInst
40 {
41  public:
42  NopStaticInst() : StaticInst("gem5 nop", nopMachInst, No_OpClass)
43  {}
44 
45  Fault
46  execute(ExecContext *xc, Trace::InstRecord *traceData) const override
47  {
48  return NoFault;
49  }
50 
51  void
52  advancePC(TheISA::PCState &pcState) const override
53  {
54  pcState.advance();
55  }
56 
57  std::string
59  const Loader::SymbolTable *symtab) const override
60  {
61  return mnemonic;
62  }
63 
64  private:
65 };
66 
67 }
68 
71 
72 using namespace std;
73 
75 {
76  if (cachedDisassembly)
77  delete cachedDisassembly;
78 }
79 
80 bool
82  TheISA::PCState &tgt) const
83 {
84  if (isDirectCtrl()) {
85  tgt = branchTarget(pc);
86  return true;
87  }
88 
89  if (isIndirectCtrl()) {
90  tgt = branchTarget(tc);
91  return true;
92  }
93 
94  return false;
95 }
96 
99 {
100  panic("StaticInst::fetchMicroop() called on instruction "
101  "that is not microcoded.");
102 }
103 
106 {
107  panic("StaticInst::branchTarget() called on instruction "
108  "that is not a PC-relative branch.");
109  M5_DUMMY_RETURN;
110 }
111 
114 {
115  panic("StaticInst::branchTarget() called on instruction "
116  "that is not an indirect branch.");
117  M5_DUMMY_RETURN;
118 }
119 
120 const string &
122 {
123  if (!cachedDisassembly)
124  cachedDisassembly = new string(generateDisassembly(pc, symtab));
125 
126  return *cachedDisassembly;
127 }
128 
129 void
130 StaticInst::printFlags(std::ostream &outs,
131  const std::string &separator) const
132 {
133  bool printed_a_flag = false;
134 
135  for (unsigned int flag = IsNop; flag < Num_Flags; flag++) {
136  if (flags[flag]) {
137  if (printed_a_flag)
138  outs << separator;
139 
140  outs << FlagsStrings[flag];
141  printed_a_flag = true;
142  }
143  }
144 }
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:163
virtual const std::string & disassemble(Addr pc, const Loader::SymbolTable *symtab=nullptr) const
Return string representation of disassembled instruction.
Definition: static_inst.cc:121
decltype(nullptr) constexpr NoFault
Definition: types.hh:243
uint64_t ExtMachInst
Definition: types.hh:39
virtual std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const =0
Internal function to generate disassembly string.
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:246
virtual Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const =0
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
virtual ~StaticInst()
Definition: static_inst.cc:74
ThreadContext is the external interface to all thread state for anything outside of the CPU...
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:70
Bitfield< 4 > pc
virtual StaticInstPtr fetchMicroop(MicroPC upc) const
Return the microop that goes with a particular micropc.
Definition: static_inst.cc:98
uint16_t MicroPC
Definition: types.hh:142
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
static StaticInstPtr nopStaticInstPtr
Pointer to a statically allocated generic "nop" instruction object.
Definition: static_inst.hh:228
virtual TheISA::PCState branchTarget(const TheISA::PCState &pc) const
Return the target address for a PC-relative branch.
Definition: static_inst.cc:105
void printFlags(std::ostream &outs, const std::string &separator) const
Print a separator separated list of this instruction&#39;s set flag names on the given stream...
Definition: static_inst.cc:130
virtual void advancePC(TheISA::PCState &pcState) const =0
Base, ISA-independent static instruction class.
Definition: static_inst.hh:85
bool hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const
Return true if the instruction is a control transfer, and if so, return the target address as well...
Definition: static_inst.cc:81
static StaticInstPtr nullStaticInstPtr
Pointer to a statically allocated "null" instruction object.
Definition: static_inst.hh:225
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
std::shared_ptr< FaultBase > Fault
Definition: types.hh:238

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