priv.hh

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#ifndef __ARCH_SPARC_INSTS_PRIV_HH__
#define __ARCH_SPARC_INSTS_PRIV_HH__

#include "arch/sparc/insts/static_inst.hh"

namespace SparcISA
{

class Priv : public SparcStaticInst
{
  protected:
    using SparcStaticInst::SparcStaticInst;
    std::string generateDisassembly(
            Addr pc, const Loader::SymbolTable *symtab) const override;
};

class PrivReg : public Priv
{
  protected:
    PrivReg(const char *mnem, ExtMachInst _machInst,
            OpClass __opClass, char const * _regName) :
        Priv(mnem, _machInst, __opClass), regName(_regName)
    {}

    char const *regName;
};

// This class is for instructions that explicitly read control
// registers. It provides a special generateDisassembly function.
class RdPriv : public PrivReg
{
  protected:
    using PrivReg::PrivReg;
    std::string generateDisassembly(
            Addr pc, const Loader::SymbolTable *symtab) const override;
};

// This class is for instructions that explicitly write control
// registers. It provides a special generateDisassembly function.
class WrPriv : public PrivReg
{
  protected:
    using PrivReg::PrivReg;
    std::string generateDisassembly(
            Addr pc, const Loader::SymbolTable *symtab) const override;
};

class PrivImm : public Priv
{
  protected:
    // Constructor
    PrivImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
        Priv(mnem, _machInst, __opClass), imm(bits(_machInst, 12, 0))
    {}

    int32_t imm;
};

// This class is for instructions that explicitly write control
// registers. It provides a special generateDisassembly function.
class WrPrivImm : public PrivImm
{
  protected:
    // Constructor
    WrPrivImm(const char *mnem, ExtMachInst _machInst,
              OpClass __opClass, char const *_regName) :
        PrivImm(mnem, _machInst, __opClass), regName(_regName)
    {}

    std::string generateDisassembly(
            Addr pc, const Loader::SymbolTable *symtab) const override;

    char const *regName;
};

}

#endif //__ARCH_SPARC_INSTS_PRIV_HH__