36 #ifndef __ARCH_GENERIC_VEC_PRED_REG_HH__ 37 #define __ARCH_GENERIC_VEC_PRED_REG_HH__ 46 template <
size_t NumBits,
bool Packed>
65 template <
typename VecElem,
size_t NumElems,
bool Packed,
bool Const>
70 static constexpr
size_t NUM_BITS = Packed ? NumElems :
75 using Container =
typename std::conditional<
78 VecPredRegContainer<NUM_BITS, Packed>>
::type;
90 template<
bool Condition = !Const>
95 template<
bool Condition = !Const>
97 set() { container.set(); }
99 template<
bool Condition = !Const>
110 return container[idx * (Packed ? 1 :
sizeof(
VecElem))];
113 template<
bool Condition = !Const>
117 return container[idx * (Packed ? 1 :
sizeof(
VecElem))];
125 return container.get_bits(idx * (Packed ? 1 :
sizeof(
VecElem)),
126 (Packed ? 1 :
sizeof(
VecElem)));
130 template<
bool Condition = !Const>
134 container.set_bits(idx * (Packed ? 1 :
sizeof(
VecElem)),
135 (Packed ? 1 :
sizeof(
VecElem)), val);
139 template<
typename VE2,
size_t NE2,
bool P2,
bool C2>
147 template<
typename VE2,
size_t NE2,
bool P2,
bool C2>
176 size_t actual_num_elems)
const 178 assert(actual_num_elems <= NumElems);
179 for (
int i = 0;
i < actual_num_elems; ++
i) {
194 size_t actual_num_elems)
const 196 assert(actual_num_elems <= NumElems);
197 for (
int i = 0;
i < actual_num_elems; ++
i) {
198 if (mask[
i] &&
operator[](
i)) {
212 size_t actual_num_elems)
const 214 assert(actual_num_elems <= NumElems);
215 for (
int i = actual_num_elems - 1;
i >= 0; --
i) {
230 template <
size_t NumBits,
bool Packed>
233 static_assert(NumBits > 0,
234 "Size of a predicate register must be > 0");
263 std::copy(that.begin(), that.end(), container.begin());
271 container.fill(
false);
278 container.fill(
true);
282 template<
size_t N2,
bool P2>
286 return NumBits == N2 && Packed == P2 && container == that.
container;
290 template<
size_t N2,
bool P2>
302 const bool&
operator[](
size_t idx)
const {
return container[idx]; }
309 assert(nbits > 0 && nbits <= 8 && (idx + nbits - 1) < NumBits);
311 idx = idx + nbits - 1;
312 for (
int i = 0;
i < nbits; ++
i, --idx) {
324 assert(nbits > 0 && nbits <= 8 && (idx + nbits - 1) < NumBits);
325 for (
int i = 0;
i < nbits; ++
i, ++idx) {
326 container[idx] = bval & 1;
351 size_t NumElems = (Packed ? NumBits : NumBits /
sizeof(
VecElem))>
354 static_assert((Packed && NumElems <= NumBits) ||
356 NumBits %
sizeof(
VecElem) == 0 &&
357 sizeof(
VecElem) * NumElems <= NumBits),
358 "Container size incompatible with view size");
363 size_t NumElems = (Packed ? NumBits : NumBits /
sizeof(
VecElem))>
366 static_assert((Packed && NumElems <= NumBits) ||
368 NumBits %
sizeof(
VecElem) == 0 &&
369 sizeof(
VecElem) * NumElems <= NumBits),
370 "Container size incompatible with view size");
377 template <
size_t NumBits,
bool Packed>
382 for (
const auto&
c: value) {
401 #endif // __ARCH_GENERIC_VEC_PRED_REG_HH__ void reset()
Resets the predicate register to an all-false register.
constexpr unsigned DummyNumVecElemPerVecReg
bool noneActive(const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
Returns true if there are no active elements in the register.
friend std::ostream & operator<<(std::ostream &os, const MyClass &p)
constexpr bool DummyVecPredRegHasPackedRepr
Dummy type aliases and constants for architectures that do not implement vector predicate registers...
static constexpr size_t NUM_BITS
Size of the register in bits.
uint32_t DummyVecElem
Dummy type aliases and constants for architectures that do not implement vector registers.
VecPredRegT(Container &c)
bool lastActive(const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
Returns true if the last active element of the register is true.
DummyVecPredReg::Container DummyVecPredRegContainer
constexpr size_t DummyVecPredRegSizeBits
uint8_t get_bits(size_t idx, uint8_t nbits) const
Returns a subset of bits starting from a specific element in the container.
MyClass & operator=(const MyClass &that)
std::enable_if< Condition, MyClass & >::type operator=(const MyClass &that)
void set_bits(size_t idx, uint8_t nbits, uint8_t bval)
Set a subset of bits starting from a specific element in the container.
Container & container
Container corresponding to this view.
std::string csprintf(const char *format, const Args &...args)
const std::string print() const
Returns a string representation of the register content.
std::array< bool, NumBits > Container
VecPredReg::Container VecPredRegContainer
bool firstActive(const VecPredRegT< VecElem, NumElems, Packed, MC > &mask, size_t actual_num_elems) const
Returns true if the first active element of the register is true.
bool operator==(const VecPredRegT< VE2, NE2, P2, C2 > &that) const
Equality operator, required to compare thread contexts.
bool operator!=(const VecPredRegT< VE2, NE2, P2, C2 > &that) const
Inequality operator, required to compare thread contexts.
bool to_number(const std::string &value, VecPredRegContainer< NumBits, Packed > &p)
Helper functions used for serialization/de-serialization.
std::enable_if< Condition, bool & >::type operator[](size_t idx)
const bool & operator[](size_t idx) const
Returns a const reference to a specific element of the internal container.
VecPredRegT< VecElem, NumElems, Packed, true > as() const
Create a view of this container.
std::enable_if< Condition, void >::type set_raw(size_t idx, uint8_t val)
Write a raw value in an element of the predicate register.
MyClass & operator=(const std::vector< uint8_t > &that)
Required for de-serialization.
typename std::conditional< Const, const VecPredRegContainer< NUM_BITS, Packed >, VecPredRegContainer< NUM_BITS, Packed > >::type Container
Container type alias.
VecPredRegT< VecElem, NumElems, Packed, false > as()
const std::string print() const
Returns a string representation of the register content.
uint8_t get_raw(size_t idx) const
Return an element of the predicate register as it appears in the raw (untyped) internal representatio...
std::enable_if< Condition, void >::type reset()
Reset the register to an all-false value.
Vector Registers layout specification.
Generic predicate register container.
bool operator!=(const VecPredRegContainer< N2, P2 > &that) const
Inequality operator, required to compare thread contexts.
bool operator==(const VecPredRegContainer< N2, P2 > &that) const
Equality operator, required to compare thread contexts.
bool & operator[](size_t idx)
Returns a reference to a specific element of the internal container.
const bool & operator[](size_t idx) const