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decoder.cc
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28 
29 #include "arch/x86/decoder.hh"
30 
31 #include "arch/x86/regs/misc.hh"
32 #include "base/logging.hh"
33 #include "base/trace.hh"
34 #include "base/types.hh"
35 #include "debug/Decoder.hh"
36 
37 namespace X86ISA
38 {
39 
42 {
43  origPC = basePC + offset;
44  DPRINTF(Decoder, "Setting origPC to %#x\n", origPC);
46  chunkIdx = 0;
47 
48  emi.rex = 0;
49  emi.legacy = 0;
50  emi.vex = 0;
51 
52  emi.opcode.type = BadOpcode;
53  emi.opcode.op = 0;
54 
56  emi.immediate = 0;
57  emi.displacement = 0;
58  emi.dispSize = 0;
59 
60  emi.modRM = 0;
61  emi.sib = 0;
62 
63  if (instBytes->si) {
64  return FromCacheState;
65  } else {
66  instBytes->chunks.clear();
67  return PrefixState;
68  }
69 }
70 
71 void
73 {
74  //This function drives the decoder state machine.
75 
76  //Some sanity checks. You shouldn't try to process more bytes if
77  //there aren't any, and you shouldn't overwrite an already
78  //decoder ExtMachInst.
79  assert(!outOfBytes);
80  assert(!instDone);
81 
82  if (state == ResetState)
83  state = doResetState();
84  if (state == FromCacheState) {
86  } else {
87  instBytes->chunks.push_back(fetchChunk);
88  }
89 
90  //While there's still something to do...
91  while (!instDone && !outOfBytes) {
92  uint8_t nextByte = getNextByte();
93  switch (state) {
94  case PrefixState:
95  state = doPrefixState(nextByte);
96  break;
97  case Vex2Of2State:
98  state = doVex2Of2State(nextByte);
99  break;
100  case Vex2Of3State:
101  state = doVex2Of3State(nextByte);
102  break;
103  case Vex3Of3State:
104  state = doVex3Of3State(nextByte);
105  break;
106  case VexOpcodeState:
107  state = doVexOpcodeState(nextByte);
108  break;
109  case OneByteOpcodeState:
110  state = doOneByteOpcodeState(nextByte);
111  break;
112  case TwoByteOpcodeState:
113  state = doTwoByteOpcodeState(nextByte);
114  break;
116  state = doThreeByte0F38OpcodeState(nextByte);
117  break;
119  state = doThreeByte0F3AOpcodeState(nextByte);
120  break;
121  case ModRMState:
122  state = doModRMState(nextByte);
123  break;
124  case SIBState:
125  state = doSIBState(nextByte);
126  break;
127  case DisplacementState:
129  break;
130  case ImmediateState:
132  break;
133  case ErrorState:
134  panic("Went to the error state in the decoder.\n");
135  default:
136  panic("Unrecognized state! %d\n", state);
137  }
138  }
139 }
140 
143 {
144  DPRINTF(Decoder, "Looking at cache state.\n");
145  if ((fetchChunk & instBytes->masks[chunkIdx]) !=
146  instBytes->chunks[chunkIdx]) {
147  DPRINTF(Decoder, "Decode cache miss.\n");
148  // The chached chunks didn't match what was fetched. Fall back to the
149  // predecoder.
151  instBytes->chunks.resize(chunkIdx + 1);
152  instBytes->si = NULL;
153  chunkIdx = 0;
155  offset = origPC % sizeof(MachInst);
156  basePC = origPC - offset;
157  return PrefixState;
158  } else if (chunkIdx == instBytes->chunks.size() - 1) {
159  // We matched the cache, so use its value.
160  instDone = true;
162  if (offset == sizeof(MachInst))
163  outOfBytes = true;
164  return ResetState;
165  } else {
166  // We matched so far, but need to check more chunks.
167  chunkIdx++;
168  outOfBytes = true;
169  return FromCacheState;
170  }
171 }
172 
173 //Either get a prefix and record it in the ExtMachInst, or send the
174 //state machine on to get the opcode(s).
176 Decoder::doPrefixState(uint8_t nextByte)
177 {
178  uint8_t prefix = Prefixes[nextByte];
179  State nextState = PrefixState;
180  // REX prefixes are only recognized in 64 bit mode.
181  if (prefix == RexPrefix && emi.mode.submode != SixtyFourBitMode)
182  prefix = 0;
183  if (prefix)
184  consumeByte();
185  switch(prefix)
186  {
187  //Operand size override prefixes
188  case OperandSizeOverride:
189  DPRINTF(Decoder, "Found operand size override prefix.\n");
190  emi.legacy.op = true;
191  break;
192  case AddressSizeOverride:
193  DPRINTF(Decoder, "Found address size override prefix.\n");
194  emi.legacy.addr = true;
195  break;
196  //Segment override prefixes
197  case CSOverride:
198  case DSOverride:
199  case ESOverride:
200  case FSOverride:
201  case GSOverride:
202  case SSOverride:
203  DPRINTF(Decoder, "Found segment override.\n");
204  emi.legacy.seg = prefix;
205  break;
206  case Lock:
207  DPRINTF(Decoder, "Found lock prefix.\n");
208  emi.legacy.lock = true;
209  break;
210  case Rep:
211  DPRINTF(Decoder, "Found rep prefix.\n");
212  emi.legacy.rep = true;
213  break;
214  case Repne:
215  DPRINTF(Decoder, "Found repne prefix.\n");
216  emi.legacy.repne = true;
217  break;
218  case RexPrefix:
219  DPRINTF(Decoder, "Found Rex prefix %#x.\n", nextByte);
220  emi.rex = nextByte;
221  break;
222  case Vex2Prefix:
223  DPRINTF(Decoder, "Found VEX two-byte prefix %#x.\n", nextByte);
224  emi.vex.present = 1;
225  nextState = Vex2Of2State;
226  break;
227  case Vex3Prefix:
228  DPRINTF(Decoder, "Found VEX three-byte prefix %#x.\n", nextByte);
229  emi.vex.present = 1;
230  nextState = Vex2Of3State;
231  break;
232  case 0:
233  nextState = OneByteOpcodeState;
234  break;
235 
236  default:
237  panic("Unrecognized prefix %#x\n", nextByte);
238  }
239  return nextState;
240 }
241 
243 Decoder::doVex2Of2State(uint8_t nextByte)
244 {
245  consumeByte();
246  Vex2Of2 vex = nextByte;
247 
248  emi.rex.r = !vex.r;
249 
250  emi.vex.l = vex.l;
251  emi.vex.v = ~vex.v;
252 
253  switch (vex.p) {
254  case 0:
255  break;
256  case 1:
257  emi.legacy.op = 1;
258  break;
259  case 2:
260  emi.legacy.rep = 1;
261  break;
262  case 3:
263  emi.legacy.repne = 1;
264  break;
265  }
266 
267  emi.opcode.type = TwoByteOpcode;
268 
269  return VexOpcodeState;
270 }
271 
273 Decoder::doVex2Of3State(uint8_t nextByte)
274 {
275  if (emi.mode.submode != SixtyFourBitMode && bits(nextByte, 7, 6) == 0x3) {
276  // This was actually an LDS instruction. Reroute to that path.
277  emi.vex.present = 0;
278  emi.opcode.type = OneByteOpcode;
279  emi.opcode.op = 0xC4;
281  nextByte >= 0xA0 && nextByte <= 0xA3);
282  }
283 
284  consumeByte();
285  Vex2Of3 vex = nextByte;
286 
287  emi.rex.r = !vex.r;
288  emi.rex.x = !vex.x;
289  emi.rex.b = !vex.b;
290 
291  switch (vex.m) {
292  case 1:
293  emi.opcode.type = TwoByteOpcode;
294  break;
295  case 2:
296  emi.opcode.type = ThreeByte0F38Opcode;
297  break;
298  case 3:
299  emi.opcode.type = ThreeByte0F3AOpcode;
300  break;
301  default:
302  // These encodings are reserved. Pretend this was an undefined
303  // instruction so the main decoder will behave correctly, and stop
304  // trying to interpret bytes.
305  emi.opcode.type = TwoByteOpcode;
306  emi.opcode.op = 0x0B;
307  instDone = true;
308  return ResetState;
309  }
310  return Vex3Of3State;
311 }
312 
314 Decoder::doVex3Of3State(uint8_t nextByte)
315 {
316  if (emi.mode.submode != SixtyFourBitMode && bits(nextByte, 7, 6) == 0x3) {
317  // This was actually an LES instruction. Reroute to that path.
318  emi.vex.present = 0;
319  emi.opcode.type = OneByteOpcode;
320  emi.opcode.op = 0xC5;
322  nextByte >= 0xA0 && nextByte <= 0xA3);
323  }
324 
325  consumeByte();
326  Vex3Of3 vex = nextByte;
327 
328  emi.rex.w = vex.w;
329 
330  emi.vex.l = vex.l;
331  emi.vex.v = ~vex.v;
332 
333  switch (vex.p) {
334  case 0:
335  break;
336  case 1:
337  emi.legacy.op = 1;
338  break;
339  case 2:
340  emi.legacy.rep = 1;
341  break;
342  case 3:
343  emi.legacy.repne = 1;
344  break;
345  }
346 
347  return VexOpcodeState;
348 }
349 
351 Decoder::doVexOpcodeState(uint8_t nextByte)
352 {
353  DPRINTF(Decoder, "Found VEX opcode %#x.\n", nextByte);
354 
355  emi.opcode.op = nextByte;
356  consumeByte();
357 
358  switch (emi.opcode.type) {
359  case TwoByteOpcode:
361  case ThreeByte0F38Opcode:
364  case ThreeByte0F3AOpcode:
367  default:
368  panic("Unrecognized opcode type %d.\n", emi.opcode.type);
369  }
370 }
371 
372 // Load the first opcode byte. Determine if there are more opcode bytes, and
373 // if not, what immediate and/or ModRM is needed.
376 {
377  State nextState = ErrorState;
378  consumeByte();
379 
380  if (nextByte == 0x0f) {
381  DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
382  nextState = TwoByteOpcodeState;
383  } else {
384  DPRINTF(Decoder, "Found one byte opcode %#x.\n", nextByte);
385  emi.opcode.type = OneByteOpcode;
386  emi.opcode.op = nextByte;
387 
389  nextByte >= 0xA0 && nextByte <= 0xA3);
390  }
391  return nextState;
392 }
393 
394 // Load the second opcode byte. Determine if there are more opcode bytes, and
395 // if not, what immediate and/or ModRM is needed.
398 {
399  State nextState = ErrorState;
400  consumeByte();
401  if (nextByte == 0x38) {
402  nextState = ThreeByte0F38OpcodeState;
403  DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
404  } else if (nextByte == 0x3a) {
405  nextState = ThreeByte0F3AOpcodeState;
406  DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
407  } else {
408  DPRINTF(Decoder, "Found two byte opcode %#x.\n", nextByte);
409  emi.opcode.type = TwoByteOpcode;
410  emi.opcode.op = nextByte;
411 
413  }
414  return nextState;
415 }
416 
417 // Load the third opcode byte and determine what immediate and/or ModRM is
418 // needed.
421 {
422  consumeByte();
423 
424  DPRINTF(Decoder, "Found three byte 0F38 opcode %#x.\n", nextByte);
425  emi.opcode.type = ThreeByte0F38Opcode;
426  emi.opcode.op = nextByte;
427 
429 }
430 
431 // Load the third opcode byte and determine what immediate and/or ModRM is
432 // needed.
435 {
436  consumeByte();
437 
438  DPRINTF(Decoder, "Found three byte 0F3A opcode %#x.\n", nextByte);
439  emi.opcode.type = ThreeByte0F3AOpcode;
440  emi.opcode.op = nextByte;
441 
443 }
444 
445 // Generic opcode processing which determines the immediate size, and whether
446 // or not there's a modrm byte.
449  bool addrSizedImm)
450 {
451  State nextState = ErrorState;
452  const uint8_t opcode = emi.opcode.op;
453 
454  //Figure out the effective operand size. This can be overriden to
455  //a fixed value at the decoder level.
456  int logOpSize;
457  if (emi.rex.w)
458  logOpSize = 3; // 64 bit operand size
459  else if (emi.legacy.op)
460  logOpSize = altOp;
461  else
462  logOpSize = defOp;
463 
464  //Set the actual op size
465  emi.opSize = 1 << logOpSize;
466 
467  //Figure out the effective address size. This can be overriden to
468  //a fixed value at the decoder level.
469  int logAddrSize;
470  if (emi.legacy.addr)
471  logAddrSize = altAddr;
472  else
473  logAddrSize = defAddr;
474 
475  //Set the actual address size
476  emi.addrSize = 1 << logAddrSize;
477 
478  //Figure out the effective stack width. This can be overriden to
479  //a fixed value at the decoder level.
480  emi.stackSize = 1 << stack;
481 
482  //Figure out how big of an immediate we'll retreive based
483  //on the opcode.
484  int immType = immTable[opcode];
485  if (addrSizedImm)
486  immediateSize = SizeTypeToSize[logAddrSize - 1][immType];
487  else
488  immediateSize = SizeTypeToSize[logOpSize - 1][immType];
489 
490  //Determine what to expect next
491  if (modrmTable[opcode]) {
492  nextState = ModRMState;
493  } else {
494  if (immediateSize) {
495  nextState = ImmediateState;
496  } else {
497  instDone = true;
498  nextState = ResetState;
499  }
500  }
501  return nextState;
502 }
503 
504 //Get the ModRM byte and determine what displacement, if any, there is.
505 //Also determine whether or not to get the SIB byte, displacement, or
506 //immediate next.
508 Decoder::doModRMState(uint8_t nextByte)
509 {
510  State nextState = ErrorState;
511  ModRM modRM = nextByte;
512  DPRINTF(Decoder, "Found modrm byte %#x.\n", nextByte);
513  if (defOp == 1) {
514  //figure out 16 bit displacement size
515  if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2)
516  displacementSize = 2;
517  else if (modRM.mod == 1)
518  displacementSize = 1;
519  else
520  displacementSize = 0;
521  } else {
522  //figure out 32/64 bit displacement size
523  if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2)
524  displacementSize = 4;
525  else if (modRM.mod == 1)
526  displacementSize = 1;
527  else
528  displacementSize = 0;
529  }
530 
531  // The "test" instruction in group 3 needs an immediate, even though
532  // the other instructions with the same actual opcode don't.
533  if (emi.opcode.type == OneByteOpcode && (modRM.reg & 0x6) == 0) {
534  if (emi.opcode.op == 0xF6)
535  immediateSize = 1;
536  else if (emi.opcode.op == 0xF7)
537  immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
538  }
539 
540  //If there's an SIB, get that next.
541  //There is no SIB in 16 bit mode.
542  if (modRM.rm == 4 && modRM.mod != 3) {
543  // && in 32/64 bit mode)
544  nextState = SIBState;
545  } else if (displacementSize) {
546  nextState = DisplacementState;
547  } else if (immediateSize) {
548  nextState = ImmediateState;
549  } else {
550  instDone = true;
551  nextState = ResetState;
552  }
553  //The ModRM byte is consumed no matter what
554  consumeByte();
555  emi.modRM = modRM;
556  return nextState;
557 }
558 
559 //Get the SIB byte. We don't do anything with it at this point, other
560 //than storing it in the ExtMachInst. Determine if we need to get a
561 //displacement or immediate next.
563 Decoder::doSIBState(uint8_t nextByte)
564 {
565  State nextState = ErrorState;
566  emi.sib = nextByte;
567  DPRINTF(Decoder, "Found SIB byte %#x.\n", nextByte);
568  consumeByte();
569  if (emi.modRM.mod == 0 && emi.sib.base == 5)
570  displacementSize = 4;
571  if (displacementSize) {
572  nextState = DisplacementState;
573  } else if (immediateSize) {
574  nextState = ImmediateState;
575  } else {
576  instDone = true;
577  nextState = ResetState;
578  }
579  return nextState;
580 }
581 
582 //Gather up the displacement, or at least as much of it
583 //as we can get.
586 {
587  State nextState = ErrorState;
588 
592 
593  DPRINTF(Decoder, "Collecting %d byte displacement, got %d bytes.\n",
595 
597  //Reset this for other immediates.
598  immediateCollected = 0;
599  //Sign extend the displacement
600  switch(displacementSize)
601  {
602  case 1:
603  emi.displacement = sext<8>(emi.displacement);
604  break;
605  case 2:
606  emi.displacement = sext<16>(emi.displacement);
607  break;
608  case 4:
609  emi.displacement = sext<32>(emi.displacement);
610  break;
611  default:
612  panic("Undefined displacement size!\n");
613  }
614  DPRINTF(Decoder, "Collected displacement %#x.\n",
615  emi.displacement);
616  if (immediateSize) {
617  nextState = ImmediateState;
618  } else {
619  instDone = true;
620  nextState = ResetState;
621  }
622 
624  }
625  else
626  nextState = DisplacementState;
627  return nextState;
628 }
629 
630 //Gather up the immediate, or at least as much of it
631 //as we can get
634 {
635  State nextState = ErrorState;
636 
638  emi.immediate,
639  immediateSize);
640 
641  DPRINTF(Decoder, "Collecting %d byte immediate, got %d bytes.\n",
643 
645  {
646  //Reset this for other immediates.
647  immediateCollected = 0;
648 
649  //XXX Warning! The following is an observed pattern and might
650  //not always be true!
651 
652  //Instructions which use 64 bit operands but 32 bit immediates
653  //need to have the immediate sign extended to 64 bits.
654  //Instructions which use true 64 bit immediates won't be
655  //affected, and instructions that use true 32 bit immediates
656  //won't notice.
657  switch(immediateSize)
658  {
659  case 4:
660  emi.immediate = sext<32>(emi.immediate);
661  break;
662  case 1:
663  emi.immediate = sext<8>(emi.immediate);
664  }
665 
666  DPRINTF(Decoder, "Collected immediate %#x.\n",
667  emi.immediate);
668  instDone = true;
669  nextState = ResetState;
670  }
671  else
672  nextState = ImmediateState;
673  return nextState;
674 }
675 
678 
681 {
682  auto iter = instMap->find(mach_inst);
683  if (iter != instMap->end())
684  return iter->second;
685 
686  StaticInstPtr si = decodeInst(mach_inst);
687  (*instMap)[mach_inst] = si;
688  return si;
689 }
690 
693 {
694  if (!instDone)
695  return NULL;
696  instDone = false;
697  updateNPC(nextPC);
698 
700  if (si)
701  return si;
702 
703  // We didn't match in the AddrMap, but we still populated an entry. Fix
704  // up its byte masks.
705  const int chunkSize = sizeof(MachInst);
706 
708 
709  Addr firstBasePC = basePC - (instBytes->chunks.size() - 1) * chunkSize;
710  Addr firstOffset = origPC - firstBasePC;
711  Addr totalSize = instBytes->lastOffset - firstOffset +
712  (instBytes->chunks.size() - 1) * chunkSize;
713  int start = firstOffset;
714  instBytes->masks.clear();
715 
716  while (totalSize) {
717  int end = start + totalSize;
718  end = (chunkSize < end) ? chunkSize : end;
719  int size = end - start;
720  int idx = instBytes->masks.size();
721 
722  MachInst maskVal = mask(size * 8) << (start * 8);
723  assert(maskVal);
724 
725  instBytes->masks.push_back(maskVal);
726  instBytes->chunks[idx] &= instBytes->masks[idx];
727  totalSize -= size;
728  start = 0;
729  }
730 
731  si = decode(emi, origPC);
732  return si;
733 }
734 
735 }
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:163
#define DPRINTF(x,...)
Definition: trace.hh:225
uint64_t immediate
Definition: types.hh:220
void process()
Definition: decoder.cc:72
static ByteTable UsesModRMThreeByte0F38
Definition: decoder.hh:60
int displacementSize
Definition: decoder.hh:168
State doVex3Of3State(uint8_t)
Definition: decoder.cc:314
ExtMachInst emi
Definition: decoder.hh:94
State doVex2Of3State(uint8_t)
Definition: decoder.cc:273
uint8_t dispSize
Definition: types.hh:230
State doTwoByteOpcodeState(uint8_t)
Definition: decoder.cc:397
static const uint8_t SizeTypeToSize[3][10]
Definition: decoder.hh:54
Value & lookup(Addr addr)
uint8_t altOp
Definition: decoder.hh:98
State doPrefixState(uint8_t)
Definition: decoder.cc:176
StaticInstPtr decodeInst(ExtMachInst mach_inst)
uint8_t stackSize
Definition: types.hh:228
uint8_t defOp
Definition: decoder.hh:99
State doSIBState(uint8_t)
Definition: decoder.cc:563
int immediateCollected
Definition: decoder.hh:173
OpcodeType type
Definition: types.hh:212
static ByteTable ImmediateTypeThreeByte0F3A
Definition: decoder.hh:66
static ByteTable UsesModRMOneByte
Definition: decoder.hh:58
DecodePages * decodePages
Definition: decoder.hh:226
uint8_t getNextByte()
Definition: decoder.hh:104
static ByteTable UsesModRMTwoByte
Definition: decoder.hh:59
static InstCacheMap instCacheMap
Definition: decoder.hh:233
uint8_t stack
Definition: decoder.hh:102
mask
Definition: misc.hh:796
LegacyPrefixVector legacy
Definition: types.hh:205
State processOpcode(ByteTable &immTable, ByteTable &modrmTable, bool addrSizedImm=false)
Definition: decoder.cc:448
State doVexOpcodeState(uint8_t)
Definition: decoder.cc:351
uint64_t MachInst
Definition: types.hh:52
static ByteTable ImmediateTypeTwoByte
Definition: decoder.hh:64
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
static ByteTable ImmediateTypeOneByte
Definition: decoder.hh:63
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decoder.cc:680
struct X86ISA::ExtMachInst::@22 opcode
State doResetState()
Definition: decoder.cc:41
State doVex2Of2State(uint8_t)
Definition: decoder.cc:243
uint64_t displacement
Definition: types.hh:221
State doModRMState(uint8_t)
Definition: decoder.cc:508
static InstBytes dummy
Definition: decoder.hh:81
std::vector< MachInst > masks
Definition: decoder.hh:74
InstBytes * instBytes
Definition: decoder.hh:85
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
Bitfield< 15, 3 > si
Definition: misc.hh:860
DecodeCache::InstMap< ExtMachInst > * instMap
Definition: decoder.hh:230
Bitfield< 24, 21 > opcode
Definition: types.hh:100
State doDisplacementState()
Definition: decoder.cc:585
State doOneByteOpcodeState(uint8_t)
Definition: decoder.cc:375
Prefixes
Definition: types.hh:54
void consumeByte()
Definition: decoder.hh:149
uint8_t opSize
Definition: types.hh:224
uint8_t addrSize
Definition: types.hh:226
State doThreeByte0F38OpcodeState(uint8_t)
Definition: decoder.cc:420
OperatingMode mode
Definition: types.hh:233
const uint8_t ByteTable[256]
Definition: decoder.hh:55
static ByteTable ImmediateTypeThreeByte0F38
Definition: decoder.hh:65
State doImmediateState()
Definition: decoder.cc:633
MachInst fetchChunk
Definition: decoder.hh:84
State doFromCacheState()
Definition: decoder.cc:142
T bits(T val, int first, int last)
Extract the bitfield from position &#39;first&#39; to &#39;last&#39; (inclusive) from &#39;val&#39; and right justify it...
Definition: bitfield.hh:71
void updateNPC(X86ISA::PCState &nextPC)
Definition: decoder.hh:327
std::vector< MachInst > chunks
Definition: decoder.hh:73
State doThreeByte0F3AOpcodeState(uint8_t)
Definition: decoder.cc:434
Bitfield< 3 > addr
Definition: types.hh:79
uint8_t altAddr
Definition: decoder.hh:100
std::unordered_map< CacheKey, DecodeCache::InstMap< ExtMachInst > * > InstCacheMap
Definition: decoder.hh:232
uint8_t defAddr
Definition: decoder.hh:101
static ByteTable UsesModRMThreeByte0F3A
Definition: decoder.hh:61
void getImmediate(int &collected, uint64_t &current, int size)
Definition: decoder.hh:109

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