decoder.hh

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/*
 * Copyright (c) 2013-2014 ARM Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Copyright (c) 2012 Google
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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#ifndef __ARCH_ARM_DECODER_HH__
#define __ARCH_ARM_DECODER_HH__

#include <cassert>

#include "arch/arm/miscregs.hh"
#include "arch/arm/types.hh"
#include "arch/generic/decode_cache.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
#include "enums/DecoderFlavor.hh"

namespace ArmISA
{

class ISA;
class Decoder
{
  protected:
    //The extended machine instruction being generated
    ExtMachInst emi;
    MachInst data;
    bool bigThumb;
    bool instDone;
    bool outOfBytes;
    int offset;
    bool foundIt;
    ITSTATE itBits;

    int fpscrLen;
    int fpscrStride;

    int sveLen;

    Enums::DecoderFlavor decoderFlavor;

    static GenericISA::BasicDecodeCache defaultCache;

    void process();

    void consumeBytes(int numBytes);

  public: // Decoder API
    Decoder(ISA* isa = nullptr);

    void reset();

    bool needMoreBytes() const { return outOfBytes; }

    bool instReady() const { return instDone; }

    void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);

    StaticInstPtr decode(ArmISA::PCState &pc);

    StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
    {
        return defaultCache.decode(this, mach_inst, addr);
    }

    StaticInstPtr decodeInst(ExtMachInst mach_inst);

    void takeOverFrom(Decoder *old) {}


  public: // ARM-specific decoder state manipulation
    void setContext(FPSCR fpscr)
    {
        fpscrLen = fpscr.len;
        fpscrStride = fpscr.stride;
    }

    void setSveLen(uint8_t len)
    {
        sveLen = len;
    }
};

} // namespace ArmISA

#endif // __ARCH_ARM_DECODER_HH__