41 #ifndef __CPU_O3_MEM_DEP_UNIT_HH__ 42 #define __CPU_O3_MEM_DEP_UNIT_HH__ 47 #include <unordered_map> 51 #include "debug/MemDepUnit.hh" 55 unsigned a = (unsigned)seq_num;
56 unsigned hash = (((a >> 14) ^ ((a >> 2) & 0xffff))) & 0x7FFFFFFF;
62 struct DerivO3CPUParams;
78 template <
class MemDepPred,
class Impl>
98 std::string
name()
const {
return _name; }
107 bool isDrained()
const;
110 void drainSanityCheck()
const;
119 void insert(
const DynInstPtr &inst);
122 void insertNonSpec(
const DynInstPtr &inst);
125 void insertBarrier(
const DynInstPtr &barr_inst);
128 void regsReady(
const DynInstPtr &inst);
131 void nonSpecInstReady(
const DynInstPtr &inst);
134 void reschedule(
const DynInstPtr &inst);
142 void completed(
const DynInstPtr &inst);
145 void completeBarrier(
const DynInstPtr &inst);
148 void wakeDependents(
const DynInstPtr &inst);
156 void violation(
const DynInstPtr &store_inst,
157 const DynInstPtr &violating_load);
160 void issue(
const DynInstPtr &inst);
180 : inst(new_inst), regsReady(false), memDepReady(false),
181 completed(false), squashed(false)
187 "memdep_count=%i %s\n", memdep_count, inst->pcState());
194 for (
int i = 0;
i < dependInsts.size(); ++
i) {
195 dependInsts[
i] = NULL;
201 "memdep_count=%i %s\n", memdep_count, inst->pcState());
206 std::string
name()
const {
return "memdepentry"; }
228 static int memdep_count;
229 static int memdep_insert;
230 static int memdep_erase;
235 inline MemDepEntryPtr &findInHash(
const DynInstConstPtr& inst);
238 inline void moveToReady(MemDepEntryPtr &ready_inst_entry);
240 typedef std::unordered_map<InstSeqNum, MemDepEntryPtr, SNHash>
MemDepHash;
285 #endif // __CPU_O3_MEM_DEP_UNIT_HH__
MemDepHash memDepHash
A hash map of all memory dependence entries.
bool loadBarrier
Is there an outstanding load barrier that loads must wait on.
std::shared_ptr< MemDepEntry > MemDepEntryPtr
InstSeqNum storeBarrierSN
The sequence number of the store barrier.
std::list< DynInstPtr >::iterator ListIt
ListIt listIt
The iterator to the instruction's location inside the list.
size_t operator()(const InstSeqNum &seq_num) const
void takeOverFrom(ThreadContext &ntc, ThreadContext &otc)
Copy state between thread contexts in preparation for CPU handover.
bool storeBarrier
Is there an outstanding store barrier that loads must wait on.
bool memDepReady
If all memory dependencies have been satisfied.
~MemDepEntry()
Frees any pointers.
int id
The thread id of this memory dependence unit.
Impl::DynInstConstPtr DynInstConstPtr
std::vector< MemDepEntryPtr > dependInsts
A vector of any dependent instructions.
Declaration of Statistics objects.
This is a simple scalar statistic, like a counter.
MemDepEntry(const DynInstPtr &new_inst)
Constructs a memory dependence entry.
Stats::Scalar insertedLoads
Stat for number of inserted loads.
bool squashed
If the instruction is squashed.
InstructionQueue< Impl > * iqPtr
Pointer to the IQ.
Impl::DynInstPtr DynInstPtr
bool regsReady
If the registers are ready or not.
Stats::Scalar conflictingStores
Stat for number of conflicting stores that had to wait for a store.
Stats::Scalar conflictingLoads
Stat for number of conflicting loads that had to wait for a store.
bool completed
If the instruction is completed.
Memory dependence entries that track memory operations, marking when the instruction is ready to exec...
Stats::Scalar insertedStores
Stat for number of inserted stores.
MemDepPred depPred
The memory dependence predictor.
Memory dependency unit class.
int16_t ThreadID
Thread index/ID type.
std::string name() const
Returns the name of the memory dependence entry.
InstSeqNum loadBarrierSN
The sequence number of the load barrier.
std::list< DynInstPtr > instsToReplay
A list of all instructions that are going to be replayed.
std::string name() const
Returns the name of the memory dependence unit.
std::unordered_map< InstSeqNum, MemDepEntryPtr, SNHash > MemDepHash
A standard instruction queue class.
const FlagsType init
This Stat is Initialized.
DynInstPtr inst
The instruction being tracked.
MemDepHash::iterator MemDepHashIt