trace.hh File Reference

#include <string>
#include "base/cprintf.hh"
#include "base/debug.hh"
#include "base/match.hh"
#include "base/types.hh"
#include "sim/core.hh"

Go to the source code of this file.

Classes
class	Trace::Logger
	Debug logging base class. More...
class	Trace::OstreamLogger
	Logging wrapper for ostreams with the format: <when>: <name>: <message-body> More...
struct	StringWrap
class	Named

Namespaces
	Trace

Macros
#define	DTRACE(x)   (false)
#define	DDUMP(x, data, count)   do {} while (0)
#define	DPRINTF(x, ...)   do {} while (0)
#define	DPRINTFS(x, ...)   do {} while (0)
#define	DPRINTFR(...)   do {} while (0)
#define	DDUMPN(data, count)   do {} while (0)
#define	DPRINTFN(...)   do {} while (0)
#define	DPRINTFNR(...)   do {} while (0)
#define	DPRINTF_UNCONDITIONAL(x, ...)   do {} while (0)

Functions
Logger *	Trace::getDebugLogger ()
	Get the current global debug logger. More...
std::ostream &	Trace::output ()
	Get the ostream from the current global logger. More...
void	Trace::setDebugLogger (Logger *logger)
	Delete the current global logger and assign a new one. More...
void	Trace::enable ()
	Enable/disable debug logging. More...
void	Trace::disable ()
const std::string &	name ()

Macro Definition Documentation

DDUMP

#define DDUMP	(		x,
			data,
			count
	)		do {} while (0)

Definition at line 224 of file trace.hh.

Referenced by SimpleCache::accessTiming(), AbstractMemory::checkLockedAddrList(), BaseRemoteGDB::cmd_unsupported(), VirtDescriptor::dump(), VirtIO9PBase::dumpMsg(), ArmISA::FsLinux::initState(), SimpleCache::insert(), SimpleDisk::read(), RawDiskImage::read(), CowDiskImage::read(), StubSlavePort::recvAtomic(), EtherTapBase::recvSimulated(), Sinic::Device::rxDmaDone(), NSGigE::rxDmaReadDone(), NSGigE::rxDmaWriteDone(), DistEtherLink::RxLink::rxDone(), NSGigE::rxFilter(), EtherBus::send(), EtherTapBase::sendSimulated(), EtherLink::Link::transmit(), Sinic::Device::transmit(), NSGigE::transmit(), EtherLink::Link::txComplete(), Sinic::Device::txDmaDone(), NSGigE::txDmaReadDone(), NSGigE::txDmaWriteDone(), EtherBus::txDone(), RawDiskImage::write(), and CowDiskImage::write().

DDUMPN

#define DDUMPN	(		data,
			count
	)		do {} while (0)

Definition at line 228 of file trace.hh.

DPRINTF

#define DPRINTF	(		x,
			...
	)		do {} while (0)

Definition at line 225 of file trace.hh.

Referenced by ArmISA::TLB::_flushMva(), MemChecker::abortWrite(), ArmISA::RemoteGDB::acc(), Cache::access(), AbstractMemory::access(), BaseCache::access(), DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), FlashDevice::accessDevice(), FlashDevice::accessTimes(), SimpleCache::accessTiming(), TokenManager::acquireTokens(), IGbE::TxDescCache::actionAfterWb(), FlashDevice::actionComplete(), O3ThreadContext< Impl >::activate(), DRAMCtrl::activateBank(), BaseKvmCPU::activateContext(), MinorCPU::activateContext(), AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), BaseCPU::activateContext(), ActivityRecorder::activateStage(), DefaultIEW< Impl >::activateStage(), FullO3CPU< O3CPUImpl >::activateThread(), ActivityRecorder::activity(), DefaultIEW< Impl >::activityThisCycle(), CheckTable::addCheck(), ElasticTrace::addCommittedInst(), ElasticTrace::addDepTraceRecord(), ArmISA::PMU::addEventProbe(), PowerDomain::addFollower(), InstructionQueue< Impl >::addIfReady(), LabelMap::addLabel(), QoS::MemCtrl::addMaster(), Prefetcher::SignaturePath::addPrefetch(), HWScheduler::addQCntxt(), InstructionQueue< Impl >::addReadyMemInst(), UnifiedFreeList::addReg(), ArmISA::PMU::addSoftwareIncrementEvent(), StorageSpace::addSymbol(), PseudoInst::addsymbol(), FullO3CPU< O3CPUImpl >::addThreadToExitingList(), InstructionQueue< Impl >::addToDependents(), Prefetcher::Queued::addToQueue(), DRAMCtrl::addToReadQueue(), DRAMCtrl::addToWriteQueue(), ActivityRecorder::advance(), TimingSimpleCPU::advanceInst(), Checker< O3CPUImpl >::advancePC(), ComputeUnit::AllAtBarrier(), DirectoryMemory::allocate(), CacheMemory::allocate(), BaseCache::allocateBlock(), Prefetcher::Stride::allocateNewContext(), BaseCache::allocateWriteBuffer(), AQLRingBuffer::allocEntry(), Prefetcher::Queued::alreadyInQueue(), SwitchAllocator::arbitrate_outports(), X86KvmCPU::archIsDrained(), MessageBuffer::areNSlotsAvailable(), MipsProcess::argsInit(), RiscvProcess::argsInit(), PowerProcess::argsInit(), SparcProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), PseudoInst::arm(), PosixKvmTimer::arm(), BaseCPU::armMonitor(), ElasticTrace::assignRobDep(), GPUCoalescer::atomicCallback(), SMMUv3SlaveInterface::atsMasterRecvTimingResp(), SMMUv3SlaveInterface::atsSendDeviceRetry(), SMMUv3SlaveInterface::atsSlaveRecvAtomic(), SMMUv3SlaveInterface::atsSlaveRecvTimingReq(), EtherTapStub::attach(), BaseCPU::BaseCPU(), TAGEBase::baseUpdate(), Prefetcher::BOP::bestOffsetLearning(), CxxConfigManager::bindObjectPorts(), CxxConfigManager::bindPort(), DefaultDecode< Impl >::block(), DefaultRename< Impl >::block(), DefaultIEW< Impl >::block(), BrigObject::BrigObject(), TAGEBase::btbUpdate(), DefaultFetch< Impl >::buildInst(), DefaultRename< Impl >::calcFreeLQEntries(), DefaultRename< Impl >::calcFreeSQEntries(), PowerDomain::calculatePossiblePwrStates(), PowerDomain::calculatePowerDomainState(), Prefetcher::DeltaCorrelatingPredictionTables::calculatePrefetch(), Prefetcher::BOP::calculatePrefetch(), Prefetcher::Stride::calculatePrefetch(), Prefetcher::STeMS::calculatePrefetch(), ArmSemihosting::call32(), ArmSemihosting::call64(), ArmSemihosting::callClose(), ArmSemihosting::callOpen(), ArmSemihosting::callWrite0(), ArmSemihosting::callWriteC(), Minor::LSQ::StoreBuffer::canForwardDataToLoad(), Minor::Scoreboard::canInstIssue(), Check::changeAddress(), Minor::Fetch1::changeStream(), CopyEngine::CopyEngineChannel::channelWrite(), Trace::ArmNativeTrace::check(), StoreSet::checkClear(), Gicv3Its::checkCommandQueue(), BaseCache::CacheReqPacketQueue::checkConflictingSnoop(), FlashDevice::checkDrain(), IGbE::checkDrain(), UFSHostDevice::checkDrain(), DRAMCtrl::Rank::checkDrainDone(), StoreSet::checkInst(), X86ISA::Interrupts::checkInterrupts(), Minor::Execute::checkInterrupts(), AbstractMemory::checkLockedAddrList(), DefaultIEW< Impl >::checkMisprediction(), RiscvISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions64(), VncServer::checkProtocolVersion(), CacheMemory::checkResourceAvailable(), VncServer::checkSecurity(), DefaultDecode< Impl >::checkSignalsAndUpdate(), DefaultIEW< Impl >::checkSignalsAndUpdate(), DefaultRename< Impl >::checkSignalsAndUpdate(), DefaultFetch< Impl >::checkSignalsAndUpdate(), LSQUnit< Impl >::checkSnoop(), DefaultDecode< Impl >::checkStall(), DefaultIEW< Impl >::checkStall(), DefaultRename< Impl >::checkStall(), DefaultFetch< Impl >::checkStall(), CheckTable::CheckTable(), LSQUnit< Impl >::checkViolations(), Trace::X86NativeTrace::checkXMM(), IGbE::chkInterrupt(), DRAMCtrl::chooseNext(), DRAMCtrl::chooseNextFRFCFS(), Cache::cleanEvictBlk(), FullO3CPU< O3CPUImpl >::cleanUpRemovedInsts(), IntrControl::clear(), MipsISA::Interrupts::clear(), ArmISA::Interrupts::clear(), SparcISA::Interrupts::clear(), RiscvISA::Interrupts::clear(), IntrControl::clearAll(), MipsISA::Interrupts::clearAll(), ArmISA::Interrupts::clearAll(), RiscvISA::Interrupts::clearAll(), BaseCache::CacheSlavePort::clearBlocked(), BaseCache::clearBlocked(), Minor::Scoreboard::clearInstDests(), PciHost::DeviceInterface::clearInt(), MuxingKvmGic::clearInt(), GicV2::clearInt(), ArmISA::PMU::clearInterrupt(), UFSHostDevice::clearInterrupt(), MaltaCChip::clearIntr(), MaltaIO::clearIntr(), AbstractCacheEntry::clearLocked(), CacheMemory::clearLocked(), Minor::LSQ::clearMemBarrier(), MuxingKvmGic::clearPPInt(), GicV2::clearPPInt(), FVPBasePwrCtrl::clearStandByWfi(), BaseRemoteGDB::clearTempBreakpoint(), FVPBasePwrCtrl::clearWakeRequest(), SrcClockDomain::clockPeriod(), BaseRemoteGDB::cmd_clr_hw_bkpt(), BaseRemoteGDB::cmd_set_hw_bkpt(), BaseRemoteGDB::cmd_unsupported(), HSAPacketProcessor::CmdQueueCmdDmaEvent::CmdQueueCmdDmaEvent(), KvmVM::coalesceMMIO(), SimpleIndirectPredictor::commit(), DefaultCommit< Impl >::commit(), InstructionQueue< Impl >::commit(), Minor::Execute::commit(), DefaultCommit< Impl >::commitHead(), Minor::Execute::commitInst(), DefaultCommit< Impl >::commitInsts(), LSQUnit< Impl >::commitLoad(), LSQUnit< Impl >::commitStores(), CommMonitor::CommMonitor(), ThreadContext::compare(), ElasticTrace::compDelayPhysRegDep(), ElasticTrace::compDelayRob(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::completeAcc(), MemDepUnit< MemDepPred, Impl >::completeBarrier(), MemDepUnit< MemDepPred, Impl >::completed(), ArmISA::TableWalker::completeDrain(), TimingSimpleCPU::completeIfetch(), X86ISA::Interrupts::completeIPI(), GPUCoalescer::completeIssue(), TraceCPU::ElasticDataGen::completeMemAccess(), InstructionQueue< Impl >::completeMemInst(), MemChecker::completeRead(), GarnetSyntheticTraffic::completeRequest(), MemTest::completeRequest(), LSQUnit< Impl >::completeStore(), MemChecker::completeWrite(), IGbE::TxDescCache::completionWriteback(), MultiCompressor::compress(), RepeatedQwordsCompressor::compress(), ZeroCompressor::compress(), BaseDelta< uint64_t, 16 >::compress(), BaseCacheCompressor::compress(), DictionaryCompressor< uint64_t >::compress(), MultiperspectivePerceptron::computeBits(), DRAMCtrl::Rank::computeStats(), SMMUTranslationProcess::configCacheLookup(), SMMUTranslationProcess::configCacheUpdate(), MipsISA::ISA::configCP(), TCPIface::connect(), VirtIO9PSocket::connectSocket(), Terminal::console_in(), VirtQueue::consumeDescriptor(), HWScheduler::contextSwitchQ(), MuxingKvmGic::copyCpuRegister(), MuxingKvmGic::copyDistRegister(), A9GlobalTimer::Timer::counterAtCmpVal(), Sp804::Timer::counterAtZero(), X86ISA::I8254::counterInterrupt(), Intel8254Timer::counterInterrupt(), ArchTimer::counterLimitReached(), PL031::counterMatch(), IGbE::cpuClearInt(), Sinic::Base::cpuInterrupt(), NSGigE::cpuInterrupt(), Sinic::Base::cpuIntrClear(), NSGigE::cpuIntrClear(), Sinic::Base::cpuIntrPost(), NSGigE::cpuIntrPost(), IGbE::cpuPostInt(), PhysicalMemory::createBackingStore(), NoncoherentCache::createMissPacket(), Cache::createMissPacket(), VncServer::data(), Pl011::dataAvailable(), TraceCPU::dcacheRecvTimingResp(), TraceCPU::dcacheRetryRecvd(), ActivityRecorder::deactivateStage(), DefaultIEW< Impl >::deactivateStage(), FullO3CPU< O3CPUImpl >::deactivateThread(), CacheMemory::deallocate(), Queue< WriteQueueEntry >::deallocate(), PseudoInst::debugbreak(), Check::debugPrint(), RiscvISA::Decoder::decode(), DefaultDecode< Impl >::decode(), DRAMCtrl::decodeAddr(), DefaultDecode< Impl >::decodeInsts(), DictionaryCompressor< uint64_t >::decompress(), OutputUnit::decrement_credit(), DefaultBTB::DefaultBTB(), KvmVM::delayedStartup(), CxxConfigManager::deleteObjects(), Minor::LSQ::StoreBuffer::deleteRequest(), X86KvmCPU::deliverInterrupts(), SparcISA::TLB::demapAll(), SparcISA::TLB::demapContext(), RiscvISA::TLB::demapPage(), SparcISA::TLB::demapPage(), MessageBuffer::dequeue(), SimpleMemory::dequeue(), EtherTapStub::detach(), VncServer::detach(), Sinic::Device::devIntrChangeMask(), NSGigE::devIntrChangeMask(), Sinic::Device::devIntrClear(), NSGigE::devIntrClear(), Sinic::Device::devIntrPost(), NSGigE::devIntrPost(), SystemCounter::disable(), PosixKvmTimer::disarm(), FunctionRefOperand::disassemble(), DefaultIEW< Impl >::dispatch(), Shader::dispatch_workgroups(), IdeController::dispatchAccess(), DefaultIEW< Impl >::dispatchInsts(), HSAPacketProcessor::displayQueueDescriptor(), DistEtherLink::DistEtherLink(), DistIface::DistIface(), DmaPort::dmaAction(), Pl111::dmaDone(), IdeDisk::dmaPrdReadDone(), HSAPacketProcessor::dmaReadVirt(), IdeDisk::dmaWriteDone(), X86ISA::Decoder::doDisplacementState(), IdeDisk::doDmaDataRead(), IdeDisk::doDmaDataWrite(), IdeDisk::doDmaRead(), IdeDisk::doDmaTransfer(), IdeDisk::doDmaWrite(), DRAMCtrl::doDRAMAccess(), X86ISA::Decoder::doFromCacheState(), X86ISA::Decoder::doImmediateState(), ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL1DescriptorWrapper(), ArmISA::TableWalker::doL2Descriptor(), ArmISA::TableWalker::doL2DescriptorWrapper(), ArmISA::TableWalker::doLongDescriptor(), ArmISA::TableWalker::doLongDescriptorWrapper(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), X86ISA::Decoder::doModRMState(), AddressMonitor::doMonitor(), X86ISA::Decoder::doOneByteOpcodeState(), X86ISA::Decoder::doPrefixState(), SMMUTranslationProcess::doReadCD(), SMMUTranslationProcess::doReadSTE(), X86ISA::Decoder::doResetState(), PCEventQueue::doService(), X86ISA::Decoder::doSIBState(), ROB< Impl >::doSquash(), DefaultRename< Impl >::doSquash(), InstructionQueue< Impl >::doSquash(), DefaultFetch< Impl >::doSquash(), X86ISA::Decoder::doThreeByte0F38OpcodeState(), X86ISA::Decoder::doThreeByte0F3AOpcodeState(), Cache::doTimingSupplyResponse(), RiscvISA::TLB::doTranslate(), X86ISA::Decoder::doTwoByteOpcodeState(), X86ISA::Decoder::doVexOpcodeState(), FlashDevice::drain(), BaseKvmCPU::drain(), CopyEngine::CopyEngineChannel::drain(), BaseXBar::Layer< MasterPort, SlavePort >::drain(), Minor::Pipeline::drain(), QoS::MemSinkCtrl::drain(), MinorCPU::drain(), Gicv3Its::drain(), DmaPort::drain(), RubyPort::drain(), UFSHostDevice::drain(), SimpleMemory::drain(), AtomicSimpleCPU::drain(), PacketQueue::drain(), TimingSimpleCPU::drain(), FullO3CPU< O3CPUImpl >::drain(), Minor::Execute::drain(), IGbE::drain(), DistIface::drain(), ArmISA::TableWalker::drain(), DRAMCtrl::drain(), BaseKvmCPU::drainResume(), CopyEngine::CopyEngineChannel::drainResume(), Minor::Pipeline::drainResume(), MinorCPU::drainResume(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), FullO3CPU< O3CPUImpl >::drainResume(), Minor::Execute::drainResume(), IGbE::drainResume(), DistIface::drainResume(), DefaultFetch< Impl >::drainStall(), DRAMCtrl::DRAMCtrl(), DRAMSim2::DRAMSim2(), VirtDescriptor::dump(), Minor::Fetch2::dumpAllInput(), VirtIO9PBase::dumpMsg(), PseudoInst::dumpresetstats(), PseudoInst::dumpstats(), TraceCPU::ElasticDataGen::ElasticDataGen(), DefaultIEW< Impl >::emptyRenameInsts(), SystemCounter::enable(), ArmISA::EndBitUnion(), MessageBuffer::enqueue(), CacheRecorder::enqueueNextFetchRequest(), CacheRecorder::enqueueNextFlushRequest(), ExitGen::enter(), SnoopFilter::eraseIfNullEntry(), QoS::MemCtrl::escalate(), QoS::MemCtrl::escalateQueues(), TCPIface::establishConnection(), IGbE::ethRxPkt(), IGbE::ethTxDone(), Minor::Pipeline::evaluate(), Minor::Decode::evaluate(), Minor::Fetch2::evaluate(), Minor::Execute::evaluate(), Minor::Fetch1::evaluate(), LocalMemPipeline::exec(), GlobalMemPipeline::exec(), GpuDispatcher::exec(), Wavefront::exec(), Minor::ExecContext::ExecContext(), Minor::Scoreboard::execSeqNumToWaitFor(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execute(), TraceCPU::ElasticDataGen::execute(), HsailISA::Ret::execute(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), Gcn3ISA::Inst_SOPP__S_ENDPGM::execute(), Gcn3ISA::Inst_VOP2__V_ADD_F32::execute(), Gcn3ISA::Inst_VOP2__V_MUL_U32_U24::execute(), Gcn3ISA::Inst_VOP2__V_LSHLREV_B32::execute(), Gcn3ISA::Inst_VOP2__V_OR_B32::execute(), Gcn3ISA::Inst_VOP2__V_MAC_F32::execute(), Gcn3ISA::Inst_VOP2__V_ADD_U32::execute(), Gcn3ISA::Inst_VOP1__V_MOV_B32::execute(), Gcn3ISA::Inst_VOP3__V_PERM_B32::execute(), DefaultIEW< Impl >::executeInsts(), LSQUnit< Impl >::executeLoad(), Minor::Execute::executeMemRefInst(), TraceCPU::ElasticDataGen::executeMemReq(), LSQUnit< Impl >::executeStore(), FullO3CPU< O3CPUImpl >::exitThreads(), MemState::extendMmap(), FetchUnit::fetch(), TimingSimpleCPU::fetch(), DefaultFetch< Impl >::fetch(), Minor::Fetch1::Fetch1(), CopyEngine::CopyEngineChannel::fetchAddrComplete(), DefaultFetch< Impl >::fetchCacheLine(), IGbE::DescCache< iGbReg::RxDesc >::fetchComplete(), CopyEngine::CopyEngineChannel::fetchDescComplete(), CopyEngine::CopyEngineChannel::fetchDescriptor(), ArmISA::TableWalker::fetchDescriptor(), IGbE::DescCache< iGbReg::RxDesc >::fetchDescriptors(), IGbE::DescCache< iGbReg::RxDesc >::fetchDescriptors1(), Minor::Fetch1::fetchLine(), CopyEngine::CopyEngineChannel::fetchNextAddr(), GoodbyeObject::fillBuffer(), MipsISA::ISA::filterCP0Write(), UFSHostDevice::finalUTP(), HWScheduler::findEmptyHWQ(), HWScheduler::findNextActiveALQ(), CxxConfigManager::findObject(), CxxConfigManager::findObjectParams(), BaseXBar::findPort(), Minor::LSQ::findResponse(), CompressedTags::findVictim(), HSAPacketProcessor::finishPkt(), SnoopFilter::finishRequest(), DefaultFetch< Impl >::finishTranslation(), X86ISA::TLB::flushAll(), RiscvISA::TLB::flushAll(), MipsISA::TLB::flushAll(), PowerISA::TLB::flushAll(), ArmISA::TLB::flushAllNs(), ArmISA::TLB::flushAllSecurity(), ArmISA::TLB::flushAsid(), BaseKvmCPU::flushCoalescedMMIO(), ArmISA::TLB::flushMva(), ArmISA::TLB::flushMvaAsid(), X86ISA::TLB::flushNonGlobal(), Minor::LSQ::StoreBuffer::forwardStoreData(), CoherentXBar::forwardTiming(), AQLRingBuffer::freeEntry(), SystemCounter::freqUpdateCallback(), FullO3CPU< O3CPUImpl >::FullO3CPU(), MessageBuffer::functionalAccess(), BaseCache::functionalAccess(), RubySystem::functionalRead(), RubySystem::functionalWrite(), GarnetSyntheticTraffic::GarnetSyntheticTraffic(), Pl011::generateInterrupt(), Pl111::generateInterrupt(), UFSHostDevice::generateInterrupt(), Iob::generateIpi(), GarnetSyntheticTraffic::generatePkt(), DefaultCommit< Impl >::generateTCEvent(), DefaultCommit< Impl >::generateTrapEvent(), X86ISA::RegOpBase::genFlags(), RubyPort::PioSlavePort::getAddrRanges(), GpuDispatcher::getAddrRanges(), Gicv3Its::getAddrRanges(), BasicPioDevice::getAddrRanges(), SimpleMemobj::getAddrRanges(), SimpleCache::getAddrRanges(), BaseXBar::getAddrRanges(), CheckTable::getCheck(), HSAPacketProcessor::getCommandsFromHost(), BaseCacheCompressor::getDecompressionLatency(), StubSlavePortHandler::getExternalPort(), DefaultCommit< Impl >::getInsts(), MipsISA::Interrupts::getInterrupt(), X86ISA::Interrupts::getInterrupt(), X86KvmCPU::getMsrIntersection(), RandomGen::getNextPacket(), DramGen::getNextPacket(), LinearGen::getNextPacket(), DramRotGen::getNextPacket(), TraceGen::getNextPacket(), Prefetcher::Queued::getPacket(), IGbE::TxDescCache::getPacketData(), IGbE::TxDescCache::getPacketSize(), ExternalMaster::getPort(), ExternalSlave::getPort(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), ArmISA::TLB::getResultTe(), ListOperand::getSrcOperand(), ArmISA::TLB::getTE(), X86ISA::I8259::getVector(), SimpleThread::getWritableVecPredReg(), SimpleThread::getWritableVecReg(), GicV2::GicV2(), ArmISA::globalClearExclusive(), GoodbyeObject::GoodbyeObject(), O3ThreadContext< Impl >::halt(), FullO3CPU< O3CPUImpl >::haltContext(), NoncoherentCache::handleAtomicReqMiss(), Cache::handleAtomicReqMiss(), BaseCache::handleFill(), X86ISA::GpuTLB::handleFuncTranslationReturn(), DefaultCommit< Impl >::handleInterrupt(), BaseKvmCPU::handleKvmExit(), X86KvmCPU::handleKvmExitIO(), MipsISA::handleLockedRead(), RiscvISA::handleLockedRead(), ArmISA::handleLockedRead(), ArmISA::handleLockedSnoop(), RiscvISA::handleLockedSnoop(), ArmISA::handleLockedSnoopHit(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), ArmISA::handleLockedWrite(), Minor::Execute::handleMemResponse(), Checker< O3CPUImpl >::handlePendingInt(), SimpleMemobj::handleRequest(), SimpleCache::handleRequest(), DmaPort::handleResp(), SimpleMemobj::handleResponse(), SimpleCache::handleResponse(), Cache::handleSnoop(), MSHR::handleSnoop(), TAGEBase::handleTAGEUpdate(), BaseCache::handleTimingReqHit(), BaseCache::handleTimingReqMiss(), Minor::Fetch1::handleTLBResponse(), X86ISA::GpuTLB::handleTranslationReturn(), HardBreakpoint::HardBreakpoint(), IntrControl::havePosted(), SMMUTranslationProcess::hazard4kHold(), SMMUTranslationProcess::hazard4kRegister(), SMMUTranslationProcess::hazard4kRelease(), SMMUTranslationProcess::hazardIdHold(), SMMUTranslationProcess::hazardIdRegister(), SMMUTranslationProcess::hazardIdRelease(), IGbE::TxDescCache::headerComplete(), HelloObject::HelloObject(), RubyPort::MemSlavePort::hitCallback(), RubyDirectedTester::hitCallback(), RubyTester::hitCallback(), Sequencer::hitCallback(), GPUCoalescer::hitCallback(), PS2Device::hostWrite(), HSAPacketProcessor::HSAPacketProcessor(), TraceCPU::icacheRetryRecvd(), SMMUTranslationProcess::ifcTLBLookup(), SMMUTranslationProcess::ifcTLBUpdate(), OutputUnit::increment_credit(), CopyEngine::CopyEngineChannel::inDrain(), MemChecker::ByteTracker::inExpectedData(), StoreSet::init(), MemDepUnit< MemDepPred, Impl >::init(), BaseRegOperand::init(), TraceCPU::init(), DistEtherLink::init(), LSQUnit< Impl >::init(), HsailCode::init(), ImmOperand< SrcCType >::init(), CoherentXBar::init(), TraceCPU::FixedRetryGen::init(), ListOperand::init(), TraceCPU::ElasticDataGen::init(), BaseRegOperand::init_from_vect(), TAGE_SC_L_TAGE_8KB::initFoldedHistories(), TAGEBase::initFoldedHistories(), FlashDevice::initializeFlash(), RubyPrefetcher::initializeStream(), InvalidateGenerator::initiate(), SeriesRequestGenerator::initiate(), Check::initiate(), GPUDynInst::initiateAcc(), Check::initiateAction(), Check::initiateCheck(), FetchUnit::initiateFetch(), Check::initiateFlush(), Check::initiatePrefetch(), PseudoInst::initParam(), KernelWorkload::initState(), ArmISA::FsLinux::initState(), TrafficGen::initState(), CxxConfigManager::initState(), BaseDynInst< Impl >::initVars(), RiscvISA::TLB::insert(), MemDepUnit< MemDepPred, Impl >::insert(), SparcISA::TLB::insert(), InstructionQueue< Impl >::insert(), Prefetcher::Queued::insert(), ArmISA::TLB::insert(), SimpleCache::insert(), Minor::LSQ::StoreBuffer::insert(), MipsISA::TLB::insertAt(), MemDepUnit< MemDepPred, Impl >::insertBarrier(), BaseRemoteGDB::insertHardBreak(), ROB< Impl >::insertInst(), GPUCoalescer::insertKernel(), LSQUnit< Impl >::insertLoad(), MemDepUnit< MemDepPred, Impl >::insertNonSpec(), InstructionQueue< Impl >::insertNonSpec(), GPUCoalescer::insertRequest(), StoreSet::insertStore(), LSQUnit< Impl >::insertStore(), ArmISA::TableWalker::insertTableEntry(), FullO3CPU< O3CPUImpl >::insertThread(), CxxConfigManager::instantiate(), InstructionQueue< Impl >::InstructionQueue(), DefaultIEW< Impl >::instToCommit(), MipsISA::Interrupts::interruptsPending(), IdeDisk::intrClear(), IdeDisk::intrPost(), X86ISA::GpuTLB::invalidateAll(), X86ISA::GpuTLB::invalidateNonGlobal(), VIPERCoalescer::invL1(), FaultBase::invoke(), X86ISA::X86FaultBase::invoke(), MipsISA::MipsFaultBase::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ArmFault::invoke64(), FullO3CPU< O3CPUImpl >::isCpuDrained(), Minor::Pipeline::isDrained(), DefaultIEW< Impl >::isDrained(), Minor::Fetch1::isDrained(), LSQ< Impl >::isDrained(), AbstractCacheEntry::isLocked(), CacheMemory::isLocked(), HWScheduler::isRLQIdle(), MemDepUnit< MemDepPred, Impl >::issue(), Minor::Execute::issue(), StoreSet::issued(), DMASequencer::issueNext(), RubyPrefetcher::issueNextPrefetch(), X86ISA::GpuTLB::issueTLBLookup(), CacheMemory::isTagPresent(), PciVirtIO::kick(), MmioVirtIO::kick(), BaseArmKvmCPU::kvmRun(), X86KvmCPU::kvmRun(), ArmKvmCPU::kvmRun(), BaseKvmCPU::kvmRun(), X86KvmCPU::kvmRunDrain(), EtherSwitch::Interface::learnSenderAddr(), Terminal::listen(), BaseRemoteGDB::listen(), VncServer::listen(), TapListener::listen(), Sequencer::llscClearMonitor(), Sequencer::llscLoadLinked(), Sequencer::llscStoreConditional(), Loader::ElfObject::loadSomeSymbols(), SimObject::loadState(), PseudoInst::loadsymbol(), LocalBP::LocalBP(), QoS::MemCtrl::logRequest(), QoS::MemCtrl::logResponse(), SimpleIndirectPredictor::lookup(), MipsISA::TLB::lookup(), LocalBP::lookup(), DirectoryMemory::lookup(), TAGE::lookup(), PowerISA::TLB::lookup(), RiscvISA::TLB::lookup(), SparcISA::TLB::lookup(), ArmISA::TLB::lookup(), DefaultFetch< Impl >::lookupAndUpdateNextPC(), EtherSwitch::Interface::lookupDestPort(), X86ISA::GpuTLB::lookupIt(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), LoopPredictor::loopUpdate(), X86ISA::I8259::lowerInterruptPin(), LSQ< Impl >::LSQ(), PseudoInst::m5checkpoint(), PseudoInst::m5exit(), PseudoInst::m5fail(), X86ISA::m5PageFault(), PseudoInst::m5Syscall(), VIPERCoalescer::makeRequest(), DMASequencer::makeRequest(), Sequencer::makeRequest(), UFSHostDevice::manageReadTransfer(), UFSHostDevice::manageWriteTransfer(), EmulationPageTable::map(), MultiLevelPageTable< EntryTypes >::map(), HWScheduler::mapQIfSlotAvlbl(), MemState::mapRegion(), DefaultCommit< Impl >::markCompletedInsts(), BaseDynInst< Impl >::markSrcRegReady(), Minor::Scoreboard::markupInstDests(), SMMUv3::masterRecvReqRetry(), SMMUv3::masterRecvTimingResp(), SMMUv3::masterTableWalkRecvReqRetry(), SMMUv3::masterTableWalkRecvTimingResp(), PowerState::matchPwrState(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), MemDepUnit< MemDepPred, Impl >::MemDepEntry::MemDepEntry(), MemDepUnit< MemDepPred, Impl >::MemDepUnit(), RubyPort::MemMasterPort::MemMasterPort(), RubyPort::MemSlavePort::MemSlavePort(), RubySystem::memWriteback(), MinorCPU::memWriteback(), SMMUTranslationProcess::microTLBLookup(), SMMUTranslationProcess::microTLBUpdate(), HSADriver::mmap(), Shader::mmap(), RiscvISA::Decoder::moreBytes(), X86ISA::Decoder::moreBytes(), MemDepUnit< MemDepPred, Impl >::moveToReady(), BaseCPU::mwait(), BaseCPU::mwaitAtomic(), Serializable::ScopedCheckpointSection::nameOut(), Trace::NativeTrace::NativeTrace(), Minor::LSQ::needsToTick(), TraceCPU::FixedRetryGen::nextExecute(), PyTrafficGen::nextGenerator(), TrafficGen::nextGenerator(), RandomGen::nextPacketTick(), LinearGen::nextPacketTick(), TraceGen::nextPacketTick(), MemDepUnit< MemDepPred, Impl >::nonSpecInstReady(), Prefetcher::Queued::notify(), GpuDispatcher::notifyWgCompl(), IGbE::TxDescCache::nullCallback(), LSQUnit< Impl >::numFreeLoadEntries(), LSQUnit< Impl >::numFreeStoreEntries(), RubyPrefetcher::observeMiss(), RubyPrefetcher::observePfHit(), RubyPrefetcher::observePfMiss(), BaseXBar::Layer< MasterPort, SlavePort >::occupyLayer(), NoMaliGpu::onInterrupt(), VirtQueue::onNotify(), VirtIODeviceBase::onNotify(), VirtIOConsole::TermTransQueue::onNotifyDescriptor(), VirtIO9PBase::FSQueue::onNotifyDescriptor(), VirtIOBlock::RequestQueue::onNotifyDescriptor(), NoMaliGpu::onReset(), HSADriver::open(), PerfectSwitch::operateMessageBuffer(), Throttle::operateVnet(), DistIface::packetOut(), RiscvISA::Walker::WalkerState::pageFault(), X86ISA::Walker::WalkerState::pageFault(), QoS::Policy::pair(), TrafficGen::parseConfig(), CxxConfigManager::parsePort(), CheckerThreadContext< TC >::pcState(), CheckerCPU::pcState(), MessageBuffer::peek(), VoltageDomain::perfLevel(), DVFSHandler::perfLevel(), SrcClockDomain::perfLevel(), Check::performCallback(), Gcn3ISA::Inst_VOP3__V_PERM_B32::permute(), X86ISA::X86StaticInst::pick(), Check::pickInitiatingNode(), RubyPort::PioMasterPort::PioMasterPort(), RubyPort::PioSlavePort::PioSlavePort(), DefaultFetch< Impl >::pipelineIcacheAccesses(), IGbE::RxDescCache::pktComplete(), IGbE::TxDescCache::pktComplete(), IGbE::RxDescCache::pktSplitDone(), ArmISA::PMU::PMU(), Wavefront::popFromReconvergenceStack(), Minor::LSQ::popResponse(), IntrControl::post(), MipsISA::Interrupts::post(), ArmISA::Interrupts::post(), SparcISA::Interrupts::post(), RiscvISA::Interrupts::post(), PciHost::DeviceInterface::postInt(), IGbE::postInterrupt(), MaltaCChip::postIntr(), MaltaIO::postIntr(), VGic::postMaintInt(), VGic::postVInt(), FVPBasePwrCtrl::powerCoreOff(), FVPBasePwrCtrl::powerCoreOn(), DRAMCtrl::Rank::powerDownSleep(), DRAMCtrl::prechargeBank(), DrainManager::preCheckpointRestore(), BPredUnit::predict(), LTAGE::predict(), Minor::Fetch2::predictBranch(), BaseSimpleCPU::preExecute(), DRAMCtrl::printQs(), TraceCPU::ElasticDataGen::printReadyList(), StackDistCalc::printStack(), ArmISA::TLB::printTlb(), MipsISA::TLB::probeEntry(), PowerISA::TLB::probeEntry(), SkipFuncBase::process(), EndQuiesceEvent::process(), MC146818::RTCEvent::process(), MC146818::RTCTickEvent::process(), ArmISA::Decoder::process(), AnnotateDumpCallback::process(), HardBreakpoint::process(), HSAPacketProcessor::QueueProcessEvent::process(), HSAPacketProcessor::CmdQueueCmdDmaEvent::process(), DefaultFetch< Impl >::processCacheCompletion(), TLBCoalescer::processCleanupEvent(), SMMUv3::processCommand(), SMMUv3::processCommands(), IGbE::TxDescCache::processContextDesc(), BrigObject::processDirectives(), GoodbyeObject::processEvent(), HelloObject::processEvent(), FetchUnit::processFetchReturn(), InstructionQueue< Impl >::processFUCompletion(), SparcISA::ISA::processHSTickCompare(), FullO3CPU< O3CPUImpl >::processInterrupts(), Uart8250::processIntrEvent(), ComputeUnit::DataPort::processMemReqEvent(), ComputeUnit::DataPort::processMemRespEvent(), QoS::MemSinkCtrl::processNextReqEvent(), DRAMCtrl::processNextReqEvent(), HSAPacketProcessor::processPkt(), DRAMCtrl::Rank::processPowerEvent(), DRAMCtrl::Rank::processPrechargeEvent(), TLBCoalescer::processProbeTLBEvent(), DRAMCtrl::Rank::processRefreshEvent(), DRAMCtrl::processRespondEvent(), Minor::Fetch1::processResponse(), BaseCache::CacheSlavePort::processSendRetry(), SparcISA::ISA::processSTickCompare(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::TableWalker::processWalkWrapper(), VirtQueue::produceDescriptor(), DefaultFetch< Impl >::profileStall(), Cache::promoteWholeLineWrites(), DRAMCtrl::pruneBurstTick(), PseudoInst::pseudoInst(), EtherSwitch::Interface::PortFifo::push(), Serializable::ScopedCheckpointSection::pushName(), DistIface::RecvScheduler::pushPacket(), Minor::LSQ::pushRequest(), PowerDomain::pwrStateChangeCallback(), HDLcd::pxlFrameDone(), HDLcd::pxlUnderrun(), HDLcd::pxlVSyncBegin(), HDLcd::pxlVSyncEnd(), QoS::MemCtrl::qosSchedule(), PseudoInst::quiesce(), ThreadContext::quiesce(), PseudoInst::quiesceCycles(), PseudoInst::quiesceNs(), PseudoInst::quiesceSkip(), ThreadContext::quiesceTick(), PseudoInst::quiesceTime(), IGbE::radvProcess(), ArmISA::PMU::raiseInterrupt(), X86ISA::I8259::raiseInterruptPin(), IGbE::rdtrProcess(), MmioVirtIO::read(), PciVirtIO::read(), SimpleDisk::read(), MmDisk::read(), Sp805::read(), Pl011::read(), AmbaFake::read(), X86ISA::Speaker::read(), VectorRegisterFile::read(), IsaFake::read(), Uart8250::read(), RawDiskImage::read(), FVPBasePwrCtrl::read(), X86ISA::I8259::read(), HDLcd::read(), Gicv2m::read(), PL031::read(), Sp804::Timer::read(), Gicv3::read(), EnergyCtrl::read(), A9GlobalTimer::Timer::read(), Pl050::read(), CowDiskImage::read(), VirtIOBlock::read(), CpuLocalTimer::Timer::read(), GpuDispatcher::read(), Gcn3ISA::VecOperand< DataType, Const, NumDwords >::read(), Gicv3Its::read(), Sp804::read(), RealViewCtrl::read(), VirtDescriptor::read(), CpuLocalTimer::read(), CopyEngine::read(), X86ISA::Interrupts::read(), RealViewOsc::read(), BaseRemoteGDB::read(), VncServer::read(), Sinic::Device::read(), GenericPciHost::read(), NSGigE::read(), Pl111::read(), Gcn3ISA::ScalarOperand< DataType, Const, NumDwords >::read(), GenericTimerFrame::read(), GenericTimerMem::read(), IGbE::read(), LSQUnit< Impl >::read(), GPUCoalescer::readCallback(), UFSHostDevice::readCallback(), PhysRegFile::readCCReg(), SimpleThread::readCCReg(), IdeDisk::readCommand(), ItsCommand::readCommand(), DRAMSim2::readComplete(), IdeController::readConfig(), PciDevice::readConfig(), SMMUv3::readControl(), IdeDisk::readControl(), CopyEngine::CopyEngineChannel::readCopyBytes(), CopyEngine::CopyEngineChannel::readCopyBytesComplete(), GicV2::readCpu(), VGic::readCtrl(), Terminal::readData(), UFSHostDevice::readDevice(), ItsProcess::readDeviceTable(), GicV2::readDistributor(), UFSHostDevice::readDone(), PseudoInst::readfile(), PhysRegFile::readFloatReg(), SimpleThread::readFloatReg(), Pl111::readFramebuffer(), DefaultRename< Impl >::readFreeEntries(), UFSHostDevice::readGarbage(), AmbaDevice::readId(), PhysRegFile::readIntReg(), SimpleThread::readIntReg(), ItsProcess::readIrqCollectionTable(), ItsProcess::readIrqTranslationTable(), RiscvISA::ISA::readMiscReg(), MipsISA::ISA::readMiscReg(), ArmISA::PMU::readMiscReg(), SparcISA::ISA::readMiscReg(), Gicv3CPUInterface::readMiscReg(), GenericTimerISA::readMiscReg(), ArmISA::ISA::readMiscReg(), RiscvISA::ISA::readMiscRegNoEffect(), MipsISA::ISA::readMiscRegNoEffect(), SparcISA::ISA::readMiscRegNoEffect(), ArmISA::ISA::readMiscRegNoEffect(), TraceCPU::ElasticDataGen::readNextWindow(), DRAMCtrl::readQueueFull(), NoMaliGpu::readReg(), X86ISA::I82094AA::readReg(), X86ISA::Cmos::readRegister(), Gcn3ISA::ScalarOperand< DataType, Const, NumDwords >::readSpecialVal(), VGic::readVCpu(), PhysRegFile::readVecElem(), SimpleThread::readVecElem(), SimpleThread::readVecLane(), PhysRegFile::readVecPredReg(), SimpleThread::readVecPredReg(), PhysRegFile::readVecReg(), SimpleThread::readVecReg(), Wavefront::ready(), DistIface::readyToCkpt(), DistIface::readyToExit(), ComputeUnit::ReadyWorkgroup(), MessageBuffer::reanalyzeAllMessages(), MessageBuffer::reanalyzeList(), MessageBuffer::reanalyzeMessages(), Iob::receiveDeviceInterrupt(), Iob::receiveJBusInterrupt(), CacheMemory::recordCacheContents(), SimpleIndirectPredictor::recordIndirect(), DMASequencer::recordRequestType(), DirectoryMemory::recordRequestType(), CacheMemory::recordRequestType(), Sequencer::recordRequestType(), GPUCoalescer::recordRequestType(), SimpleIndirectPredictor::recordTarget(), PS2Keyboard::recv(), PS2TouchKit::recv(), PS2Mouse::recv(), BaseRemoteGDB::recv(), StubSlavePort::recvAtomic(), RubyPort::MemSlavePort::recvAtomic(), SMMUv3SlaveInterface::recvAtomic(), Cache::recvAtomic(), BaseCache::recvAtomic(), DRAMCtrl::recvAtomic(), NoncoherentXBar::recvAtomicBackdoor(), CoherentXBar::recvAtomicBackdoor(), AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), CoherentXBar::recvAtomicSnoop(), VncServer::recvCutText(), RubyPort::MemSlavePort::recvFunctional(), TLBCoalescer::CpuSidePort::recvFunctional(), NoncoherentXBar::recvFunctional(), MemCheckerMonitor::recvFunctional(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), CoherentXBar::recvFunctional(), AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), MemCheckerMonitor::recvFunctionalSnoop(), CoherentXBar::recvFunctionalSnoop(), TCPIface::recvHeader(), VncServer::recvKeyboardInput(), X86ISA::Interrupts::recvMessage(), EtherSwitch::Interface::recvPacket(), Sinic::Device::recvPacket(), NSGigE::recvPacket(), VncServer::recvPointerInput(), BaseXBar::recvRangeChange(), EtherTapStub::recvReal(), BaseTrafficGen::recvReqRetry(), Minor::Fetch1::recvReqRetry(), ComputeUnit::DataPort::recvReqRetry(), ComputeUnit::SQCPort::recvReqRetry(), ComputeUnit::DTLBPort::recvReqRetry(), ComputeUnit::ITLBPort::recvReqRetry(), BaseKvmCPU::KVMCpuPort::recvReqRetry(), ComputeUnit::LDSPort::recvReqRetry(), Minor::LSQ::recvReqRetry(), SimpleCache::CPUSidePort::recvRespRetry(), DRAMSim2::recvRespRetry(), MemTest::recvRetry(), LSQUnit< Impl >::recvRetry(), EtherTapBase::recvSimulated(), HMCController::recvTimingReq(), RubyPort::MemSlavePort::recvTimingReq(), Cache::recvTimingReq(), SMMUv3SlaveInterface::recvTimingReq(), SimpleCache::CPUSidePort::recvTimingReq(), TLBCoalescer::CpuSidePort::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), DRAMSim2::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), QoS::MemSinkCtrl::recvTimingReq(), CommMonitor::recvTimingReq(), X86ISA::GpuTLB::CpuSidePort::recvTimingReq(), CoherentXBar::recvTimingReq(), DRAMCtrl::recvTimingReq(), RubyPort::MemMasterPort::recvTimingResp(), DefaultFetch< Impl >::IcachePort::recvTimingResp(), RubyPort::PioMasterPort::recvTimingResp(), NoncoherentXBar::recvTimingResp(), TimingSimpleCPU::IcachePort::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), TimingSimpleCPU::DcachePort::recvTimingResp(), CommMonitor::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), X86ISA::GpuTLB::MemSidePort::recvTimingResp(), CoherentXBar::recvTimingResp(), Bridge::BridgeMasterPort::recvTimingResp(), Minor::Fetch1::recvTimingResp(), ComputeUnit::DataPort::recvTimingResp(), BaseCache::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), BaseKvmCPU::KVMCpuPort::recvTimingResp(), Minor::LSQ::recvTimingResp(), LSQ< Impl >::recvTimingResp(), Cache::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopReq(), LSQ< Impl >::recvTimingSnoopReq(), Cache::recvTimingSnoopResp(), CoherentXBar::recvTimingSnoopResp(), TokenManager::recvTokens(), MessageBuffer::recycle(), PciHost::registerDevice(), HWScheduler::registerNewQueue(), MemDepUnit< MemDepPred, Impl >::regsReady(), Stats::Group::regStats(), BaseXBar::Layer< MasterPort, SlavePort >::releaseLayer(), VMA::remap(), EmulationPageTable::remap(), FlashDevice::remap(), PCEventQueue::remove(), RiscvISA::TLB::remove(), DefaultRename< Impl >::removeFromHistory(), FullO3CPU< O3CPUImpl >::removeFrontInst(), BaseRemoteGDB::removeHardBreak(), FullO3CPU< O3CPUImpl >::removeInstsNotInROB(), FullO3CPU< O3CPUImpl >::removeInstsUntil(), FullO3CPU< O3CPUImpl >::removeThread(), SimpleRenameMap::rename(), DefaultRename< Impl >::rename(), DefaultRename< Impl >::renameDestRegs(), DefaultRename< Impl >::renameInsts(), DefaultRename< Impl >::renameSrcRegs(), replaceUpgrade(), MemDepUnit< MemDepPred, Impl >::replay(), VncServer::requestFbUpdate(), UFSHostDevice::requestHandler(), X86ISA::I8259::requestInterrupt(), X86ISA::Interrupts::requestInterrupt(), InstructionQueue< Impl >::rescheduleMemInst(), NoMaliGpu::reset(), IGbE::DescCache< iGbReg::RxDesc >::reset(), PseudoInst::resetstats(), Sp804::Timer::restartCounter(), A9GlobalTimer::Timer::restartCounter(), CpuLocalTimer::Timer::restartTimerCounter(), CpuLocalTimer::Timer::restartWatchdogCounter(), DrainManager::resume(), DmaReadFifo::resumeFillFunctional(), SMMUTranslationProcess::resumeTransaction(), PL031::resyncMatch(), ROB< Impl >::retireHead(), EtherTapBase::retransmit(), PacketQueue::retry(), SerialLink::SerialLinkSlavePort::retryStalledReq(), Bridge::BridgeSlavePort::retryStalledReq(), ROB< Impl >::ROB(), PseudoInst::rpns(), MC146818::RTCEvent::RTCEvent(), RubyPort::ruby_eviction_callback(), RubyPort::ruby_hit_callback(), SMMUv3::runProcessTiming(), Sinic::Device::rxDmaDone(), NSGigE::rxDmaReadDone(), NSGigE::rxDmaWriteDone(), DistEtherLink::RxLink::rxDone(), NSGigE::rxFilter(), Sinic::Device::rxKick(), NSGigE::rxKick(), NSGigE::rxReset(), IGbE::rxStateMachine(), VoltageDomain::sanitiseVoltages(), BaseCache::satisfyRequest(), GoodbyeObject::sayGoodbye(), HSAPacketProcessor::schedAQLProcessing(), TraceCPU::schedDcacheNext(), TraceCPU::schedDcacheNextEvent(), TraceCPU::schedIcacheNext(), BaseCache::CacheMasterPort::schedSendEvent(), PacketQueue::schedSendEvent(), PacketQueue::schedSendTiming(), QoS::FixedPriorityPolicy::schedule(), PCEventQueue::schedule(), QoS::MemCtrl::schedule(), SMMUv3SlaveInterface::scheduleDeviceRetry(), Uart8250::scheduleIntr(), InstructionQueue< Impl >::scheduleNonSpec(), DRAMCtrl::Rank::schedulePowerEvent(), InstructionQueue< Impl >::scheduleReadyInsts(), BaseTrafficGen::scheduleUpdate(), DRAMCtrl::Rank::scheduleWakeUpEvent(), HWScheduler::schedWakeup(), UFSHostDevice::UFSSCSIDevice::SCSICMDHandle(), UFSHostDevice::SCSIResume(), UFSHostDevice::SCSIStart(), QoS::TurnaroundPolicyIdeal::selectBusState(), QoS::MemCtrl::selectNextBusState(), QoS::LrgQueuePolicy::selectPacket(), EtherBus::send(), PS2Device::send(), BaseRemoteGDB::send(), TCPIface::sendCmd(), DmaPort::sendDma(), SMMUTranslationProcess::sendEvent(), TimingSimpleCPU::sendFetch(), VncServer::sendFrameBufferResized(), VncServer::sendFrameBufferUpdate(), Gicv3::sendInt(), MuxingKvmGic::sendInt(), Gicv3Distributor::sendInt(), GicV2::sendInt(), Cache::sendMSHRQueuePacket(), BaseCache::sendMSHRQueuePacket(), SimpleCache::CPUSidePort::sendPacket(), Gicv3::sendPPInt(), MuxingKvmGic::sendPPInt(), Gicv3Redistributor::sendPPInt(), GicV2::sendPPInt(), ComputeUnit::sendRequest(), DRAMSim2::sendResponse(), SimpleCache::sendResponse(), VirtIO9PBase::sendRMsg(), VncServer::sendServerInit(), Gicv3Redistributor::sendSGI(), EtherTapBase::sendSimulated(), Minor::LSQ::sendStoreToStoreBuffer(), ComputeUnit::sendSyncRequest(), ComputeUnit::LDSPort::sendTimingReq(), BaseCache::sendWriteQueuePacket(), Pl011::serialize(), HDLcd::serialize(), RiscvISA::ISA::serialize(), ArmISA::PMU::serialize(), Sp804::Timer::serialize(), PL031::serialize(), A9GlobalTimer::Timer::serialize(), SystemCounter::serialize(), CpuLocalTimer::Timer::serialize(), I2CBus::serialize(), SMMUv3::serialize(), VGic::serialize(), BaseTrafficGen::serialize(), Pl111::serialize(), GicV2::serialize(), ArmISA::ISA::serialize(), PhysicalMemory::serializeStore(), BaseKvmCPU::serializeThread(), Cache::serviceMSHRTargets(), SRegOperand::set(), DRegOperand::set(), CRegOperand::set(), ListOperand::set(), ROB< Impl >::setActiveThreads(), BaseCache::CacheSlavePort::setBlocked(), BaseCache::setBlocked(), NoMaliGpu::setCallback(), PhysRegFile::setCCReg(), SimpleThread::setCCReg(), MessageBuffer::setConsumer(), PowerState::setControlledDomain(), ArmISA::PMU::setControlReg(), ArmISA::PMU::setCounterTypeRegister(), HSAPacketProcessor::setDeviceQueueDesc(), VirtIODeviceBase::setDeviceStatus(), VncInput::setDirty(), Minor::Execute::setDrainState(), VncServer::setEncodings(), MipsISA::MipsFaultBase::setExceptionState(), PhysRegFile::setFloatReg(), SimpleThread::setFloatReg(), PowerDomain::setFollowerPowerStates(), SparcISA::ISA::setFSReg(), VirtIODeviceBase::setGuestFeatures(), PhysRegFile::setIntReg(), SimpleThread::setIntReg(), AbstractCacheEntry::setLocked(), CacheMemory::setLocked(), MipsISA::ISA::setMiscReg(), ArmISA::PMU::setMiscReg(), SparcISA::ISA::setMiscReg(), Gicv3CPUInterface::setMiscReg(), GenericTimerISA::setMiscReg(), CheckerThreadContext< TC >::setMiscReg(), CheckerCPU::setMiscReg(), ArmISA::ISA::setMiscReg(), RiscvISA::ISA::setMiscRegNoEffect(), MipsISA::ISA::setMiscRegNoEffect(), SparcISA::ISA::setMiscRegNoEffect(), CheckerThreadContext< TC >::setMiscRegNoEffect(), CheckerCPU::setMiscRegNoEffect(), ArmISA::ISA::setMiscRegNoEffect(), CxxConfigManager::setParam(), CxxConfigManager::setParamVector(), VncServer::setPixelFormat(), Scoreboard::setReg(), MipsISA::ISA::setRegMask(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), FVPBasePwrCtrl::setStandByWfi(), BaseRemoteGDB::setTempBreakpoint(), ArmISA::PMU::setThreadContext(), Intel8254Timer::Counter::CounterEvent::setTo(), BaseKvmCPU::setupCounters(), BaseSimpleCPU::setupFetchRequest(), RiscvISA::Walker::WalkerState::setupWalk(), PhysRegFile::setVecElem(), SimpleThread::setVecElem(), PhysRegFile::setVecLane(), SimpleThread::setVecLaneT(), PhysRegFile::setVecPredReg(), SimpleThread::setVecPredReg(), PhysRegFile::setVecReg(), SimpleThread::setVecReg(), FVPBasePwrCtrl::setWakeRequest(), Topology::shortest_path_to_node(), MinorCPU::signalDrainDone(), DrainManager::signalDrainDone(), X86ISA::I82094AA::signalInterrupt(), X86ISA::I8259::signalInterrupt(), X86ISA::X86StaticInst::signedPick(), DefaultDecode< Impl >::skidInsert(), DefaultIEW< Impl >::skidInsert(), DefaultRename< Impl >::skidInsert(), VMA::sliceRegionLeft(), VMA::sliceRegionRight(), SMMUTranslationProcess::smmuTLBLookup(), SMMUTranslationProcess::smmuTLBUpdate(), GicV2::softInt(), SimpleIndirectPredictor::squash(), TAGE::squash(), StoreSet::squash(), BPredUnit::squash(), MemDepUnit< MemDepPred, Impl >::squash(), DefaultIEW< Impl >::squash(), DefaultRename< Impl >::squash(), ROB< Impl >::squash(), DefaultDecode< Impl >::squash(), InstructionQueue< Impl >::squash(), LSQUnit< Impl >::squash(), TAGEBase::squash(), DefaultFetch< Impl >::squash(), DefaultCommit< Impl >::squashAfter(), DefaultIEW< Impl >::squashDueToBranch(), DefaultIEW< Impl >::squashDueToMemOrder(), DefaultFetch< Impl >::squashFromDecode(), DefaultCommit< Impl >::squashFromSquashAfter(), DefaultCommit< Impl >::squashFromTC(), DefaultCommit< Impl >::squashFromTrap(), FullO3CPU< O3CPUImpl >::squashInstIt(), UFSHostDevice::UFSSCSIDevice::SSDReadDone(), UFSHostDevice::UFSSCSIDevice::SSDWriteDone(), UFSHostDevice::UFSSCSIDevice::SSDWriteStart(), AbstractController::stallBuffer(), MessageBuffer::stallMessage(), RiscvISA::Walker::start(), X86ISA::Walker::start(), IdeDisk::startCommand(), FVPBasePwrCtrl::startCoreUp(), VirtIO9PDiod::startDiod(), MemChecker::startRead(), PowerDomain::startup(), ArmV8KvmCPU::startup(), RubySystem::startup(), MinorCPU::startup(), DistEtherLink::startup(), CxxConfigManager::startup(), DistIface::startup(), RiscvISA::Walker::startWalkWrapper(), X86ISA::Walker::startWalkWrapper(), ComputeUnit::startWavefront(), MemChecker::startWrite(), Minor::LSQ::StoreBuffer::step(), Minor::Fetch1::stepQueues(), RiscvISA::Walker::WalkerState::stepWalk(), X86ISA::Walker::WalkerState::stepWalk(), LSQUnit< Impl >::storePostSend(), StoreSet::StoreSet(), O3ThreadContext< Impl >::suspend(), BaseKvmCPU::suspendContext(), MinorCPU::suspendContext(), AtomicSimpleCPU::suspendContext(), FullO3CPU< O3CPUImpl >::suspendContext(), TimingSimpleCPU::suspendContext(), BaseCPU::suspendContext(), PseudoInst::switchcpu(), BaseKvmCPU::switchOut(), MinorCPU::switchOut(), FullO3CPU< O3CPUImpl >::switchOut(), DefaultFetch< Impl >::switchToActive(), DefaultFetch< Impl >::switchToInactive(), FullO3CPU< O3CPUImpl >::syscall(), IGbE::tadvProcess(), TAGEBase::tagePredict(), Minor::Execute::takeInterrupt(), BaseKvmCPU::takeOverFrom(), MinorCPU::takeOverFrom(), UFSHostDevice::taskStart(), TCPIface::TCPIface(), VirtIO9PDiod::terminateDiod(), CacheMemory::testCacheAccess(), RubyPort::testDrainComplete(), AtomicSimpleCPU::threadSnoop(), AtomicSimpleCPU::tick(), MemTest::tick(), IGbE::tick(), DefaultDecode< Impl >::tick(), DefaultRename< Impl >::tick(), DefaultCommit< Impl >::tick(), FullO3CPU< O3CPUImpl >::tick(), BaseKvmCPU::tick(), DefaultIEW< Impl >::tick(), DefaultFetch< Impl >::tick(), IGbE::tidvProcess(), CpuLocalTimer::Timer::timerAtZero(), Root::timeSync(), X86ISA::GpuTLB::tlbLookup(), PseudoInst::togglesync(), AbstractMemory::trackLoadLocked(), Sinic::Device::transferDone(), NSGigE::transferDone(), UFSHostDevice::transferDone(), UFSHostDevice::transferHandler(), UFSHostDevice::transferStart(), X86ISA::TLB::translate(), EmulationPageTable::translate(), Gicv3Its::translate(), X86ISA::GpuTLB::translate(), ArmISA::TLB::translateComplete(), SparcISA::TLB::translateData(), ArmISA::TLB::translateFs(), RiscvISA::TLB::translateFunctional(), X86ISA::TLB::translateFunctional(), SparcISA::TLB::translateFunctional(), SparcISA::TLB::translateInst(), PowerISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), ArmISA::TLB::translateMmuOff(), ArmISA::TLB::translateMmuOn(), SMMUTranslationProcess::translateStage1And2(), SMMUTranslationProcess::translateStage2(), Prefetcher::Queued::translationComplete(), X86ISA::GpuTLB::translationReturn(), EtherLink::Link::transmit(), DistEtherLink::TxLink::transmit(), EtherSwitch::Interface::transmit(), Sinic::Device::transmit(), NSGigE::transmit(), BaseRemoteGDB::trap(), CacheMemory::tryCacheAccess(), AtomicSimpleCPU::tryCompleteDrain(), TimingSimpleCPU::tryCompleteDrain(), DrainManager::tryDrain(), FullO3CPU< O3CPUImpl >::tryDrain(), BaseKvmCPU::tryDrain(), TraceCPU::FixedRetryGen::tryNext(), Minor::Execute::tryPCEvents(), VirtIOConsole::TermRecvQueue::trySend(), RubyPort::trySendRetries(), SimpleMemobj::CPUSidePort::trySendRetry(), SimpleCache::CPUSidePort::trySendRetry(), SerialLink::SerialLinkSlavePort::trySendTiming(), Bridge::BridgeSlavePort::trySendTiming(), SerialLink::SerialLinkMasterPort::trySendTiming(), Bridge::BridgeMasterPort::trySendTiming(), DmaPort::trySendTimingReq(), Minor::Execute::tryToBranch(), Minor::Fetch1::tryToSend(), Minor::LSQ::tryToSend(), Minor::Fetch1::tryToSendToTransfers(), Minor::LSQ::tryToSendToTransfers(), EtherLink::Link::txComplete(), Sinic::Device::txDmaDone(), NSGigE::txDmaReadDone(), NSGigE::txDmaWriteDone(), EtherBus::txDone(), EtherLink::Link::txDone(), Sinic::Device::txKick(), NSGigE::txKick(), NSGigE::txReset(), IGbE::txStateMachine(), IGbE::txWire(), UFSHostDevice::UFSHostDevice(), UFSHostDevice::UFSSCSIDevice::UFSSCSIDevice(), DefaultDecode< Impl >::unblock(), DefaultRename< Impl >::unblock(), DefaultIEW< Impl >::unblock(), TAGE::uncondBranch(), UnifiedFreeList::UnifiedFreeList(), EmulationPageTable::unmap(), MultiLevelPageTable< EntryTypes >::unmap(), MemState::unmapRegion(), VGic::unPostMaintInt(), VGic::unPostVInt(), Pl011::unserialize(), HDLcd::unserialize(), RiscvISA::ISA::unserialize(), ArmISA::PMU::unserialize(), Sp804::Timer::unserialize(), PL031::unserialize(), A9GlobalTimer::Timer::unserialize(), SystemCounter::unserialize(), CpuLocalTimer::Timer::unserialize(), I2CBus::unserialize(), SMMUv3::unserialize(), VGic::unserialize(), Pl111::unserialize(), GicV2::unserialize(), Event::unserialize(), ArmISA::ISA::unserialize(), PhysicalMemory::unserializeStore(), BaseKvmCPU::unserializeThread(), LTAGE::update(), TAGE::update(), LocalBP::update(), BPredUnit::update(), VirtDescriptor::update(), BaseTrafficGen::update(), TAGE_SC_L::update(), Gicv3CPUInterface::update(), Minor::Execute::updateBranchData(), Minor::Fetch2::updateBranchPrediction(), DerivedClockDomain::updateClockPeriod(), BaseCache::updateCompressionData(), ArmISA::PMU::updateCounter(), Minor::Fetch1::updateExpectedSeqNums(), DefaultFetch< Impl >::updateFetchStatus(), TAGEBase::updateGHist(), TAGE_SC_L_TAGE::updateHistories(), TAGEBase::updateHistories(), Pl050::updateIntCtrl(), X86ISA::Interrupts::updateIntrInfo(), GicV2::updateIntState(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmState(), X86KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), updateKvmStateFPUCommon(), ArmKvmCPU::updateKvmStateMisc(), X86KvmCPU::updateKvmStateMSRs(), ArmISA::TLB::updateMiscReg(), WriteAllocator::updateMode(), X86ISA::Decoder::updateNPC(), X86ISA::Decoder::updateOffsetState(), TLBCoalescer::updatePhysAddresses(), HSAPacketProcessor::UpdateReadDispIdDmaEvent::UpdateReadDispIdDmaEvent(), HSAPacketProcessor::updateReadIndex(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopForward(), SnoopFilter::updateSnoopResponse(), IdeDisk::updateState(), DefaultDecode< Impl >::updateStatus(), DefaultIEW< Impl >::updateStatus(), DefaultCommit< Impl >::updateStatus(), DefaultRename< Impl >::updateStatus(), ArmV8KvmCPU::updateThreadContext(), ArmKvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContext(), updateThreadContextFPUCommon(), X86KvmCPU::updateThreadContextMSRs(), Checker< O3CPUImpl >::validateExecution(), Checker< O3CPUImpl >::verify(), DRAMCtrl::verifyMultiCmd(), DRAMCtrl::verifySingleCmd(), StoreSet::violation(), MemDepUnit< MemDepPred, Impl >::violation(), Gicv3CPUInterface::virtualUpdate(), VMA::VMA(), VncServer::VncServer(), DVFSHandler::voltageAtPerfLevel(), PseudoInst::wakeCPU(), FullO3CPU< O3CPUImpl >::wakeCPU(), MemDepUnit< MemDepPred, Impl >::wakeDependents(), InstructionQueue< Impl >::wakeDependents(), DefaultFetch< Impl >::wakeFromQuiesce(), CrossbarSwitch::wakeup(), NetworkInterface::wakeup(), Router::wakeup(), Throttle::wakeup(), BaseSimpleCPU::wakeup(), BaseKvmCPU::wakeup(), MinorCPU::wakeup(), FullO3CPU< O3CPUImpl >::wakeup(), Minor::Fetch1::wakeupFetch(), MinorCPU::wakeupOnEvent(), ArmISA::TableWalker::walk(), SMMUTranslationProcess::walkCacheLookup(), SMMUTranslationProcess::walkCacheUpdate(), SMMUTranslationProcess::walkStage1And2(), SMMUTranslationProcess::walkStage2(), CpuLocalTimer::Timer::watchdogAtZero(), IGbE::DescCache< iGbReg::RxDesc >::wbComplete(), VIPERCoalescer::wbL1(), PseudoInst::workbegin(), PseudoInst::workend(), System::workItemEnd(), MmioVirtIO::write(), PciVirtIO::write(), MmDisk::write(), Sp805::write(), Pl011::write(), X86ISA::Speaker::write(), VectorRegisterFile::write(), IsaFake::write(), Uart8250::write(), RawDiskImage::write(), FVPBasePwrCtrl::write(), HDLcd::write(), X86ISA::I8259::write(), Gicv2m::write(), Sp804::Timer::write(), PL031::write(), Gicv3::write(), EnergyCtrl::write(), A9GlobalTimer::Timer::write(), Pl050::write(), CowDiskImage::write(), X86ISA::I8042::write(), GpuDispatcher::write(), CpuLocalTimer::Timer::write(), Gicv3Its::write(), VirtIOBlock::write(), Sp804::write(), A9GlobalTimer::write(), RealViewCtrl::write(), CpuLocalTimer::write(), VirtDescriptor::write(), CopyEngine::write(), Gcn3ISA::VecOperand< DataType, Const, NumDwords >::write(), X86ISA::Interrupts::write(), RealViewOsc::write(), Gicv3Redistributor::write(), VncServer::write(), Gicv3Distributor::write(), Sinic::Device::write(), GenericPciHost::write(), HSAPacketProcessor::write(), NSGigE::write(), Pl111::write(), Gcn3ISA::ScalarOperand< DataType, Const, NumDwords >::write(), GenericTimerFrame::write(), GenericTimerMem::write(), IGbE::write(), LSQUnit< Impl >::write(), IGbE::DescCache< iGbReg::RxDesc >::writeback(), LSQUnit< Impl >::writeback(), IGbE::DescCache< iGbReg::RxDesc >::writeback1(), BaseCache::writebackBlk(), DefaultIEW< Impl >::writebackInsts(), LSQUnit< Impl >::writebackStores(), LSQ< Impl >::writebackStores(), GPUCoalescer::writeCallback(), BaseCache::writecleanBlk(), IdeDisk::writeCommand(), DRAMSim2::writeComplete(), CopyEngine::CopyEngineChannel::writeCompletionStatus(), IdeController::writeConfig(), PciDevice::writeConfig(), SMMUv3::writeControl(), IdeDisk::writeControl(), CopyEngine::CopyEngineChannel::writeCopyBytes(), CopyEngine::CopyEngineChannel::writeCopyBytesComplete(), GicV2::writeCpu(), VGic::writeCtrl(), X86ISA::I8042::writeData(), Terminal::writeData(), UFSHostDevice::writeDevice(), ItsProcess::writeDeviceTable(), GicV2::writeDistributor(), UFSHostDevice::writeDone(), PseudoInst::writefile(), Iob::writeIob(), ItsProcess::writeIrqCollectionTable(), ItsProcess::writeIrqTranslationTable(), Iob::writeJBus(), IGbE::RxDescCache::writePacket(), DRAMCtrl::writeQueueFull(), NoMaliGpu::writeReg(), X86ISA::I82094AA::writeReg(), HDLcd::writeReg(), X86ISA::Cmos::writeRegister(), SparcISA::TLB::writeSfsr(), CopyEngine::CopyEngineChannel::writeStatusComplete(), SparcISA::TLB::writeTagAccess(), VGic::writeVCpu(), BaseDynInst< Impl >::~BaseDynInst(), FlashDevice::~FlashDevice(), MemDepUnit< MemDepPred, Impl >::MemDepEntry::~MemDepEntry(), and Serializable::ScopedCheckpointSection::~ScopedCheckpointSection().

DPRINTF_UNCONDITIONAL

#define DPRINTF_UNCONDITIONAL	(		x,
			...
	)		do {} while (0)

Definition at line 231 of file trace.hh.

Referenced by Event::trace().

DPRINTFN

#define DPRINTFN

(

...

)

do {} while (0)

Definition at line 229 of file trace.hh.

Referenced by Terminal::accept(), RiscvProcess::argsInit(), BaseRemoteGDB::attach(), Trace::NativeTrace::checkReg(), X86ISA::StackTrace::decodePrologue(), ArmISA::StackTrace::decodePrologue(), Terminal::detach(), BaseRemoteGDB::detach(), DumbTOD::DumbTOD(), SparcISA::TLB::dumpAll(), HsailISA::Call::MagicPrintLane(), HsailISA::Call::MagicPrintLane64(), HsailISA::Call::MagicPrintWF32(), HsailISA::Call::MagicPrintWF32ID(), HsailISA::Call::MagicPrintWF64(), HsailISA::Call::MagicPrintWFFloat(), HsailISA::Call::MagicPrintWFID64(), HsailISA::Call::MagicSimBreak(), MC146818::MC146818(), Linux::DebugPrintk< Base >::process(), AnnotateDumpCallback::process(), CPUProgressEvent::process(), BreakPCEvent::process(), Terminal::read(), ComputeUnit::DTLBPort::recvTimingResp(), and BaseRemoteGDB::write().

DPRINTFNR

#define DPRINTFNR

(

...

)

do {} while (0)

Definition at line 230 of file trace.hh.

Referenced by BaseRemoteGDB::read(), and BaseRemoteGDB::write().

DPRINTFR

#define DPRINTFR

(

...

)

do {} while (0)

Definition at line 227 of file trace.hh.

Referenced by ElasticTrace::addCommittedInst(), ProbeManager::addListener(), ProbeManager::addPoint(), ElasticTrace::addSquashedInst(), TraceCPU::ElasticDataGen::checkAndIssue(), Linux::devRandom(), Loader::ElfObject::ElfObject(), TraceCPU::ElasticDataGen::execute(), ElasticTrace::fetchReqTrace(), CompressedTags::findVictim(), RubyTester::hitCallback(), TraceCPU::ElasticDataGen::HardwareResource::isAvailable(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), Loader::ElfObjectFormat::load(), Linux::openSpecialFile(), TraceCPU::ElasticDataGen::HardwareResource::printOccupancy(), TraceCPU::ElasticDataGen::printReadyList(), ElasticTrace::recordExecTick(), Sequencer::recordMissLatency(), GPUCoalescer::recordMissLatency(), ElasticTrace::recordToCommTick(), TraceCPU::ElasticDataGen::HardwareResource::release(), ProbeManager::removeListener(), TraceCPU::ElasticDataGen::GraphNode::removeRegDep(), ElasticTrace::removeRegDepMapEntry(), TraceCPU::ElasticDataGen::GraphNode::removeRobDep(), sys_setsysinfoFunc(), SimpleTrace::traceCommit(), SimpleTrace::traceFetch(), ElasticTrace::updateRegDep(), ElasticTrace::writeDepTrace(), TraceCPU::ElasticDataGen::GraphNode::writeElementAsTrace(), and BaseO3DynInst< Impl >::~BaseO3DynInst().

DPRINTFS

#define DPRINTFS	(		x,
			...
	)		do {} while (0)

Definition at line 226 of file trace.hh.

Referenced by Minor::LSQ::LSQRequest::completeDisabledMemAccess(), Minor::LSQ::LSQRequest::disableMemAccess(), Minor::FUPipeline::findTiming(), Minor::LSQ::SingleDataRequest::finish(), Minor::LSQ::SplitDataRequest::finish(), Minor::FUPipeline::FUPipeline(), CPA::hwWe(), RiscvISA::RiscvFault::invoke(), Minor::LSQ::SplitDataRequest::makeFragmentPackets(), Minor::LSQ::SplitDataRequest::makeFragmentRequests(), AnnotateDumpCallback::process(), Minor::LSQ::SingleDataRequest::retireResponse(), Minor::LSQ::SplitDataRequest::retireResponse(), Minor::LSQ::SplitDataRequest::sendNextFragmentToTranslation(), Minor::LSQ::LSQRequest::setState(), Minor::LSQ::SingleDataRequest::startAddrTranslation(), and Minor::LSQ::LSQRequest::tryToSuppressFault().

DTRACE

#define DTRACE

(

x

)

(false)

Definition at line 223 of file trace.hh.

Referenced by RiscvProcess::argsInit(), Minor::Scoreboard::canInstIssue(), Minor::Execute::commit(), DefaultCommit< Impl >::commitHead(), TimingSimpleCPU::completeIfetch(), TraceCPU::ElasticDataGen::completeMemAccess(), LSQUnit< Impl >::completeStore(), DefaultDecode< Impl >::decodeInsts(), EventQueue::deschedule(), VirtDescriptor::dump(), VirtQueue::dump(), VirtDescriptor::dumpChain(), VirtIO9PBase::dumpMsg(), Minor::Pipeline::evaluate(), Minor::Fetch2::evaluate(), TraceCPU::ElasticDataGen::execute(), DefaultFetch< Impl >::fetch(), Minor::FUPipeline::FUPipeline(), ArmISA::StackTrace::getstack(), Minor::Fetch1::handleTLBResponse(), TraceCPU::ElasticDataGen::init(), Minor::Execute::issue(), Trace::OstreamLogger::logMessage(), IGbE::TxDescCache::pktComplete(), Linux::DebugPrintk< Base >::process(), QoS::MemSinkCtrl::processNextReqEvent(), BaseRemoteGDB::read(), StubSlavePort::recvAtomic(), Minor::Fetch1::recvTimingResp(), Stats::Group::regStats(), EventQueue::reschedule(), Sinic::Device::rxKick(), NSGigE::rxKick(), EventQueue::schedule(), BaseKvmCPU::serializeThread(), EventQueue::serviceOne(), DefaultRename< Impl >::sortInsts(), VirtIO9PDiod::startDiod(), AtomicSimpleCPU::tick(), Sinic::Device::transmit(), NSGigE::transmit(), DrainManager::tryDrain(), IGbE::txWire(), DefaultIEW< Impl >::updateExeInstStats(), X86KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), ArmKvmCPU::updateKvmStateMisc(), ArmKvmCPU::updateTCStateCore(), ArmKvmCPU::updateTCStateMisc(), X86KvmCPU::updateThreadContext(), BaseRemoteGDB::write(), Terminal::writeData(), and BaseO3DynInst< Impl >::~BaseO3DynInst().

Function Documentation

name()

const std::string& name

(

)

Definition at line 50 of file trace.cc.

Referenced by sc_core::sc_port_b< tlm_nonblocking_put_if< T > >::_ifTypeName(), sc_gem5::VcdTraceFile::addNewTraceVal(), Stats::Group::addStatGroup(), sc_gem5::VcdTraceFile::addTraceVal(), arrayParamIn(), Stats::Text::beginGroup(), FALRU::CacheTracking::CacheTracking(), sc_gem5::ProcessObjRetFuncWrapper< T, R >::call(), sc_core::sc_signal< sc_dt::sc_int< W > >::check_writer(), sc_core::sc_signal< sc_dt::sc_uint< W > >::check_writer(), sc_core::sc_signal< sc_dt::sc_biguint< W > >::check_writer(), sc_core::sc_signal< sc_dt::sc_bigint< W > >::check_writer(), X86ISA::StackTrace::decodePrologue(), sc_gem5::Process::disable(), AddrOperandBase::disassemble(), Trace::Logger::dprintf_flag(), sc_gem5::ScSignalBaseT< sc_dt::sc_logic, WRITER_POLICY >::dump(), Event::dump(), dumpSimcall(), sc_core::sc_in_rv< W >::end_of_elaboration(), sc_core::sc_inout_rv< W >::end_of_elaboration(), Event::Event(), Iris::ThreadContext::extractResourceMap(), BaseXBar::findPort(), FastModel::AmbaFromTlmBridge64::gem5_getPort(), FastModel::AmbaToTlmBridge64::gem5_getPort(), FastModel::ScxEvsCortexA76< Types >::gem5_getPort(), sc_core::sc_module::gem5_getPort(), BrigObject::getFunction(), gethostnameFunc(), ProbePoint::getName(), MathExprPowerModel::getStaticPower(), Loader::ElfObject::handleLoadableSegment(), MSHR::handleSnoop(), sc_core::sc_vector_base::implicitCast(), EmbeddedPyBind::init(), X86ISA::Interrupts::init(), EmbeddedPython::initAll(), BaseRegOperand::initWithStrOffset(), Iris::ThreadContext::instanceRegistryChanged(), sc_gem5::Process::kill(), BaseXBar::Layer< MasterPort, SlavePort >::Layer(), AQLRingBuffer::name(), Serializable::ScopedCheckpointSection::nameOut(), sc_gem5::VcdTraceFile::nextSignalName(), Nop(), tlm::tlm_phase::operator unsigned int(), StringWrap::operator()(), Stats::ScalarPrint::operator()(), Stats::VectorPrint::operator()(), std::hash< X86ISA::ExtMachInst >::operator()(), sc_core::sc_process_handle::operator=(), sc_core::sc_attr_cltn::operator[](), Trace::OstreamLogger::OstreamLogger(), AddrOperandBase::parseAddr(), AnnotateDumpCallback::process(), BrigObject::processDirectives(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::push(), ThreadContext::quiesce(), BaseXBar::recvRangeChange(), sc_gem5::ScSignalBaseT< sc_dt::sc_logic, WRITER_POLICY >::register_port(), sc_core::sc_signal< sc_dt::sc_int< W > >::register_port(), sc_core::sc_signal< sc_dt::sc_uint< W > >::register_port(), sc_core::sc_signal< sc_dt::sc_biguint< W > >::register_port(), sc_core::sc_signal< sc_dt::sc_bigint< W > >::register_port(), Kernel::Statistics::regStats(), Ticked::regStats(), BaseXBar::regStats(), sc_core::sc_attr_cltn::remove(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::reserve(), sc_gem5::Process::reset(), sc_gem5::Process::run(), sc_gem5::Event::sc_event(), SC_MODULE(), sc_core::sc_report_compose_message(), sc_core::sc_trace(), sc_core::sc_trace< bool >(), sc_core::sc_trace< sc_dt::sc_logic >(), ArchTimer::scheduleEvents(), Serializable::ScopedCheckpointSection::ScopedCheckpointSection(), FastModel::ScxEvsCortexA76< Types >::ScxEvsCortexA76(), TimerTable::setDescription(), MemState::setMmapEnd(), O3ThreadContext< Impl >::setStatus(), Stats::Text::statName(), Stats::DataWrapVec< VectorStandardDeviation, VectorDistInfoProxy >::subname(), Stats::sum(), sc_gem5::Process::throw_it(), Ticked::Ticked(), sc_gem5::TraceFile::traceDeltas(), SparcISA::unameFunc(), unameFunc(), unameFunc32(), unameFunc64(), sc_gem5::Process::uniqueName(), Event::unserialize(), BaseCPU::unserializeThread(), Stats::Output::~Output(), SimpleThread::~SimpleThread(), SMMUv3BaseCache::~SMMUv3BaseCache(), ThreadContext::~ThreadContext(), and WalkCache::~WalkCache().