gem5  v20.0.0.3
pl111.hh
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37 
38 
43 #ifndef __DEV_ARM_PL111_HH__
44 #define __DEV_ARM_PL111_HH__
45 
46 #include <fstream>
47 #include <memory>
48 
49 #include "base/bmpwriter.hh"
50 #include "base/framebuffer.hh"
51 #include "base/output.hh"
52 #include "dev/arm/amba_device.hh"
53 #include "params/Pl111.hh"
54 #include "sim/serialize.hh"
55 
56 class VncInput;
57 
58 class Pl111: public AmbaDmaDevice
59 {
60  protected:
61  static const uint64_t AMBA_ID = ULL(0xb105f00d00141111);
63  static const int LcdTiming0 = 0x000;
64  static const int LcdTiming1 = 0x004;
65  static const int LcdTiming2 = 0x008;
66  static const int LcdTiming3 = 0x00C;
67  static const int LcdUpBase = 0x010;
68  static const int LcdLpBase = 0x014;
69  static const int LcdControl = 0x018;
70  static const int LcdImsc = 0x01C;
71  static const int LcdRis = 0x020;
72  static const int LcdMis = 0x024;
73  static const int LcdIcr = 0x028;
74  static const int LcdUpCurr = 0x02C;
75  static const int LcdLpCurr = 0x030;
76  static const int LcdPalette = 0x200;
77  static const int CrsrImage = 0x800;
78  static const int ClcdCrsrCtrl = 0xC00;
79  static const int ClcdCrsrConfig = 0xC04;
80  static const int ClcdCrsrPalette0 = 0xC08;
81  static const int ClcdCrsrPalette1 = 0xC0C;
82  static const int ClcdCrsrXY = 0xC10;
83  static const int ClcdCrsrClip = 0xC14;
84  static const int ClcdCrsrImsc = 0xC20;
85  static const int ClcdCrsrIcr = 0xC24;
86  static const int ClcdCrsrRis = 0xC28;
87  static const int ClcdCrsrMis = 0xC2C;
88 
89  static const int LcdPaletteSize = 128;
90  static const int CrsrImageSize = 256;
91 
92  static const int LcdMaxWidth = 1024; // pixels per line
93  static const int LcdMaxHeight = 768; // lines per panel
94 
95  static const int dmaSize = 8; // 64 bits
96  static const int maxOutstandingDma = 16; // 16 deep FIFO of 64 bits
97 
98  static const int buffer_size = LcdMaxWidth * LcdMaxHeight * sizeof(uint32_t);
99 
100  enum LcdMode {
101  bpp1 = 0,
109  };
110 
111  BitUnion8(InterruptReg)
112  Bitfield<1> underflow;
113  Bitfield<2> baseaddr;
114  Bitfield<3> vcomp;
115  Bitfield<4> ahbmaster;
116  EndBitUnion(InterruptReg)
117 
118  BitUnion32(TimingReg0)
119  Bitfield<7,2> ppl;
120  Bitfield<15,8> hsw;
121  Bitfield<23,16> hfp;
122  Bitfield<31,24> hbp;
123  EndBitUnion(TimingReg0)
124 
125  BitUnion32(TimingReg1)
126  Bitfield<9,0> lpp;
127  Bitfield<15,10> vsw;
128  Bitfield<23,16> vfp;
129  Bitfield<31,24> vbp;
130  EndBitUnion(TimingReg1)
131 
132  BitUnion32(TimingReg2)
133  Bitfield<4,0> pcdlo;
134  Bitfield<5> clksel;
135  Bitfield<10,6> acb;
136  Bitfield<11> avs;
137  Bitfield<12> ihs;
138  Bitfield<13> ipc;
139  Bitfield<14> ioe;
140  Bitfield<25,16> cpl;
141  Bitfield<26> bcd;
142  Bitfield<31,27> pcdhi;
143  EndBitUnion(TimingReg2)
144 
145  BitUnion32(TimingReg3)
146  Bitfield<6,0> led;
147  Bitfield<16> lee;
148  EndBitUnion(TimingReg3)
149 
150  BitUnion32(ControlReg)
151  Bitfield<0> lcden;
152  Bitfield<3,1> lcdbpp;
153  Bitfield<4> lcdbw;
154  Bitfield<5> lcdtft;
155  Bitfield<6> lcdmono8;
156  Bitfield<7> lcddual;
157  Bitfield<8> bgr;
158  Bitfield<9> bebo;
159  Bitfield<10> bepo;
160  Bitfield<11> lcdpwr;
161  Bitfield<13,12> lcdvcomp;
162  Bitfield<16> watermark;
163  EndBitUnion(ControlReg)
164 
171  class DmaDoneEvent : public Event
172  {
173  private:
174  Pl111 &obj;
175 
176  public:
177  DmaDoneEvent(Pl111 *_obj)
178  : Event(), obj(*_obj) {}
179 
180  void process() {
181  obj.dmaDoneEventFree.push_back(this);
182  obj.dmaDone();
183  }
184 
185  const std::string name() const {
186  return obj.name() + ".DmaDoneEvent";
187  }
188  };
189 
191  TimingReg0 lcdTiming0;
192 
194  TimingReg1 lcdTiming1;
195 
197  TimingReg2 lcdTiming2;
198 
200  TimingReg3 lcdTiming3;
201 
203  uint32_t lcdUpbase;
204 
206  uint32_t lcdLpbase;
207 
209  ControlReg lcdControl;
210 
212  InterruptReg lcdImsc;
213 
215  InterruptReg lcdRis;
216 
218  InterruptReg lcdMis;
219 
223 
227 
229  uint32_t clcdCrsrCtrl;
230 
232  uint32_t clcdCrsrConfig;
233 
237 
239  uint32_t clcdCrsrXY;
240 
242  uint32_t clcdCrsrClip;
243 
245  InterruptReg clcdCrsrImsc;
246 
248  InterruptReg clcdCrsrIcr;
249 
251  InterruptReg clcdCrsrRis;
252 
254  InterruptReg clcdCrsrMis;
255 
258 
261 
264 
267 
270 
272  uint16_t width;
273 
275  uint16_t height;
276 
278  uint8_t bytesPerPixel;
279 
281  uint8_t *dmaBuffer;
282 
285 
288 
291 
294 
296  uint32_t waterMark;
297 
299  uint32_t dmaPendingNum;
300 
302 
304  void updateVideoParams();
305 
307  void readFramebuffer();
308 
310  void generateReadEvent();
311 
313  void generateInterrupt();
314 
316  void fillFifo();
317 
319  void startDma();
320 
322  void dmaDone();
323 
326 
329 
348 
355 
357 
358  public:
359  typedef Pl111Params Params;
360 
361  const Params *
362  params() const
363  {
364  return dynamic_cast<const Params *>(_params);
365  }
366  Pl111(const Params *p);
367  ~Pl111();
368 
369  Tick read(PacketPtr pkt) override;
370  Tick write(PacketPtr pkt) override;
371 
372  void serialize(CheckpointOut &cp) const override;
373  void unserialize(CheckpointIn &cp) override;
374 
380  AddrRangeList getAddrRanges() const override;
381 };
382 
383 #endif
Bitfield< 11 > lcdpwr
Definition: pl111.hh:160
static const int LcdMis
Definition: pl111.hh:72
uint32_t clcdCrsrPalette1
Definition: pl111.hh:236
static const int LcdTiming2
Definition: pl111.hh:65
EndBitUnion(InterruptReg) BitUnion32(TimingReg0) Bitfield< 7
static const int dmaSize
Definition: pl111.hh:95
static const int CrsrImage
Definition: pl111.hh:77
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Definition: pl111.hh:251
uint32_t clcdCrsrCtrl
Cursor control register.
Definition: pl111.hh:229
static const int LcdIcr
Definition: pl111.hh:73
static const int LcdLpBase
Definition: pl111.hh:68
Internal gem5 representation of a frame buffer.
Definition: framebuffer.hh:65
InterruptReg lcdMis
Masked interrupt status register.
Definition: pl111.hh:218
VncInput * vnc
VNC server.
Definition: pl111.hh:263
Bitfield< 14 > ioe
Definition: pl111.hh:139
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: pl111.cc:768
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl111.cc:642
static const int LcdTiming1
Definition: pl111.hh:64
static const int buffer_size
Definition: pl111.hh:98
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:98
static const int LcdTiming0
ARM PL111 register map.
Definition: pl111.hh:63
uint32_t waterMark
DMA FIFO watermark.
Definition: pl111.hh:296
Pl111(const Params *p)
Definition: pl111.cc:56
uint16_t height
Frame buffer height - lines per panel.
Definition: pl111.hh:275
void updateVideoParams()
Send updated parameters to the vnc server.
Definition: pl111.cc:426
static const int LcdImsc
Definition: pl111.hh:70
Bitfield< 31, 24 > vbp
Definition: pl111.hh:129
led
Definition: pl111.hh:146
static const int LcdMaxWidth
Definition: pl111.hh:92
Bitfield< 31, 24 > hbp
Definition: pl111.hh:122
Bitfield< 2 > baseaddr
Definition: pl111.hh:113
Definition: cprintf.cc:40
Addr maxAddr
Frame buffer max address.
Definition: pl111.hh:290
static const int ClcdCrsrConfig
Definition: pl111.hh:79
Bitfield< 4 > ahbmaster
Definition: pl111.hh:115
PixelConverter converter
Definition: pl111.hh:259
void dmaDone()
DMA done event.
Definition: pl111.cc:501
static const int LcdTiming3
Definition: pl111.hh:66
TimingReg1 lcdTiming1
Vertical axis panel control register.
Definition: pl111.hh:194
static const int LcdPalette
Definition: pl111.hh:76
EventFunctionWrapper intEvent
Wrapper to create an event out of the interrupt.
Definition: pl111.hh:354
uint32_t lcdUpbase
Upper panel frame base address register.
Definition: pl111.hh:203
Bitfield< 5 > lcdtft
Definition: pl111.hh:154
Bitfield< 25, 16 > cpl
Definition: pl111.hh:140
Bitfield< 15, 8 > hsw
Definition: pl111.hh:120
Bitfield< 16 > watermark
Definition: pl111.hh:162
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
Definition: pl111.hh:254
InterruptReg lcdRis
Raw interrupt status register - const.
Definition: pl111.hh:215
uint32_t clcdCrsrXY
Cursor XY position register.
Definition: pl111.hh:239
TimingReg3 lcdTiming3
Line end control register.
Definition: pl111.hh:200
ControlReg lcdControl
Control register.
Definition: pl111.hh:209
Pl111Params Params
Definition: pl111.hh:359
static const int LcdControl
Definition: pl111.hh:69
Tick pixelClock
Pixel clock.
Definition: pl111.hh:257
Bitfield< 13, 12 > lcdvcomp
Definition: pl111.hh:161
Bitfield< 10, 6 > acb
Definition: pl111.hh:135
void startDma()
start the dmas off after power is enabled
Definition: pl111.cc:446
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
void generateReadEvent()
Generate dma framebuffer read event.
EventFunctionWrapper fillFifoEvent
Fill fifo.
Definition: pl111.hh:328
Definition: pl111.hh:58
uint64_t Tick
Tick count type.
Definition: types.hh:61
static const int ClcdCrsrXY
Definition: pl111.hh:82
Bitfield< 31, 27 > pcdhi
Definition: pl111.hh:142
uint32_t clcdCrsrClip
Cursor clip position register.
Definition: pl111.hh:242
pcdlo
Definition: pl111.hh:133
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
Definition: pl111.hh:222
static const int ClcdCrsrClip
Definition: pl111.hh:83
LcdMode
Definition: pl111.hh:100
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
Definition: pl111.hh:347
static const int ClcdCrsrRis
Definition: pl111.hh:86
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
Definition: pl111.hh:245
static const int LcdUpCurr
Definition: pl111.hh:74
Addr curAddr
Frame buffer current address.
Definition: pl111.hh:293
static const int ClcdCrsrPalette1
Definition: pl111.hh:81
Bitfield< 23, 16 > vfp
Definition: pl111.hh:128
uint32_t lcdLpbase
Lower panel frame base address register.
Definition: pl111.hh:206
Bitfield< 16 > lee
Definition: pl111.hh:147
void fillFifo()
fillFIFO event
Definition: pl111.cc:477
Bitfield< 3, 1 > lcdbpp
Definition: pl111.hh:152
uint8_t bytesPerPixel
Bytes per pixel.
Definition: pl111.hh:278
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
#define ULL(N)
uint64_t constant
Definition: types.hh:48
static const int maxOutstandingDma
Definition: pl111.hh:96
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:249
Bitfield< 26 > bcd
Definition: pl111.hh:141
EventFunctionWrapper readEvent
DMA framebuffer read event.
Definition: pl111.hh:325
static const int LcdLpCurr
Definition: pl111.hh:75
Tick startTime
Start time for frame buffer dma read.
Definition: pl111.hh:284
Bitfield< 3 > vcomp
Definition: pl111.hh:114
static const uint64_t AMBA_ID
Definition: pl111.hh:61
static const int CrsrImageSize
Definition: pl111.hh:90
static const int ClcdCrsrMis
Definition: pl111.hh:87
uint32_t clcdCrsrConfig
Cursor configuration register.
Definition: pl111.hh:232
static const int LcdUpBase
Definition: pl111.hh:67
uint32_t dmaPendingNum
Number of pending dma reads.
Definition: pl111.hh:299
virtual const std::string name() const
Definition: sim_object.hh:129
Bitfield< 10 > bepo
Definition: pl111.hh:159
Bitfield< 5 > clksel
Definition: pl111.hh:134
static const int LcdMaxHeight
Definition: pl111.hh:93
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism...
Definition: pl111.hh:226
Bitfield< 11 > avs
Definition: pl111.hh:136
Bitfield< 15, 10 > vsw
Definition: pl111.hh:127
ppl
Definition: pl111.hh:119
std::ostream CheckpointOut
Definition: serialize.hh:63
Definition: eventq.hh:245
static const int ClcdCrsrIcr
Definition: pl111.hh:85
Bitfield< 23, 16 > hfp
Definition: pl111.hh:121
InterruptReg lcdImsc
Interrupt mask set/clear register.
Definition: pl111.hh:212
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:111
Bitfield< 7 > lcddual
Definition: pl111.hh:156
BitUnion8(InterruptReg) Bitfield< 1 > underflow
PixelConverter pixelConverter() const
Definition: pl111.cc:384
Addr startAddr
Frame buffer base address.
Definition: pl111.hh:287
Bitfield< 8 > bgr
Definition: pl111.hh:157
static const int ClcdCrsrCtrl
Definition: pl111.hh:78
Bitfield< 13 > ipc
Definition: pl111.hh:138
Bitfield< 9 > bebo
Definition: pl111.hh:158
~Pl111()
Definition: pl111.cc:91
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Definition: pl111.hh:248
BmpWriter bmp
Helper to write out bitmaps.
Definition: pl111.hh:266
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:227
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl111.cc:552
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 lcdTiming0
Event wrapper for dmaDone()
Definition: pl111.hh:163
TimingReg2 lcdTiming2
Clock and signal polarity control register.
Definition: pl111.hh:197
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
Definition: pl111.hh:350
uint32_t clcdCrsrPalette0
Cursor palette registers.
Definition: pl111.hh:235
Bitfield< 4 > lcdbw
Definition: pl111.hh:153
void readFramebuffer()
DMA framebuffer read.
Definition: pl111.cc:454
Configurable RGB pixel converter.
Definition: pixel.hh:87
BitUnion32(UserDescFlags) Bitfield< 0 > seg_32bit
Bitfield< 12 > ihs
Definition: pl111.hh:137
void generateInterrupt()
Function to generate interrupt.
Definition: pl111.cc:755
bool enableCapture
Definition: pl111.hh:356
Bitfield< 0 > p
static const int ClcdCrsrPalette0
Definition: pl111.hh:80
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
Definition: pl111.hh:281
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: pl111.hh:269
lpp
Definition: pl111.hh:126
static const int ClcdCrsrImsc
Definition: pl111.hh:84
uint16_t width
Frame buffer width - pixels per line.
Definition: pl111.hh:272
static const int LcdRis
Definition: pl111.hh:71
static const int LcdPaletteSize
Definition: pl111.hh:89
Bitfield< 6 > lcdmono8
Definition: pl111.hh:155
FrameBuffer fb
Definition: pl111.hh:260
const Params * params() const
Definition: pl111.hh:362

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