gem5  v20.1.0.0
Macros | Functions | Variables
arm_cpu.cc File Reference
#include "arch/arm/kvm/arm_cpu.hh"
#include <linux/kvm.h>
#include <algorithm>
#include <cerrno>
#include <memory>
#include "arch/arm/interrupts.hh"
#include "arch/registers.hh"
#include "cpu/kvm/base.hh"
#include "debug/Kvm.hh"
#include "debug/KvmContext.hh"
#include "debug/KvmInt.hh"
#include "sim/pseudo_inst.hh"

Go to the source code of this file.

Macros

#define EXTRACT_FIELD(val, mask, shift)   (((val) & (mask)) >> (shift))
 
#define REG_IS_ARM(id)   (((id) & KVM_REG_ARCH_MASK) == KVM_REG_ARM)
 
#define REG_IS_32BIT(id)   (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32)
 
#define REG_IS_64BIT(id)   (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64)
 
#define REG_IS_CP(id, cp)   (((id) & KVM_REG_ARM_COPROC_MASK) == (cp))
 
#define REG_IS_CORE(id)   REG_IS_CP((id), KVM_REG_ARM_CORE)
 
#define REG_IS_VFP(id)   REG_IS_CP((id), KVM_REG_ARM_VFP)
 
#define REG_VFP_REG(id)   ((id) & KVM_REG_ARM_VFP_MASK)
 
#define REG_IS_VFP_REG(id)   (REG_VFP_REG(id) < 0x100)
 
#define REG_IS_VFP_CTRL(id)   (REG_VFP_REG(id) >= 0x100)
 
#define REG_IS_DEMUX(id)   REG_IS_CP((id), KVM_REG_ARM_DEMUX)
 
#define REG_CORE_IDX(id)   (~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE))
 
#define REG_CP(id)   EXTRACT_FIELD(id, KVM_REG_ARM_COPROC_MASK, KVM_REG_ARM_COPROC_SHIFT)
 
#define REG_CRN(id)   EXTRACT_FIELD(id, KVM_REG_ARM_32_CRN_MASK, KVM_REG_ARM_32_CRN_SHIFT)
 
#define REG_OPC1(id)   EXTRACT_FIELD(id, KVM_REG_ARM_OPC1_MASK, KVM_REG_ARM_OPC1_SHIFT)
 
#define REG_CRM(id)   EXTRACT_FIELD(id, KVM_REG_ARM_CRM_MASK, KVM_REG_ARM_CRM_SHIFT)
 
#define REG_OPC2(id)   EXTRACT_FIELD(id, KVM_REG_ARM_32_OPC2_MASK, KVM_REG_ARM_32_OPC2_SHIFT)
 
#define REG_CP32(cpnum, crn, opc1, crm, opc2)
 
#define REG_CP64(cpnum, opc1, crm)
 
#define REG_CORE32(kname)
 
#define REG_VFP32(regno)
 
#define REG_VFP64(regno)
 
#define REG_DEMUX32(dmxid, val)
 
#define INTERRUPT_ID(type, vcpu, irq)
 
#define INTERRUPT_VCPU_IRQ(vcpu)   INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_IRQ)
 
#define INTERRUPT_VCPU_FIQ(vcpu)   INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_FIQ)
 
#define COUNT_OF(l)   (sizeof(l) / sizeof(*l))
 

Functions

const static uint64_t KVM_REG64_TTBR0 (REG_CP64(15, 0, 2))
 
const static uint64_t KVM_REG64_TTBR1 (REG_CP64(15, 1, 2))
 

Variables

static uint64_t invariant_reg_vector []
 

Macro Definition Documentation

◆ COUNT_OF

#define COUNT_OF (   l)    (sizeof(l) / sizeof(*l))

Definition at line 187 of file arm_cpu.cc.

◆ EXTRACT_FIELD

#define EXTRACT_FIELD (   val,
  mask,
  shift 
)    (((val) & (mask)) >> (shift))

Definition at line 56 of file arm_cpu.cc.

◆ INTERRUPT_ID

#define INTERRUPT_ID (   type,
  vcpu,
  irq 
)
Value:
( \
((type) << KVM_ARM_IRQ_TYPE_SHIFT) | \
((vcpu) << KVM_ARM_IRQ_VCPU_SHIFT) | \
((irq) << KVM_ARM_IRQ_NUM_SHIFT))

Definition at line 175 of file arm_cpu.cc.

◆ INTERRUPT_VCPU_FIQ

#define INTERRUPT_VCPU_FIQ (   vcpu)    INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_FIQ)

Definition at line 183 of file arm_cpu.cc.

◆ INTERRUPT_VCPU_IRQ

#define INTERRUPT_VCPU_IRQ (   vcpu)    INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_IRQ)

Definition at line 180 of file arm_cpu.cc.

◆ REG_CORE32

#define REG_CORE32 (   kname)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U32) | \
(KVM_REG_ARM_CORE) | \
(KVM_REG_ARM_CORE_REG(kname)))

Definition at line 118 of file arm_cpu.cc.

◆ REG_CORE_IDX

#define REG_CORE_IDX (   id)    (~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE))

Definition at line 86 of file arm_cpu.cc.

◆ REG_CP

#define REG_CP (   id)    EXTRACT_FIELD(id, KVM_REG_ARM_COPROC_MASK, KVM_REG_ARM_COPROC_SHIFT)

Definition at line 89 of file arm_cpu.cc.

◆ REG_CP32

#define REG_CP32 (   cpnum,
  crn,
  opc1,
  crm,
  opc2 
)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U32) | \
((cpnum) << KVM_REG_ARM_COPROC_SHIFT) | \
((crn) << KVM_REG_ARM_32_CRN_SHIFT) | \
((opc1) << KVM_REG_ARM_OPC1_SHIFT) | \
((crm) << KVM_REG_ARM_CRM_SHIFT) | \
((opc2) << KVM_REG_ARM_32_OPC2_SHIFT))

Definition at line 104 of file arm_cpu.cc.

◆ REG_CP64

#define REG_CP64 (   cpnum,
  opc1,
  crm 
)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U64) | \
((cpnum) << KVM_REG_ARM_COPROC_SHIFT) | \
((opc1) << KVM_REG_ARM_OPC1_SHIFT) | \
((crm) << KVM_REG_ARM_CRM_SHIFT))

Definition at line 112 of file arm_cpu.cc.

◆ REG_CRM

#define REG_CRM (   id)    EXTRACT_FIELD(id, KVM_REG_ARM_CRM_MASK, KVM_REG_ARM_CRM_SHIFT)

Definition at line 98 of file arm_cpu.cc.

◆ REG_CRN

#define REG_CRN (   id)    EXTRACT_FIELD(id, KVM_REG_ARM_32_CRN_MASK, KVM_REG_ARM_32_CRN_SHIFT)

Definition at line 92 of file arm_cpu.cc.

◆ REG_DEMUX32

#define REG_DEMUX32 (   dmxid,
  val 
)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U32) | \
(dmxid) | (val))

Definition at line 131 of file arm_cpu.cc.

◆ REG_IS_32BIT

#define REG_IS_32BIT (   id)    (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32)

Definition at line 62 of file arm_cpu.cc.

◆ REG_IS_64BIT

#define REG_IS_64BIT (   id)    (((id) & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64)

Definition at line 65 of file arm_cpu.cc.

◆ REG_IS_ARM

#define REG_IS_ARM (   id)    (((id) & KVM_REG_ARCH_MASK) == KVM_REG_ARM)

Definition at line 59 of file arm_cpu.cc.

◆ REG_IS_CORE

#define REG_IS_CORE (   id)    REG_IS_CP((id), KVM_REG_ARM_CORE)

Definition at line 71 of file arm_cpu.cc.

◆ REG_IS_CP

#define REG_IS_CP (   id,
  cp 
)    (((id) & KVM_REG_ARM_COPROC_MASK) == (cp))

Definition at line 68 of file arm_cpu.cc.

◆ REG_IS_DEMUX

#define REG_IS_DEMUX (   id)    REG_IS_CP((id), KVM_REG_ARM_DEMUX)

Definition at line 80 of file arm_cpu.cc.

◆ REG_IS_VFP

#define REG_IS_VFP (   id)    REG_IS_CP((id), KVM_REG_ARM_VFP)

Definition at line 73 of file arm_cpu.cc.

◆ REG_IS_VFP_CTRL

#define REG_IS_VFP_CTRL (   id)    (REG_VFP_REG(id) >= 0x100)

Definition at line 78 of file arm_cpu.cc.

◆ REG_IS_VFP_REG

#define REG_IS_VFP_REG (   id)    (REG_VFP_REG(id) < 0x100)

Definition at line 77 of file arm_cpu.cc.

◆ REG_OPC1

#define REG_OPC1 (   id)    EXTRACT_FIELD(id, KVM_REG_ARM_OPC1_MASK, KVM_REG_ARM_OPC1_SHIFT)

Definition at line 95 of file arm_cpu.cc.

◆ REG_OPC2

#define REG_OPC2 (   id)    EXTRACT_FIELD(id, KVM_REG_ARM_32_OPC2_MASK, KVM_REG_ARM_32_OPC2_SHIFT)

Definition at line 101 of file arm_cpu.cc.

◆ REG_VFP32

#define REG_VFP32 (   regno)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U32) | \
KVM_REG_ARM_VFP | (regno))

Definition at line 123 of file arm_cpu.cc.

◆ REG_VFP64

#define REG_VFP64 (   regno)
Value:
( \
(KVM_REG_ARM | KVM_REG_SIZE_U64) | \
KVM_REG_ARM_VFP | (regno))

Definition at line 127 of file arm_cpu.cc.

◆ REG_VFP_REG

#define REG_VFP_REG (   id)    ((id) & KVM_REG_ARM_VFP_MASK)

Definition at line 74 of file arm_cpu.cc.

Function Documentation

◆ KVM_REG64_TTBR0()

const static uint64_t KVM_REG64_TTBR0 ( REG_CP64(15, 0, 2)  )
static

◆ KVM_REG64_TTBR1()

const static uint64_t KVM_REG64_TTBR1 ( REG_CP64(15, 1, 2)  )
static

Variable Documentation

◆ invariant_reg_vector

uint64_t invariant_reg_vector[]
static

Definition at line 138 of file arm_cpu.cc.

type
uint8_t type
Definition: inet.hh:421
ArmISA::opc2
Bitfield< 7, 5 > opc2
Definition: types.hh:115
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
ArmISA::irq
Bitfield< 1 > irq
Definition: miscregs_types.hh:327

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