gem5
v20.1.0.0
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#include <faults.hh>
Public Member Functions | |
InitInterrupt (uint8_t _vector) | |
void | invoke (ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) override |
Public Member Functions inherited from X86ISA::X86FaultBase | |
virtual uint8_t | getVector () const |
Get the vector of an interrupt. More... | |
Public Member Functions inherited from FaultBase | |
virtual | ~FaultBase () |
Additional Inherited Members | |
Protected Member Functions inherited from X86ISA::X86Interrupt | |
X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1) | |
Protected Member Functions inherited from X86ISA::X86FaultBase | |
X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1) | |
const char * | name () const override |
virtual bool | isBenign () |
virtual const char * | mnemonic () const |
virtual bool | isSoft () |
virtual std::string | describe () const |
Protected Attributes inherited from X86ISA::X86FaultBase | |
const char * | faultName |
const char * | mnem |
uint8_t | vector |
uint64_t | errorCode |
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inline |
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overridevirtual |
Reimplemented from X86ISA::X86FaultBase.
Definition at line 183 of file faults.cc.
References DPRINTF, X86ISA::index, X86ISA::MISCREG_CR0, X86ISA::MISCREG_CR2, X86ISA::MISCREG_CR3, X86ISA::MISCREG_CR4, X86ISA::MISCREG_CS, X86ISA::MISCREG_CS_ATTR, X86ISA::MISCREG_CS_BASE, X86ISA::MISCREG_CS_EFF_BASE, X86ISA::MISCREG_CS_LIMIT, X86ISA::MISCREG_DR0, X86ISA::MISCREG_DR1, X86ISA::MISCREG_DR2, X86ISA::MISCREG_DR3, X86ISA::MISCREG_DR6, X86ISA::MISCREG_DR7, X86ISA::MISCREG_EFER, X86ISA::MISCREG_FTW, X86ISA::MISCREG_IDTR_BASE, X86ISA::MISCREG_IDTR_LIMIT, X86ISA::MISCREG_M5_REG, X86ISA::MISCREG_MXCSR, X86ISA::MISCREG_RFLAGS, X86ISA::MISCREG_SEG_ATTR(), X86ISA::MISCREG_SEG_BASE(), X86ISA::MISCREG_SEG_EFF_BASE(), X86ISA::MISCREG_SEG_LIMIT(), X86ISA::MISCREG_SEG_SEL(), X86ISA::MISCREG_TR, X86ISA::MISCREG_TR_ATTR, X86ISA::MISCREG_TR_BASE, X86ISA::MISCREG_TR_LIMIT, X86ISA::MISCREG_TSG_BASE, X86ISA::MISCREG_TSG_LIMIT, X86ISA::MISCREG_TSL, X86ISA::MISCREG_TSL_ATTR, X86ISA::MISCREG_TSL_BASE, X86ISA::MISCREG_TSL_LIMIT, ArmISA::NUM_INTREGS, X86ISA::NUM_SEGMENTREGS, X86ISA::pc, ThreadContext::pcState(), ThreadContext::readMiscReg(), romMicroPC(), X86ISA::seg, ThreadContext::setIntReg(), and ThreadContext::setMiscReg().
Referenced by X86ISA::FsWorkload::initState().