gem5  v20.1.0.0
cpuid.cc
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28 
29 #include "arch/x86/cpuid.hh"
30 
31 #include "base/bitfield.hh"
32 #include "cpu/thread_context.hh"
33 
34 namespace X86ISA {
45  };
46 
57 
58  /*
59  * The following are defined by the spec but not yet implemented
60  */
61 /* // Function 9 is reserved
62  SVMInfo = 10,
63  // Functions 11-24 are reserved
64  TLB1GBPageInfo = 25,
65  PerformanceInfo,*/
66 
68  };
69 
70  static const int vendorStringSize = 13;
71  static const char vendorString[vendorStringSize] = "M5 Simulator";
72  static const int nameStringSize = 48;
73  static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU";
74 
75  uint64_t
76  stringToRegister(const char *str)
77  {
78  uint64_t reg = 0;
79  for (int pos = 3; pos >=0; pos--) {
80  reg <<= 8;
81  reg |= str[pos];
82  }
83  return reg;
84  }
85 
86  bool
87  doCpuid(ThreadContext * tc, uint32_t function,
88  uint32_t index, CpuidResult &result)
89  {
90  uint16_t family = bits(function, 31, 16);
91  uint16_t funcNum = bits(function, 15, 0);
92  if (family == 0x8000) {
93  // The extended functions
94  switch (funcNum) {
96  assert(vendorStringSize >= 12);
97  result = CpuidResult(
98  0x80000000 + NumExtendedCpuidFuncs - 1,
102  break;
104  result = CpuidResult(0x00020f51, 0x00000405,
105  0xe3d3fbff, 0x00000001);
106  break;
107  case NameString1:
108  case NameString2:
109  case NameString3:
110  {
111  // Zero fill anything beyond the end of the string. This
112  // should go away once the string is a vetted parameter.
113  char cleanName[nameStringSize];
114  memset(cleanName, '\0', nameStringSize);
115  strncpy(cleanName, nameString, nameStringSize);
116 
117  int offset = (funcNum - NameString1) * 16;
118  assert(nameStringSize >= offset + 16);
119  result = CpuidResult(
120  stringToRegister(cleanName + offset + 0),
121  stringToRegister(cleanName + offset + 4),
122  stringToRegister(cleanName + offset + 12),
123  stringToRegister(cleanName + offset + 8));
124  }
125  break;
126  case L1CacheAndTLB:
127  result = CpuidResult(0xff08ff08, 0xff20ff20,
128  0x40020140, 0x40020140);
129  break;
130  case L2L3CacheAndL2TLB:
131  result = CpuidResult(0x00000000, 0x42004200,
132  0x00000000, 0x04008140);
133  break;
134  case APMInfo:
135  result = CpuidResult(0x80000018, 0x68747541,
136  0x69746e65, 0x444d4163);
137  break;
138  case LongModeAddressSize:
139  result = CpuidResult(0x00003030, 0x00000000,
140  0x00000000, 0x00000000);
141  break;
142 /* case SVMInfo:
143  case TLB1GBPageInfo:
144  case PerformanceInfo:*/
145  default:
146  warn("x86 cpuid family 0x8000: unimplemented function %u",
147  funcNum);
148  return false;
149  }
150  } else if (family == 0x0000) {
151  // The standard functions
152  switch (funcNum) {
154  assert(vendorStringSize >= 12);
155  result = CpuidResult(
160  break;
161  case FamilyModelStepping:
162  result = CpuidResult(0x00020f51, 0x00000805,
163  0xe7dbfbff, 0x00000209);
164  break;
165  case ExtendedFeatures:
166  result = CpuidResult(0x00000000, 0x01800000,
167  0x00000000, 0x00000000);
168  break;
169  default:
170  warn("x86 cpuid family 0x0000: unimplemented function %u",
171  funcNum);
172  return false;
173  }
174  } else {
175  warn("x86 cpuid: unknown family %#x", family);
176  return false;
177  }
178 
179  return true;
180  }
181 } // namespace X86ISA
X86ISA::nameStringSize
static const int nameStringSize
Definition: cpuid.cc:72
warn
#define warn(...)
Definition: logging.hh:239
X86ISA::vendorStringSize
static const int vendorStringSize
Definition: cpuid.cc:70
X86ISA::CacheParams
@ CacheParams
Definition: cpuid.cc:40
X86ISA::NameString1
@ NameString1
Definition: cpuid.cc:50
X86ISA::VendorAndLargestStdFunc
@ VendorAndLargestStdFunc
Definition: cpuid.cc:36
X86ISA::LongModeAddressSize
@ LongModeAddressSize
Definition: cpuid.cc:56
X86ISA::VendorAndLargestExtFunc
@ VendorAndLargestExtFunc
Definition: cpuid.cc:48
X86ISA::StandardCpuidFunction
StandardCpuidFunction
Definition: cpuid.cc:35
X86ISA::APMInfo
@ APMInfo
Definition: cpuid.cc:55
X86ISA::stringToRegister
uint64_t stringToRegister(const char *str)
Definition: cpuid.cc:76
X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:87
X86ISA::vendorString
static const char vendorString[vendorStringSize]
Definition: cpuid.cc:71
X86ISA::ExtendedCpuidFunctions
ExtendedCpuidFunctions
Definition: cpuid.cc:47
X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:93
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
bitfield.hh
X86ISA::L2L3CacheAndL2TLB
@ L2L3CacheAndL2TLB
Definition: cpuid.cc:54
X86ISA::ExtendedFeatures
@ ExtendedFeatures
Definition: cpuid.cc:43
X86ISA::NumStandardCpuidFuncs
@ NumStandardCpuidFuncs
Definition: cpuid.cc:44
X86ISA::FamilyModelStepping
@ FamilyModelStepping
Definition: cpuid.cc:37
X86ISA::NumExtendedCpuidFuncs
@ NumExtendedCpuidFuncs
Definition: cpuid.cc:67
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
X86ISA::offset
offset
Definition: misc.hh:1024
X86ISA::nameString
static const char nameString[nameStringSize]
Definition: cpuid.cc:73
X86ISA::MonitorMwait
@ MonitorMwait
Definition: cpuid.cc:41
X86ISA::NameString2
@ NameString2
Definition: cpuid.cc:51
X86ISA::FamilyModelSteppingBrandFeatures
@ FamilyModelSteppingBrandFeatures
Definition: cpuid.cc:49
X86ISA::doCpuid
bool doCpuid(ThreadContext *tc, uint32_t function, uint32_t index, CpuidResult &result)
Definition: cpuid.cc:87
cpuid.hh
X86ISA::L1CacheAndTLB
@ L1CacheAndTLB
Definition: cpuid.cc:53
X86ISA::NameString3
@ NameString3
Definition: cpuid.cc:52
X86ISA::CacheAndTLB
@ CacheAndTLB
Definition: cpuid.cc:38
X86ISA::ThermalPowerMgmt
@ ThermalPowerMgmt
Definition: cpuid.cc:42
thread_context.hh
X86ISA::SerialNumber
@ SerialNumber
Definition: cpuid.cc:39
X86ISA::CpuidResult
Definition: cpuid.hh:38
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75

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