gem5
v20.1.0.0
arch
generic
debugfaults.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2010 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_GENERIC_DEBUGFAULTS_HH__
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#define __ARCH_GENERIC_DEBUGFAULTS_HH__
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#include <string>
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#include "
base/logging.hh
"
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#include "
sim/faults.hh
"
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namespace
GenericISA
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{
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class
M5DebugFault
:
public
FaultBase
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{
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protected
:
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std::string
_message
;
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virtual
void
debugFunc
() = 0;
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void
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advancePC
(
ThreadContext
*tc,
const
StaticInstPtr
&inst)
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{
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if
(inst) {
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auto
pc
= tc->
pcState
();
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inst->
advancePC
(
pc
);
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tc->
pcState
(
pc
);
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}
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}
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public
:
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M5DebugFault
(std::string _m) :
_message
(_m) {}
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template
<
class
...Args>
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M5DebugFault
(
const
std::string &
format
,
const
Args &...args) :
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_message
(
csprintf
(
format
, args...))
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{}
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std::string
message
() {
return
_message
; }
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void
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invoke
(
ThreadContext
*tc,
const
StaticInstPtr
&inst =
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StaticInst::nullStaticInstPtr
)
override
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{
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debugFunc
();
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advancePC
(tc, inst);
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}
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};
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// The "Flavor" template parameter is to keep warn, hack or inform messages
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// with the same token from blocking each other.
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template
<
class
Flavor>
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class
M5DebugOnceFault
:
public
M5DebugFault
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{
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protected
:
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bool
&
once
;
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template
<
class
F,
class
OnceToken>
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static
bool
&
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lookUpToken
(
const
OnceToken &token)
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{
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static
std::map<OnceToken, bool> tokenMap;
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return
tokenMap[token];
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}
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public
:
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template
<
class
OnceToken,
class
...Args>
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M5DebugOnceFault
(
const
OnceToken &token,
const
std::string &
format
,
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const
Args &...args) :
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M5DebugFault
(
format
, args...),
once
(
lookUpToken
<Flavor>(token))
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{}
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void
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invoke
(
ThreadContext
*tc,
const
StaticInstPtr
&inst =
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StaticInst::nullStaticInstPtr
)
override
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{
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if
(!
once
) {
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once
=
true
;
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debugFunc
();
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}
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advancePC
(tc, inst);
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}
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};
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class
M5PanicFault
:
public
M5DebugFault
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{
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public
:
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using
M5DebugFault::M5DebugFault
;
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void
debugFunc
()
override
{
panic
(
message
()); }
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FaultName
name
()
const override
{
return
"panic fault"
; }
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};
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class
M5FatalFault
:
public
M5DebugFault
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{
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public
:
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using
M5DebugFault::M5DebugFault
;
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void
debugFunc
()
override
{
fatal
(
message
()); }
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FaultName
name
()
const override
{
return
"fatal fault"
; }
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};
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template
<
class
Base>
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class
M5WarnFaultBase
:
public
Base
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{
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public
:
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using
Base::Base;
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void
debugFunc
()
override
{
warn
(this->message()); }
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FaultName
name
()
const override
{
return
"warn fault"
; }
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};
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using
M5WarnFault
=
M5WarnFaultBase<M5DebugFault>
;
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using
M5WarnOnceFault
=
M5WarnFaultBase<M5DebugOnceFault<M5WarnFault>
>;
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template
<
class
Base>
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class
M5HackFaultBase
:
public
Base
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{
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public
:
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using
Base::Base;
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void
debugFunc
()
override
{
hack
(this->message()); }
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FaultName
name
()
const override
{
return
"hack fault"
; }
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};
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using
M5HackFault
=
M5HackFaultBase<M5DebugFault>
;
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using
M5HackOnceFault
=
M5HackFaultBase<M5DebugOnceFault<M5HackFault>
>;
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template
<
class
Base>
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class
M5InformFaultBase
:
public
Base
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{
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public
:
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using
Base::Base;
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void
debugFunc
()
override
{
inform
(this->message()); }
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FaultName
name
()
const override
{
return
"inform fault"
; }
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};
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using
M5InformFault
=
M5InformFaultBase<M5DebugFault>
;
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using
M5InformOnceFault
=
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M5InformFaultBase<M5DebugOnceFault<M5InformFault>
>;
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}
// namespace GenericISA
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#endif // __ARCH_GENERIC_DEBUGFAULTS_HH__
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition:
logging.hh:183
warn
#define warn(...)
Definition:
logging.hh:239
GenericISA::M5HackFaultBase::name
FaultName name() const override
Definition:
debugfaults.hh:152
GenericISA::M5HackFaultBase::debugFunc
void debugFunc() override
Definition:
debugfaults.hh:151
StaticInst::advancePC
virtual void advancePC(TheISA::PCState &pcState) const =0
GenericISA::M5InformFaultBase::debugFunc
void debugFunc() override
Definition:
debugfaults.hh:163
GenericISA::M5DebugFault::advancePC
void advancePC(ThreadContext *tc, const StaticInstPtr &inst)
Definition:
debugfaults.hh:55
GenericISA::M5DebugOnceFault
Definition:
debugfaults.hh:86
GenericISA::M5DebugFault::message
std::string message()
Definition:
debugfaults.hh:72
GenericISA::M5DebugOnceFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) override
Definition:
debugfaults.hh:107
GenericISA::M5DebugFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) override
Definition:
debugfaults.hh:75
GenericISA::M5HackFaultBase
Definition:
debugfaults.hh:147
GenericISA::M5PanicFault::name
FaultName name() const override
Definition:
debugfaults.hh:123
GenericISA::M5DebugFault::debugFunc
virtual void debugFunc()=0
GenericISA::M5DebugFault::_message
std::string _message
Definition:
debugfaults.hh:52
faults.hh
GenericISA::M5DebugOnceFault::lookUpToken
static bool & lookUpToken(const OnceToken &token)
Definition:
debugfaults.hh:93
GenericISA::M5WarnFaultBase::name
FaultName name() const override
Definition:
debugfaults.hh:140
hack
#define hack(...)
Definition:
logging.hh:241
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
GenericISA::M5DebugFault::M5DebugFault
M5DebugFault(const std::string &format, const Args &...args)
Definition:
debugfaults.hh:68
GenericISA::M5PanicFault
Definition:
debugfaults.hh:118
GenericISA::M5FatalFault::debugFunc
void debugFunc() override
Definition:
debugfaults.hh:130
FaultName
const typedef char * FaultName
Definition:
faults.hh:49
MipsISA::pc
Bitfield< 4 > pc
Definition:
pra_constants.hh:240
GenericISA::M5InformFaultBase::name
FaultName name() const override
Definition:
debugfaults.hh:164
GenericISA::M5WarnFaultBase::debugFunc
void debugFunc() override
Definition:
debugfaults.hh:139
StaticInst::nullStaticInstPtr
static StaticInstPtr nullStaticInstPtr
Pointer to a statically allocated "null" instruction object.
Definition:
static_inst.hh:237
GenericISA::M5WarnFaultBase
Definition:
debugfaults.hh:135
ThreadContext::pcState
virtual TheISA::PCState pcState() const =0
GenericISA::M5PanicFault::debugFunc
void debugFunc() override
Definition:
debugfaults.hh:122
inform
#define inform(...)
Definition:
logging.hh:240
GenericISA::M5FatalFault::name
FaultName name() const override
Definition:
debugfaults.hh:131
GenericISA::M5DebugOnceFault::M5DebugOnceFault
M5DebugOnceFault(const OnceToken &token, const std::string &format, const Args &...args)
Definition:
debugfaults.hh:101
logging.hh
GenericISA::M5FatalFault
Definition:
debugfaults.hh:126
GenericISA::M5DebugFault::M5DebugFault
M5DebugFault(std::string _m)
Definition:
debugfaults.hh:65
RefCountingPtr< StaticInst >
ArmISA::format
Bitfield< 31, 29 > format
Definition:
miscregs_types.hh:640
GenericISA::M5InformFaultBase
Definition:
debugfaults.hh:159
GenericISA::M5DebugOnceFault::once
bool & once
Definition:
debugfaults.hh:89
FaultBase
Definition:
faults.hh:54
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition:
cprintf.hh:158
GenericISA::M5DebugFault
Definition:
debugfaults.hh:49
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition:
logging.hh:171
GenericISA
Definition:
debugfaults.hh:46
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