gem5  v20.1.0.0
host.cc
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37 
38 #include "dev/pci/host.hh"
39 
40 #include <utility>
41 
42 #include "debug/PciHost.hh"
43 #include "dev/pci/device.hh"
44 #include "dev/platform.hh"
45 #include "params/GenericPciHost.hh"
46 #include "params/PciHost.hh"
47 
48 PciHost::PciHost(const PciHostParams *p)
49  : PioDevice(p)
50 {
51 }
52 
54 {
55 }
56 
59 {
60  auto map_entry = devices.emplace(bus_addr, device);
61 
62  DPRINTF(PciHost, "%02x:%02x.%i: Registering device\n",
63  bus_addr.bus, bus_addr.dev, bus_addr.func);
64 
65  fatal_if(!map_entry.second,
66  "%02x:%02x.%i: PCI bus ID collision\n",
67  bus_addr.bus, bus_addr.dev, bus_addr.func);
68 
69  return DeviceInterface(*this, bus_addr, pin);
70 }
71 
72 PciDevice *
74 {
75  auto device = devices.find(addr);
76  return device != devices.end() ? device->second : nullptr;
77 }
78 
79 const PciDevice *
81 {
82  auto device = devices.find(addr);
83  return device != devices.end() ? device->second : nullptr;
84 }
85 
87  PciHost &_host,
88  PciBusAddr &bus_addr, PciIntPin interrupt_pin)
89  : host(_host),
90  busAddr(bus_addr), interruptPin(interrupt_pin)
91 {
92 }
93 
94 const std::string
96 {
97  return csprintf("%s.interface[%02x:%02x.%i]",
98  host.name(), busAddr.bus, busAddr.dev, busAddr.func);
99 }
100 
101 void
103 {
104  DPRINTF(PciHost, "postInt\n");
105 
106  host.postInt(busAddr, interruptPin);
107 }
108 
109 void
111 {
112  DPRINTF(PciHost, "clearInt\n");
113 
114  host.clearInt(busAddr, interruptPin);
115 }
116 
117 
118 GenericPciHost::GenericPciHost(const GenericPciHostParams *p)
119  : PciHost(p),
120  platform(*p->platform),
121  confBase(p->conf_base), confSize(p->conf_size),
122  confDeviceBits(p->conf_device_bits),
123  pciPioBase(p->pci_pio_base), pciMemBase(p->pci_mem_base),
124  pciDmaBase(p->pci_dma_base)
125 {
126 }
127 
129 {
130 }
131 
132 
133 Tick
135 {
136  const auto dev_addr(decodeAddress(pkt->getAddr() - confBase));
137  const Addr size(pkt->getSize());
138 
139  DPRINTF(PciHost, "%02x:%02x.%i: read: offset=0x%x, size=0x%x\n",
140  dev_addr.first.bus, dev_addr.first.dev, dev_addr.first.func,
141  dev_addr.second,
142  size);
143 
144  PciDevice *const pci_dev(getDevice(dev_addr.first));
145  if (pci_dev) {
146  // @todo Remove this after testing
147  pkt->headerDelay = pkt->payloadDelay = 0;
148  return pci_dev->readConfig(pkt);
149  } else {
150  uint8_t *pkt_data(pkt->getPtr<uint8_t>());
151  std::fill(pkt_data, pkt_data + size, 0xFF);
152  pkt->makeAtomicResponse();
153  return 0;
154  }
155 }
156 
157 Tick
159 {
160  const auto dev_addr(decodeAddress(pkt->getAddr() - confBase));
161 
162  DPRINTF(PciHost, "%02x:%02x.%i: write: offset=0x%x, size=0x%x\n",
163  dev_addr.first.bus, dev_addr.first.dev, dev_addr.first.func,
164  dev_addr.second,
165  pkt->getSize());
166 
167  PciDevice *const pci_dev(getDevice(dev_addr.first));
168  panic_if(!pci_dev,
169  "%02x:%02x.%i: Write to config space on non-existent PCI device\n",
170  dev_addr.first.bus, dev_addr.first.dev, dev_addr.first.func);
171 
172  // @todo Remove this after testing
173  pkt->headerDelay = pkt->payloadDelay = 0;
174 
175  return pci_dev->writeConfig(pkt);
176 }
177 
180 {
182 }
183 
186 {
187  const Addr offset(addr & mask(confDeviceBits));
188  const Addr bus_addr(addr >> confDeviceBits);
189 
190  return std::make_pair(
191  PciBusAddr(bits(bus_addr, 15, 8),
192  bits(bus_addr, 7, 3),
193  bits(bus_addr, 2, 0)),
194  offset);
195 }
196 
197 
198 void
200 {
202 }
203 
204 void
206 {
208 }
209 
210 
211 uint32_t
213 {
214  const PciDevice *dev(getDevice(addr));
215  assert(dev);
216 
217  return dev->interruptLine();
218 }
219 
220 
222 GenericPciHostParams::create()
223 {
224  return new GenericPciHost(this);
225 }
GenericPciHost::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: host.cc:134
GenericPciHost::GenericPciHost
GenericPciHost(const GenericPciHostParams *p)
Definition: host.cc:118
GenericPciHost::postInt
void postInt(const PciBusAddr &addr, PciIntPin pin) override
Post an interrupt to the CPU.
Definition: host.cc:199
PciIntPin
PciIntPin
Definition: types.hh:63
PciHost::getDevice
PciDevice * getDevice(const PciBusAddr &addr)
Retrieve a PCI device from its bus address.
Definition: host.cc:73
Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1016
PciHost::DeviceInterface::postInt
void postInt()
Post a PCI interrupt to the CPU.
Definition: host.cc:102
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:754
Packet::payloadDelay
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition: packet.hh:412
PciDevice::writeConfig
virtual Tick writeConfig(PacketPtr pkt)
Write to the PCI config space data that is stored locally.
Definition: device.cc:284
PciDevice::readConfig
virtual Tick readConfig(PacketPtr pkt)
Read from the PCI config space data that is stored locally.
Definition: device.cc:216
PciHost::DeviceInterface
Callback interface from PCI devices to the host.
Definition: host.hh:91
PciDevice::interruptLine
uint8_t interruptLine() const
Definition: device.hh:201
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
GenericPciHost::getAddrRanges
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
Definition: host.cc:179
GenericPciHost::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: host.cc:158
Packet::getSize
unsigned getSize() const
Definition: packet.hh:764
device.hh
Packet::headerDelay
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition: packet.hh:394
Platform::postPciInt
virtual void postPciInt(int line)
Cause the chipset to post a cpi interrupt to the CPU.
Definition: platform.cc:46
Platform::clearPciInt
virtual void clearPciInt(int line)
Clear a posted PCI->CPU interrupt.
Definition: platform.cc:52
GenericPciHost::clearInt
void clearInt(const PciBusAddr &addr, PciIntPin pin) override
Post an interrupt to the CPU.
Definition: host.cc:205
PciHost::devices
std::map< PciBusAddr, PciDevice * > devices
Currently registered PCI devices.
Definition: host.hh:242
GenericPciHost::confBase
const Addr confBase
Definition: host.hh:319
PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:99
PciHost::DeviceInterface::clearInt
void clearInt()
Clear a posted PCI interrupt.
Definition: host.cc:110
PciBusAddr
Definition: types.hh:41
PciHost::PciHost
PciHost(const PciHostParams *p)
Definition: host.cc:48
AddrRangeList
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition: addr_range.hh:618
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:638
GenericPciHost
Configurable generic PCI host interface.
Definition: host.hh:273
PciHost::DeviceInterface::name
const std::string name() const
Definition: host.cc:95
PciBusAddr::func
uint8_t func
Definition: types.hh:55
std::pair
STL pair class.
Definition: stl.hh:58
platform.hh
GenericPciHost::confSize
const Addr confSize
Definition: host.hh:320
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
host.hh
MipsISA::fill
fill
Definition: pra_constants.hh:54
PciHost::registerDevice
virtual DeviceInterface registerDevice(PciDevice *device, PciBusAddr bus_addr, PciIntPin pin)
Register a PCI device with the host.
Definition: host.cc:58
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:197
PciHost::~PciHost
virtual ~PciHost()
Definition: host.cc:53
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
GenericPciHost::~GenericPciHost
virtual ~GenericPciHost()
Definition: host.cc:128
GenericPciHost::platform
Platform & platform
Definition: host.hh:317
addr
ip6_addr_t addr
Definition: inet.hh:423
PciHost::DeviceInterface::DeviceInterface
DeviceInterface()=delete
GenericPciHost::confDeviceBits
const uint8_t confDeviceBits
Definition: host.hh:321
Packet::getPtr
T * getPtr()
get a pointer to the data ptr.
Definition: packet.hh:1157
GenericPciHost::decodeAddress
virtual std::pair< PciBusAddr, Addr > decodeAddress(Addr address)
Decode a configuration space address.
Definition: host.cc:185
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:219
PciBusAddr::bus
uint8_t bus
Definition: types.hh:53
PciHost
The PCI host describes the interface between PCI devices and a simulated system.
Definition: host.hh:72
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
PciBusAddr::dev
uint8_t dev
Definition: types.hh:54
GenericPciHost::mapPciInterrupt
virtual uint32_t mapPciInterrupt(const PciBusAddr &bus_addr, PciIntPin pin) const
Definition: host.cc:212
PciDevice
PCI device, base implementation is only config space.
Definition: device.hh:66
ArmISA::mask
Bitfield< 28, 24 > mask
Definition: miscregs_types.hh:711
ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:153
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75

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