gem5  v20.1.0.0
mem_sink.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2018-2020 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Author: Matteo Andreozzi
38  */
39 
40 #include "debug/Drain.hh"
41 #include "debug/QOS.hh"
42 #include "mem_sink.hh"
43 #include "params/QoSMemSinkInterface.hh"
44 #include "sim/system.hh"
45 
46 namespace QoS {
47 
48 MemSinkCtrl::MemSinkCtrl(const QoSMemSinkCtrlParams* p)
49  : MemCtrl(p), requestLatency(p->request_latency),
50  responseLatency(p->response_latency),
51  memoryPacketSize(p->memory_packet_size),
52  readBufferSize(p->read_buffer_size),
53  writeBufferSize(p->write_buffer_size), port(name() + ".port", *this),
54  interface(p->interface),
55  retryRdReq(false), retryWrReq(false), nextRequest(0), nextReqEvent(this)
56 {
57  // Resize read and write queue to allocate space
58  // for configured QoS priorities
59  readQueue.resize(numPriorities());
60  writeQueue.resize(numPriorities());
61 
62  interface->setMemCtrl(this);
63 }
64 
66 {}
67 
68 void
70 {
71  MemCtrl::init();
72 
73  // Allow unconnected memories as this is used in several ruby
74  // systems at the moment
75  if (port.isConnected()) {
77  }
78 }
79 
80 bool
81 MemSinkCtrl::readQueueFull(const uint64_t packets) const
82 {
83  return (totalReadQueueSize + packets > readBufferSize);
84 }
85 
86 bool
87 MemSinkCtrl::writeQueueFull(const uint64_t packets) const
88 {
89  return (totalWriteQueueSize + packets > writeBufferSize);
90 }
91 
92 Tick
94 {
96  "%s Should not see packets where cache is responding\n",
97  __func__);
98 
99  interface->access(pkt);
100  return responseLatency;
101 }
102 
103 void
105 {
106  pkt->pushLabel(name());
107 
109 
110  pkt->popLabel();
111 }
112 
113 Port &
114 MemSinkCtrl::getPort(const std::string &interface, PortID idx)
115 {
116  if (interface != "port") {
117  return MemCtrl::getPort(interface, idx);
118  } else {
119  return port;
120  }
121 }
122 
123 bool
125 {
126  // Request accepted
127  bool req_accepted = true;
128 
129  panic_if(!(pkt->isRead() || pkt->isWrite()),
130  "%s. Should only see "
131  "read and writes at memory controller\n",
132  __func__);
133 
134  panic_if(pkt->cacheResponding(),
135  "%s. Should not see packets where cache is responding\n",
136  __func__);
137 
138  DPRINTF(QOS,
139  "%s: REQUESTOR %s request %s addr %lld size %d\n",
140  __func__,
141  _system->getRequestorName(pkt->req->requestorId()),
142  pkt->cmdString(), pkt->getAddr(), pkt->getSize());
143 
144  uint64_t required_entries = divCeil(pkt->getSize(), memoryPacketSize);
145 
146  assert(required_entries);
147 
148  // Schedule packet
149  uint8_t pkt_priority = qosSchedule({&readQueue, &writeQueue},
150  memoryPacketSize, pkt);
151 
152  if (pkt->isRead()) {
153  if (readQueueFull(required_entries)) {
154  DPRINTF(QOS,
155  "%s Read queue full, not accepting\n", __func__);
156  // Remember that we have to retry this port
157  retryRdReq = true;
158  numReadRetries++;
159  req_accepted = false;
160  } else {
161  // Enqueue the incoming packet into corresponding
162  // QoS priority queue
163  readQueue.at(pkt_priority).push_back(pkt);
164  queuePolicy->enqueuePacket(pkt);
165  }
166  } else {
167  if (writeQueueFull(required_entries)) {
168  DPRINTF(QOS,
169  "%s Write queue full, not accepting\n", __func__);
170  // Remember that we have to retry this port
171  retryWrReq = true;
172  numWriteRetries++;
173  req_accepted = false;
174  } else {
175  // Enqueue the incoming packet into corresponding QoS
176  // priority queue
177  writeQueue.at(pkt_priority).push_back(pkt);
178  queuePolicy->enqueuePacket(pkt);
179  }
180  }
181 
182  if (req_accepted) {
183  // The packet is accepted - log it
184  logRequest(pkt->isRead()? READ : WRITE,
185  pkt->req->requestorId(),
186  pkt->qosValue(),
187  pkt->getAddr(),
188  required_entries);
189  }
190 
191  // Check if we have to process next request event
192  if (!nextReqEvent.scheduled()) {
193  DPRINTF(QOS,
194  "%s scheduling next request at "
195  "time %d (next is %d)\n", __func__,
196  std::max(curTick(), nextRequest), nextRequest);
197  schedule(nextReqEvent, std::max(curTick(), nextRequest));
198  }
199  return req_accepted;
200 }
201 
202 void
204 {
205  PacketPtr pkt = nullptr;
206 
207  // Evaluate bus direction
209 
210  // Record turnaround stats and update current state direction
212 
213  // Set current bus state
215 
216  // Access current direction buffer
217  std::vector<PacketQueue>* queue_ptr = (busState == READ ? &readQueue :
218  &writeQueue);
219 
220  DPRINTF(QOS,
221  "%s DUMPING %s queues status\n", __func__,
222  (busState == WRITE ? "WRITE" : "READ"));
223 
224  if (DTRACE(QOS)) {
225  for (uint8_t i = 0; i < numPriorities(); ++i) {
226  std::string plist = "";
227  for (auto& e : (busState == WRITE ? writeQueue[i]: readQueue[i])) {
228  plist += (std::to_string(e->req->requestorId())) + " ";
229  }
230  DPRINTF(QOS,
231  "%s priority Queue [%i] contains %i elements, "
232  "packets are: [%s]\n", __func__, i,
234  readQueueSizes[i],
235  plist);
236  }
237  }
238 
239  uint8_t curr_prio = numPriorities();
240 
241  for (auto queue = (*queue_ptr).rbegin();
242  queue != (*queue_ptr).rend(); ++queue) {
243 
244  curr_prio--;
245 
246  DPRINTF(QOS,
247  "%s checking %s queue [%d] priority [%d packets]\n",
248  __func__, (busState == READ? "READ" : "WRITE"),
249  curr_prio, queue->size());
250 
251  if (!queue->empty()) {
252  // Call the queue policy to select packet from priority queue
253  auto p_it = queuePolicy->selectPacket(&(*queue));
254  pkt = *p_it;
255  queue->erase(p_it);
256 
257  DPRINTF(QOS,
258  "%s scheduling packet address %d for requestor %s from "
259  "priority queue %d\n", __func__, pkt->getAddr(),
260  _system->getRequestorName(pkt->req->requestorId()),
261  curr_prio);
262  break;
263  }
264  }
265 
266  assert(pkt);
267 
268  // Setup next request service time - do it here as retry request
269  // hands over control to the port
271 
272  uint64_t removed_entries = divCeil(pkt->getSize(), memoryPacketSize);
273 
274  DPRINTF(QOS,
275  "%s scheduled packet address %d for requestor %s size is %d, "
276  "corresponds to %d memory packets\n", __func__, pkt->getAddr(),
277  _system->getRequestorName(pkt->req->requestorId()),
278  pkt->getSize(), removed_entries);
279 
280  // Schedule response
281  panic_if(!pkt->needsResponse(),
282  "%s response not required\n", __func__);
283 
284  // Do the actual memory access which also turns the packet
285  // into a response
286  interface->access(pkt);
287 
288  // Log the response
289  logResponse(pkt->isRead()? READ : WRITE,
290  pkt->req->requestorId(),
291  pkt->qosValue(),
292  pkt->getAddr(),
293  removed_entries, responseLatency);
294 
295  // Schedule the response
297  DPRINTF(QOS,
298  "%s response scheduled at time %d\n",
299  __func__, curTick() + responseLatency);
300 
301  // Finally - handle retry requests - this handles control
302  // to the port, so do it last
303  if (busState == READ && retryRdReq) {
304  retryRdReq = false;
305  port.sendRetryReq();
306  } else if (busState == WRITE && retryWrReq) {
307  retryWrReq = false;
308  port.sendRetryReq();
309  }
310 
311  // Check if we have to schedule another request event
313  !nextReqEvent.scheduled()) {
314 
316  DPRINTF(QOS,
317  "%s scheduling next request event at tick %d\n",
318  __func__, curTick() + requestLatency);
319  }
320 }
321 
324 {
326  DPRINTF(Drain,
327  "%s queues have requests, waiting to drain\n",
328  __func__);
329  return DrainState::Draining;
330  } else {
331  return DrainState::Drained;
332  }
333 }
334 
335 void
337 {
339 
340  // Initialize all the stats
341  using namespace Stats;
342 
343  numReadRetries.name(name() + ".numReadRetries")
344  .desc("Number of read retries");
345  numWriteRetries.name(name() + ".numWriteRetries")
346  .desc("Number of write retries");
347 }
348 
350  MemSinkCtrl& m)
351  : QueuedResponsePort(n, &m, queue, true),
352  memory(m), queue(memory, *this, true)
353 {}
354 
357 {
358  AddrRangeList ranges;
359  ranges.push_back(memory.interface->getAddrRange());
360  return ranges;
361 }
362 
363 Tick
365 {
366  return memory.recvAtomic(pkt);
367 }
368 
369 void
371 {
372  pkt->pushLabel(memory.name());
373 
374  if (!queue.trySatisfyFunctional(pkt)) {
375  // Default implementation of SimpleTimingPort::recvFunctional()
376  // calls recvAtomic() and throws away the latency; we can save a
377  // little here by just not calculating the latency.
378  memory.recvFunctional(pkt);
379  }
380 
381  pkt->popLabel();
382 }
383 
384 bool
386 {
387  return memory.recvTimingReq(pkt);
388 }
389 
390 } // namespace QoS
391 
393 QoSMemSinkCtrlParams::create()
394 {
395  return new QoS::MemSinkCtrl(this);
396 }
397 
398 QoSMemSinkInterface::QoSMemSinkInterface(const QoSMemSinkInterfaceParams* _p)
399  : AbstractMemory(_p)
400 {
401 }
402 
404 QoSMemSinkInterfaceParams::create()
405 {
406  return new QoSMemSinkInterface(this);
407 }
QoS::MemSinkCtrl::MemoryPort::getAddrRanges
AddrRangeList getAddrRanges() const
Gets the configured address ranges for this port.
Definition: mem_sink.cc:356
Stats::Group::regStats
virtual void regStats()
Callback to set stat parameters.
Definition: group.cc:64
QoS
Definition: mem_ctrl.cc:42
QoSMemSinkInterface::setMemCtrl
void setMemCtrl(QoS::MemSinkCtrl *_ctrl)
Setting a pointer to the interface.
Definition: mem_sink.hh:260
QoS::MemCtrl
The QoS::MemCtrl is a base class for Memory objects which support QoS - it provides access to a set o...
Definition: mem_ctrl.hh:59
QoS::MemCtrl::setCurrentBusState
void setCurrentBusState()
Set current bus direction (READ or WRITE) from next selected one.
Definition: mem_ctrl.hh:219
system.hh
Packet::cacheResponding
bool cacheResponding() const
Definition: packet.hh:619
QoSMemSinkInterface::QoSMemSinkInterface
QoSMemSinkInterface(const QoSMemSinkInterfaceParams *_p)
Definition: mem_sink.cc:398
QoS::MemSinkCtrl::interface
QoSMemSinkInterface *const interface
Create pointer to interface of actual media.
Definition: mem_sink.hh:173
QoS::MemCtrl::WRITE
@ WRITE
Definition: mem_ctrl.hh:63
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:754
memory
Definition: mem.h:38
QoS::MemCtrl::schedule
uint8_t schedule(RequestorID id, uint64_t data)
Definition: mem_ctrl.cc:207
QoS::MemCtrl::recordTurnaroundStats
void recordTurnaroundStats()
Record statistics on turnarounds based on busStateNext and busState values.
Definition: mem_ctrl.cc:348
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
QoS::MemSinkCtrl::nextReqEvent
EventWrapper< MemSinkCtrl, &MemSinkCtrl::processNextReqEvent > nextReqEvent
Event wrapper to schedule next request handler function.
Definition: mem_sink.hh:209
QoS::MemSinkCtrl::processNextReqEvent
void processNextReqEvent()
Processes the next Request event according to configured request latency.
Definition: mem_sink.cc:203
QoS::MemSinkCtrl::readQueue
std::vector< PacketQueue > readQueue
QoS-aware (per priority) incoming read requests packets queue.
Definition: mem_sink.hh:193
QoS::MemCtrl::numPriorities
uint8_t numPriorities() const
Gets the total number of priority levels in the QoS memory controller.
Definition: mem_ctrl.hh:346
QoS::MemSinkCtrl::MemoryPort::MemoryPort
MemoryPort(const std::string &, MemSinkCtrl &)
Constructor.
Definition: mem_sink.cc:349
sc_dt::to_string
const std::string to_string(sc_enc enc)
Definition: sc_fxdefs.cc:91
Packet::isRead
bool isRead() const
Definition: packet.hh:556
QoS::MemSinkCtrl::writeQueueFull
bool writeQueueFull(const uint64_t packets) const
Check if the write queue has room for more entries.
Definition: mem_sink.cc:87
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
QoS::MemSinkCtrl::readBufferSize
const uint64_t readBufferSize
Read request packets queue buffer size in #packets.
Definition: mem_sink.hh:162
QoS::MemSinkCtrl::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
Definition: mem_sink.cc:124
PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:237
Packet::pushLabel
void pushLabel(const std::string &lbl)
Push label for PrintReq (safe to call unconditionally).
Definition: packet.hh:1393
QoSMemSinkInterface
Definition: mem_sink.hh:256
Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:340
QoS::MemCtrl::READ
@ READ
Definition: mem_ctrl.hh:63
DTRACE
#define DTRACE(x)
Definition: debug.hh:146
std::vector
STL vector class.
Definition: stl.hh:37
QoS::MemSinkCtrl::recvFunctional
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
Definition: mem_sink.cc:104
Packet::getSize
unsigned getSize() const
Definition: packet.hh:764
QueuedResponsePort::schedTimingResp
void schedTimingResp(PacketPtr pkt, Tick when)
Schedule the sending of a timing response.
Definition: qport.hh:90
QoS::MemSinkCtrl::MemoryPort::recvFunctional
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
Definition: mem_sink.cc:370
AbstractMemory::functionalAccess
void functionalAccess(PacketPtr pkt)
Perform an untimed memory read or write without changing anything but the memory itself.
Definition: abstract_mem.cc:475
DrainState::Drained
@ Drained
Buffers drained, ready for serialization/handover.
QoS::MemCtrl::qosSchedule
uint8_t qosSchedule(std::initializer_list< Queues * > queues_ptr, uint64_t queue_entry_size, const PacketPtr pkt)
Assign priority to a packet by executing the configured QoS policy.
Definition: mem_ctrl.hh:475
DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:71
ArmISA::n
Bitfield< 31 > n
Definition: miscregs_types.hh:450
AbstractMemory
An abstract memory represents a contiguous block of physical memory, with an associated address range...
Definition: abstract_mem.hh:104
QoS::MemCtrl::logResponse
void logResponse(BusState dir, RequestorID id, uint8_t qos, Addr addr, uint64_t entries, double delay)
Called upon receiving a response, updates statistics and updates queues status.
Definition: mem_ctrl.cc:138
QoS::MemSinkCtrl::MemoryPort::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
Definition: mem_sink.cc:385
QoS::MemCtrl::totalWriteQueueSize
uint64_t totalWriteQueueSize
Total write request packets queue length in #packets.
Definition: mem_ctrl.hh:113
QoS::MemSinkCtrl
QoS Memory Sink.
Definition: mem_sink.hh:61
Packet::qosValue
uint8_t qosValue() const
QoS Value getter Returns 0 if QoS value was never set (constructor default).
Definition: packet.hh:729
divCeil
T divCeil(const T &a, const U &b)
Definition: intmath.hh:114
AbstractMemory::access
void access(PacketPtr pkt)
Perform an untimed memory access and update all the state (e.g.
Definition: abstract_mem.cc:373
QoS::MemSinkCtrl::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
Definition: mem_sink.cc:93
QoS::MemCtrl::logRequest
void logRequest(BusState dir, RequestorID id, uint8_t qos, Addr addr, uint64_t entries)
Called upon receiving a request or updates statistics and updates queues status.
Definition: mem_ctrl.cc:81
QoS::MemCtrl::busStateNext
BusState busStateNext
bus state for next request event triggered
Definition: mem_ctrl.hh:122
SimObject::getPort
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:123
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
Packet::cmdString
const std::string & cmdString() const
Return the string name of the cmd field (for debugging and tracing).
Definition: packet.hh:551
mem_sink.hh
QoS::MemCtrl::_system
System * _system
Pointer to the System object.
Definition: mem_ctrl.hh:155
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:570
QoS::MemCtrl::totalReadQueueSize
uint64_t totalReadQueueSize
Total read request packets queue length in #packets.
Definition: mem_ctrl.hh:110
QoS::MemSinkCtrl::numReadRetries
Stats::Scalar numReadRetries
Count the number of read retries.
Definition: mem_sink.hh:185
QoS::MemSinkCtrl::MemSinkCtrl
MemSinkCtrl(const QoSMemSinkCtrlParams *)
QoS Memory Sink Constructor.
Definition: mem_sink.cc:48
QoS::MemSinkCtrl::init
void init() override
Initializes this object.
Definition: mem_sink.cc:69
QoS::MemSinkCtrl::getPort
Port & getPort(const std::string &if_name, PortID=InvalidPortID) override
Getter method to access this memory's response port.
Definition: mem_sink.cc:114
QueuedResponsePort
A queued port is a port that has an infinite queue for outgoing packets and thus decouples the module...
Definition: qport.hh:58
QoS::MemSinkCtrl::drain
DrainState drain() override
Checks and return the Drain state of this SimObject.
Definition: mem_sink.cc:323
QoS::MemSinkCtrl::writeBufferSize
const uint64_t writeBufferSize
Write request packets queue buffer size in #packets.
Definition: mem_sink.hh:165
QoS::MemSinkCtrl::readQueueFull
bool readQueueFull(const uint64_t packets) const
Check if the read queue has room for more entries.
Definition: mem_sink.cc:81
QoS::MemSinkCtrl::writeQueue
std::vector< PacketQueue > writeQueue
QoS-aware (per priority) incoming read requests packets queue.
Definition: mem_sink.hh:198
Stats::DataWrap::name
Derived & name(const std::string &name)
Set the name and marks this stat to print at the end of simulation.
Definition: statistics.hh:274
name
const std::string & name()
Definition: trace.cc:50
QoS::MemCtrl::readQueueSizes
std::vector< uint64_t > readQueueSizes
Read request packets queue length in #packets, per QoS priority.
Definition: mem_ctrl.hh:104
ArmISA::e
Bitfield< 9 > e
Definition: miscregs_types.hh:61
QoS::MemSinkCtrl::memoryPacketSize
const uint64_t memoryPacketSize
Memory packet size in bytes.
Definition: mem_sink.hh:159
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:133
QoS::MemSinkCtrl::retryRdReq
bool retryRdReq
Read request pending.
Definition: mem_sink.hh:176
QoS::MemSinkCtrl::regStats
void regStats() override
Registers statistics.
Definition: mem_sink.cc:336
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:197
QoS::MemSinkCtrl::port
MemoryPort port
Memory response port.
Definition: mem_sink.hh:168
QoS::MemSinkCtrl::MemoryPort::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
Definition: mem_sink.cc:364
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
Port::isConnected
bool isConnected() const
Is this port currently connected to a peer?
Definition: port.hh:128
SimObject::init
virtual void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: sim_object.cc:73
QoS::MemSinkCtrl::nextRequest
Tick nextRequest
Next request service time.
Definition: mem_sink.hh:182
Packet::isWrite
bool isWrite() const
Definition: packet.hh:557
QoS::MemSinkCtrl::~MemSinkCtrl
virtual ~MemSinkCtrl()
Definition: mem_sink.cc:65
System::getRequestorName
std::string getRequestorName(RequestorID requestor_id)
Get the name of an object for a given request id.
Definition: system.cc:651
Stats
Definition: statistics.cc:61
ResponsePort::sendRetryReq
void sendRetryReq()
Send a retry to the request port that previously attempted a sendTimingReq to this response port and ...
Definition: port.hh:398
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
QoS::MemSinkCtrl::retryWrReq
bool retryWrReq
Write request pending.
Definition: mem_sink.hh:179
ResponsePort::sendRangeChange
void sendRangeChange() const
Called by the owner to send a range change.
Definition: port.hh:293
Stats::DataWrap::desc
Derived & desc(const std::string &_desc)
Set the description and marks this stat to print at the end of simulation.
Definition: statistics.hh:307
QoS::MemSinkCtrl::requestLatency
const Tick requestLatency
Memory between requests latency (ticks)
Definition: mem_sink.hh:153
QoS::MemCtrl::queuePolicy
const std::unique_ptr< QueuePolicy > queuePolicy
QoS Queue Policy: selects packet among same-priority queue.
Definition: mem_ctrl.hh:73
QoS::MemSinkCtrl::responseLatency
const Tick responseLatency
Memory response latency (ticks)
Definition: mem_sink.hh:156
QoS::MemCtrl::busState
BusState busState
Bus state used to control the read/write switching and drive the scheduling of the next request.
Definition: mem_ctrl.hh:119
QoS::MemCtrl::selectNextBusState
BusState selectNextBusState()
Returns next bus direction (READ or WRITE) based on configured policy.
Definition: mem_ctrl.cc:236
Packet::popLabel
void popLabel()
Pop label for PrintReq (safe to call unconditionally).
Definition: packet.hh:1403
DrainState::Draining
@ Draining
Draining buffers pending serialization/handover.
ArmISA::m
Bitfield< 0 > m
Definition: miscregs_types.hh:389
QoS::MemSinkCtrl::numWriteRetries
Stats::Scalar numWriteRetries
Count the number of write retries.
Definition: mem_sink.hh:188
curTick
Tick curTick()
The current simulated tick.
Definition: core.hh:45
QoS::MemCtrl::writeQueueSizes
std::vector< uint64_t > writeQueueSizes
Write request packets queue length in #packets, per QoS priority.
Definition: mem_ctrl.hh:107

Generated on Wed Sep 30 2020 14:02:13 for gem5 by doxygen 1.8.17