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46 #include "debug/MemTest.hh"
58 memtest.completeRequest(pkt);
74 if (!port.sendTimingReq(pkt)) {
84 tickEvent([this]{
tick(); },
name()),
85 noRequestEvent([
this]{ noRequest(); },
name()),
86 noResponseEvent([
this]{ noResponse(); },
name()),
90 interval(
p->interval),
91 percentReads(
p->percent_reads),
92 percentFunctional(
p->percent_functional),
93 percentUncacheable(
p->percent_uncacheable),
94 requestorId(
p->system->getRequestorId(
this)),
95 blockSize(
p->system->cacheLineSize()),
96 blockAddrMask(blockSize - 1),
97 progressInterval(
p->progress_interval),
98 progressCheck(
p->progress_check),
99 nextProgressMessage(
p->progress_interval),
100 maxLoads(
p->max_loads),
101 atomic(
p->system->isAtomicMode()),
102 suppressFuncErrors(
p->suppress_func_errors), stats(
this)
105 fatal_if(
id >= blockSize,
"Too many testers, only %d allowed\n",
108 baseAddr1 = 0x100000;
109 baseAddr2 = 0x400000;
110 uncacheAddr = 0x800000;
117 schedule(tickEvent,
curTick());
118 schedule(noRequestEvent, clockEdge(progressCheck));
124 if (if_name ==
"port")
134 assert(req->getSize() == 1);
142 pkt->
isWrite() ?
"write" :
"read",
144 pkt->
isError() ?
"error" :
"success");
146 const uint8_t *pkt_data = pkt->
getConstPtr<uint8_t>();
150 panic(
"%s access failed at %#x\n",
151 pkt->
isWrite() ?
"Write" :
"Read", req->getPaddr());
155 if (pkt_data[0] != ref_data) {
156 panic(
"%s: read of %x (blk %x) @ cycle %d "
157 "returns %x, expected %x\n",
name(),
159 pkt_data[0], ref_data);
166 ccprintf(cerr,
"%s: completed %d read, %d write accesses @%d\n",
194 :
Stats::Group(parent),
195 ADD_STAT(numReads,
"number of read accesses completed"),
196 ADD_STAT(numWrites,
"number of write accesses completed")
240 "Tester %s has more than 100 outstanding requests\n",
name());
243 uint8_t *pkt_data =
new uint8_t[1];
248 uint8_t M5_VAR_USED ref_data = 0;
253 ref_data = ref->second;
257 "Initiating %sread at addr %x (blk %x) expecting %x\n",
258 do_functional ?
"functional " :
"", req->getPaddr(),
264 DPRINTF(
MemTest,
"Initiating %swrite at addr %x (blk %x) value %x\n",
265 do_functional ?
"functional " :
"", req->getPaddr(),
274 bool keep_ticking =
true;
326 MemTestParams::create()
void setSuppressFuncError()
bool scheduled() const
Determine if the current event is scheduled.
EventFunctionWrapper noResponseEvent
Bitfield< 23, 20 > atomic
void reschedule(Event &event, Tick when, bool always=false)
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
const bool suppressFuncErrors
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
const Cycles progressCheck
std::shared_ptr< Request > RequestPtr
RequestPtr req
A pointer to the original request.
MemTestStats(Stats::Group *parent)
void deschedule(Event &event)
void dataDynamic(T *p)
Set the data pointer to a value that should have delete [] called on it.
const unsigned percentUncacheable
void sendFunctional(PacketPtr pkt) const
Send a functional request packet, where the data is instantly updated everywhere in the memory system...
const unsigned progressInterval
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
EventFunctionWrapper tickEvent
const unsigned percentReads
std::unordered_map< Addr, uint8_t > referenceData
void schedule(Event &event, Tick when)
Addr blockAlign(Addr addr) const
Get the block aligned address.
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
bool sendPkt(PacketPtr pkt)
Ports are used to interface objects to each other.
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
std::set< Addr > outstandingAddrs
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
@ UNCACHEABLE
The request is to an uncacheable address.
The MemTest class tests a cache coherent memory system by generating false sharing and verifying the ...
const unsigned percentFunctional
MemTest::MemTestStats stats
ProbePointArg< PacketInfo > Packet
Packet probe point.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
const std::string & name()
virtual const std::string name() const
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Overload hash function for BasicBlockRange type.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
RequestorID requestorId
Request id for all generated traffic.
void ccprintf(cp::Print &print)
std::enable_if< std::is_integral< T >::value, T >::type random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
EventFunctionWrapper noRequestEvent
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
const T * getConstPtr() const
void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
void completeRequest(PacketPtr pkt, bool functional=false)
Complete a request by checking the response.
unsigned int TESTER_ALLOCATOR
#define panic(...)
This implements a cprintf based panic() function.
Tick curTick()
The current simulated tick.
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