gem5  v20.1.0.0
microfpop.hh
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37 
38 #ifndef __ARCH_X86_INSTS_MICROFPOP_HH__
39 #define __ARCH_X86_INSTS_MICROFPOP_HH__
40 
42 
43 namespace X86ISA
44 {
45 
49  class FpOp : public X86MicroopBase
50  {
51  protected:
52  const RegIndex src1;
53  const RegIndex src2;
54  const RegIndex dest;
55  const uint8_t dataSize;
56  const int8_t spm;
57 
58  // Constructor
59  FpOp(ExtMachInst _machInst,
60  const char *mnem, const char *_instMnem,
61  uint64_t setFlags,
62  InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
63  uint8_t _dataSize, int8_t _spm,
64  OpClass __opClass) :
65  X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
66  __opClass),
67  src1(_src1.index()), src2(_src2.index()), dest(_dest.index()),
68  dataSize(_dataSize), spm(_spm)
69  {}
70 /*
71  //Figure out what the condition code flags should be.
72  uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask,
73  uint64_t _dest, uint64_t _src1, uint64_t _src2,
74  bool subtract = false) const;
75  bool checkCondition(uint64_t flags) const;*/
76 
77  std::string generateDisassembly(
78  Addr pc, const Loader::SymbolTable *symtab) const override;
79  };
80 }
81 
82 #endif //__ARCH_X86_INSTS_MICROFPOP_HH__
X86ISA::FpOp::dest
const RegIndex dest
Definition: microfpop.hh:54
X86ISA::X86MicroopBase
Definition: microop.hh:88
Loader::SymbolTable
Definition: symtab.hh:59
microop.hh
X86ISA::InstRegIndex
Class for register indices passed to instruction constructors.
Definition: static_inst.hh:52
X86ISA::FpOp::spm
const int8_t spm
Definition: microfpop.hh:56
X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:93
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
X86ISA::FpOp::FpOp
FpOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, uint8_t _dataSize, int8_t _spm, OpClass __opClass)
Definition: microfpop.hh:59
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
X86ISA::FpOp::src2
const RegIndex src2
Definition: microfpop.hh:53
X86ISA::FpOp::dataSize
const uint8_t dataSize
Definition: microfpop.hh:55
RegIndex
uint16_t RegIndex
Definition: types.hh:52
X86ISA::FpOp
Base classes for FpOps which provides a generateDisassembly method.
Definition: microfpop.hh:49
X86ISA::FpOp::src1
const RegIndex src1
Definition: microfpop.hh:52
X86ISA::FpOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: microfpop.cc:55
X86ISA::pc
Bitfield< 19 > pc
Definition: misc.hh:805

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