gem5  v20.1.0.0
microregop.hh
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37 
38 #ifndef __ARCH_X86_INSTS_MICROREGOP_HH__
39 #define __ARCH_X86_INSTS_MICROREGOP_HH__
40 
42 
43 namespace X86ISA
44 {
48  class RegOpBase : public X86MicroopBase
49  {
50  protected:
51  const RegIndex src1;
52  const RegIndex dest;
53  const uint8_t dataSize;
54  const uint16_t ext;
56 
57  // Constructor
59  const char *mnem, const char *_instMnem, uint64_t setFlags,
60  InstRegIndex _src1, InstRegIndex _dest,
61  uint8_t _dataSize, uint16_t _ext,
62  OpClass __opClass) :
63  X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
64  __opClass),
65  src1(_src1.index()), dest(_dest.index()),
66  dataSize(_dataSize), ext(_ext)
67  {
68  foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
69  }
70 
71  //Figure out what the condition code flags should be.
72  uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask,
73  uint64_t _dest, uint64_t _src1, uint64_t _src2,
74  bool subtract = false) const;
75  };
76 
77  class RegOp : public RegOpBase
78  {
79  protected:
80  const RegIndex src2;
81 
82  // Constructor
83  RegOp(ExtMachInst _machInst,
84  const char *mnem, const char *_instMnem, uint64_t setFlags,
85  InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
86  uint8_t _dataSize, uint16_t _ext,
87  OpClass __opClass) :
88  RegOpBase(_machInst, mnem, _instMnem, setFlags,
89  _src1, _dest, _dataSize, _ext,
90  __opClass),
91  src2(_src2.index())
92  {
93  }
94 
95  std::string generateDisassembly(
96  Addr pc, const Loader::SymbolTable *symtab) const override;
97  };
98 
99  class RegOpImm : public RegOpBase
100  {
101  protected:
102  const uint8_t imm8;
103 
104  // Constructor
106  const char * mnem, const char *_instMnem, uint64_t setFlags,
107  InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
108  uint8_t _dataSize, uint16_t _ext,
109  OpClass __opClass) :
110  RegOpBase(_machInst, mnem, _instMnem, setFlags,
111  _src1, _dest, _dataSize, _ext,
112  __opClass),
113  imm8(_imm8)
114  {
115  }
116 
117  std::string generateDisassembly(
118  Addr pc, const Loader::SymbolTable *symtab) const override;
119  };
120 }
121 
122 #endif //__ARCH_X86_INSTS_MICROREGOP_HH__
X86ISA::RegOpBase::RegOpBase
RegOpBase(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _dest, uint8_t _dataSize, uint16_t _ext, OpClass __opClass)
Definition: microregop.hh:58
X86ISA::RegOpImm::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: microregop.cc:95
X86ISA::RegOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: microregop.cc:80
X86ISA::X86MicroopBase
Definition: microop.hh:88
Loader::SymbolTable
Definition: symtab.hh:59
microop.hh
X86ISA::RegOpBase::genFlags
uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask, uint64_t _dest, uint64_t _src1, uint64_t _src2, bool subtract=false) const
Definition: microregop.cc:48
X86ISA::RegOp
Definition: microregop.hh:77
X86ISA::RegOpImm::RegOpImm
RegOpImm(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest, uint8_t _dataSize, uint16_t _ext, OpClass __opClass)
Definition: microregop.hh:105
X86ISA::RegOpBase::ext
const uint16_t ext
Definition: microregop.hh:54
X86ISA::InstRegIndex
Class for register indices passed to instruction constructors.
Definition: static_inst.hh:52
X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:93
X86ISA::RegOpBase::foldOBit
RegIndex foldOBit
Definition: microregop.hh:55
X86ISA::RegOpBase::src1
const RegIndex src1
Definition: microregop.hh:51
X86ISA::RegOpBase::dataSize
const uint8_t dataSize
Definition: microregop.hh:53
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:55
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
X86ISA::RegOp::RegOp
RegOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, uint8_t _dataSize, uint16_t _ext, OpClass __opClass)
Definition: microregop.hh:83
RegIndex
uint16_t RegIndex
Definition: types.hh:52
X86ISA::RegOpBase
Base classes for RegOps which provides a generateDisassembly method.
Definition: microregop.hh:48
X86ISA::RegOpImm
Definition: microregop.hh:99
X86ISA::RegOp::src2
const RegIndex src2
Definition: microregop.hh:80
X86ISA::RegOpBase::dest
const RegIndex dest
Definition: microregop.hh:52
X86ISA::pc
Bitfield< 19 > pc
Definition: misc.hh:805
X86ISA::RegOpImm::imm8
const uint8_t imm8
Definition: microregop.hh:102

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