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56 if (
bi->hitBank > 0) {
57 if (abs (2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1) == 1) {
58 if (
bi->longestMatchPred != taken) {
60 if (
bi->altBank > 0) {
64 if (
bi->altBank == 0){
74 if (abs (2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1) == 1) {
81 if ((
bi->longestMatchPred !=
bi->altTaken) &&
82 (
bi->longestMatchPred == taken) &&
101 int dep =
bi->hitBank +
a;
104 int numAllocated = 0;
121 }
else { assert(
false); }
124 tCounter += (penalty - numAllocated);
163 uint32_t
pc = (uint32_t) pc_in;
164 return ((
pc ^ (
pc >> 4)) &
171 uint32_t hpc = ((uint32_t) branch_pc);
172 hpc = (hpc ^(hpc >> 4));
195 assert(! speculative);
211 int tmp = (branch_pc << 1) + taken;
212 int path = branch_pc;
214 int maxt = (brtype & 1) ? 1 : 4;
216 for (
int t = 0;
t < maxt;
t++) {
217 bool dir = (tmp & 1);
219 int pathbit = (
path & 127);
234 if (
bi->hitBank > 0) {
235 return (abs(2 *
gtable[
bi->hitBank][
bi->hitBankIndex].
ctr + 1)) >=
240 return (bim == 0) || (bim == 3);
246 MPP_TAGEParams::create()
265 MPP_LoopPredictorParams::create()
272 thirdH(0), pnb(
p->pnb), logPnb(
p->logPnb), pm(
p->pm), gnb(
p->gnb),
273 logGnb(
p->logGnb), gm(
p->gm)
278 for (int8_t &pos :
wl) {
301 unsigned int truncated_pc = branch_pc;
302 return ((truncated_pc << 1) +
bi->predBeforeSC) & ((1 <<
logBias) - 1);
309 return (((branch_pc ^ (branch_pc >> (
logBias - 1))) << 1)
310 +
bi->predBeforeSC) & ((1 <<
logBias) - 1);
323 return (
i >= (nbr - 2)) ? 1 : 0;
329 return ((branch_pc ^ (branch_pc >> 4)) & ((1 << (
logSizeUp)) - 1));
339 for (
int i = 0;
i < nbr;
i++) {
340 int64_t bhist = hist & ((int64_t) ((1 <<
length[
i]) - 1));
342 percsum += (2 * tab[
i][
index] + 1);
350 bool prev_pred_taken,
bool bias_bit,
bool use_conf_ctr,
351 int8_t conf_ctr,
unsigned conf_bits,
int hitBank,
int altBank,
352 int64_t phist,
int init_lsum)
354 bool pred_taken = prev_pred_taken;
357 bi->predBeforeSC = prev_pred_taken;
359 int lsum = init_lsum;
368 bi->scPred = (lsum >= 0);
370 if (pred_taken !=
bi->scPred) {
371 pred_taken =
bi->scPred;
374 if ((abs(lsum) < thres / 3))
375 pred_taken = (
firstH < 0) ?
bi->scPred : prev_pred_taken;
376 else if ((abs(lsum) < 2 * thres / 3))
377 pred_taken = (
secondH < 0) ?
bi->scPred : prev_pred_taken;
378 else if ((abs(lsum) < thres))
379 pred_taken = (
thirdH < 0) ?
bi->scPred : prev_pred_taken;
388 const MultiperspectivePerceptronTAGEParams *
p)
390 loopPredictor(
p->loop_predictor),
391 statisticalCorrector(
p->statistical_corrector)
394 "Speculative updates support is not implemented");
405 setExtraBits(numBitsTage + numBitsLoopPred + numBitsStatisticalCorrector);
417 unsigned long long int h =
g;
419 h ^= (
bi.getPC() ^ (
bi.getPC() >> 2));
439 for (
int i = 0;
i <
specs.size();
i += 1) {
452 for (
int i = 0;
i <
specs.size();
i += 1) {
456 short int max_weight = (1 << (
specs[
i]->width - 1)) - 1;
457 short int min_weight = -(1 << (
specs[
i]->width - 1));
459 if (*
c < max_weight) {
463 if (*
c > min_weight) {
475 unsigned int hpc = (
bi.getPC() ^ (
bi.getPC() >> 2));
476 unsigned int pc =
bi.getPC();
479 unsigned short recency_pc =
pc >> 2;
488 if (hpc % (
i + 2) == 0) {
499 if (hpc % (
i + 2) == 0) {
511 for (
int i = 0;
i < blurrypath_histories.size();
i += 1)
513 if (blurrypath_histories[
i].size() > 0) {
514 unsigned int z =
pc >>
i;
515 if (blurrypath_histories[
i][0] !=
z) {
516 memmove(&blurrypath_histories[
i][1],
517 &blurrypath_histories[
i][0],
518 sizeof(
unsigned int) *
519 (blurrypath_histories[
i].size() - 1));
520 blurrypath_histories[
i][0] =
z;
533 bp_history = (
void *)
bi;
543 init_lsum = -init_lsum;
548 bi->scBranchInfo, pred_taken,
false ,
552 bi->predictedTaken = pred_taken;
553 bi->lpBranchInfo->predTaken = pred_taken;
561 bool bias_bit,
int hitBank,
int altBank, int64_t phist)
563 bool scPred = (
bi->lsum >= 0);
565 if (
bi->predBeforeSC != scPred) {
566 if (abs(
bi->lsum) <
bi->thres) {
568 if (abs(
bi->lsum) <
bi->thres / 3) {
571 }
else if (abs(
bi->lsum) < 2 *
bi->thres / 3) {
574 }
else if (abs(
bi->lsum) <
bi->thres) {
582 if ((scPred != taken) || ((abs(
bi->lsum) <
bi->thres))) {
601 void *bp_history,
bool squashed,
612 tage->
squash(tid, taken,
bi->tageBranchInfo, corrTarget);
613 if (
bi->tageBranchInfo->condBranch) {
620 if (
bi->isUnconditional()) {
622 bi->scBranchInfo, corrTarget);
633 bool scPred = (
bi->scBranchInfo->lsum >= 0);
634 if ((scPred != taken) ||
635 ((abs(
bi->scBranchInfo->lsum) <
bi->scBranchInfo->thres))) {
639 bi->scBranchInfo, corrTarget,
false ,
645 bi->predictedTaken,
true);
652 uint32_t truncated_target = corrTarget;
653 uint32_t truncated_pc = instPC;
654 if (truncated_target < truncated_pc) {
670 bi->scBranchInfo, corrTarget);
673 false, inst, corrTarget);
686 bp_history = (
void *)
bi;
virtual void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo *bi, int64_t phist)=0
const unsigned long long int imli_mask1
Branch information data type.
void gUpdate(Addr branch_pc, bool taken, int64_t hist, std::vector< int > &length, std::vector< int8_t > *tab, int nbr, int logs, std::vector< int8_t > &w, StatisticalCorrector::BranchInfo *bi) override
unsigned getIndBiasSK(Addr branch_pc, StatisticalCorrector::BranchInfo *bi) const override
bool isDirectCtrl() const
int64_t gIndex(Addr branch_pc, int64_t bhist, int logs, int nbr, int i)
virtual size_t getSizeInBits() const
MultiperspectivePerceptronTAGE(const MultiperspectivePerceptronTAGEParams *p)
const unsigned nHistoryTables
unsigned getIndBias(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, bool bias) const override
virtual int gPredictions(ThreadID tid, Addr branch_pc, BranchInfo *bi, int &lsum, int64_t phist)=0
void updateStats(bool taken, BranchInfo *bi)
Update the stats.
int16_t ThreadID
Thread index/ID type.
const unsigned chooserConfWidth
std::vector< int8_t > bias
std::vector< unsigned int > tunedHistoryLengths
int gIndexLogsSubstr(int nbr, int i) override
FoldedHistory * computeTags[2]
std::vector< int > modpath_indices
const unsigned scCountersWidth
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::vector< HistorySpec * > specs
Predictor tables.
std::vector< int > pUpdateThreshold
virtual void getBiasLSUM(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, int &lsum) const =0
void updatePartial(ThreadID tid, MPPTAGEBranchInfo &bi, bool taken)
std::vector< bool > noSkip
std::vector< int > modhist_lengths
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
unsigned getIndBiasBank(Addr branch_pc, StatisticalCorrector::BranchInfo *bi, int hitBank, int altBank) const override
unsigned getUseAltIdx(TAGEBase::BranchInfo *bi, Addr branch_pc) override
Calculation of the index for useAltPredForNewlyAllocated On this base TAGE implementation it is alway...
const unsigned instShiftAmt
Number of bits to shift instructions by for predictor addresses.
void uncondBranch(ThreadID tid, Addr pc, void *&bp_history) override
unsigned int getIndex(ThreadID tid, MPPTAGEBranchInfo &bi, const HistorySpec &spec, int index) const
virtual bool calcConf(int index) const
void adjustAlloc(bool &alloc, bool taken, bool pred_taken) override
Extra calculation to tell whether TAGE allocaitons may happen or not on an update For this base TAGE ...
int bindex(Addr pc_in) const override
Computes the index used to access the bimodal table.
std::vector< ThreadHistory > threadHistory
std::vector< bool > btableHysteresis
void squash(ThreadID tid, void *bp_history) override
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, int nrand, Addr corrTarget, bool pred, bool preAdjustAlloc=false)
Update TAGE for conditional branches.
int computePartialSum(ThreadID tid, MPPTAGEBranchInfo &bi) const
void updateHistories(ThreadID tid, Addr branch_pc, bool taken, TAGEBase::BranchInfo *b, bool speculative, const StaticInstPtr &inst, Addr target) override
(Speculatively) updates global histories (path and direction).
std::vector< bool > btablePrediction
void handleTAGEUpdate(Addr branch_pc, bool taken, TAGEBase::BranchInfo *bi) override
Handles the update of the TAGE entries.
void resetUctr(uint8_t &u) override
Algorithm for resetting a single U counter.
void updatePathAndGlobalHistory(ThreadHistory &tHist, int brtype, bool taken, Addr branch_pc, Addr target)
void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, StatisticalCorrector::BranchInfo *bi, Addr corrTarget, bool b, int hitBank, int altBank, int64_t phist) override
void setExtraBits(int bits)
Sets the starting number of storage bits to compute the number of table entries.
void handleAllocAndUReset(bool alloc, bool taken, TAGEBase::BranchInfo *bi, int nrand) override
Handles Allocation and U bits reset on an update.
void update(ThreadID tid, Addr instPC, bool taken, void *bp_history, bool squashed, const StaticInstPtr &inst, Addr corrTarget) override
Updates the BP with taken/not taken information.
void updateStats(bool taken, BranchInfo *bi)
void squashLoop(BranchInfo *bi)
void baseUpdate(Addr pc, bool taken, BranchInfo *bi)
Updates the bimodal predictor.
virtual bool isHighConfidence(BranchInfo *bi) const
bool optionalAgeInc() const override
virtual void updateHistories(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *b, bool speculative, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr, Addr target=MaxAddr)
(Speculatively) updates global histories (path and direction).
std::vector< int > modhist_indices
std::vector< int8_t > * pgehl
bool scPredict(ThreadID tid, Addr branch_pc, bool cond_branch, StatisticalCorrector::BranchInfo *bi, bool prev_pred_taken, bool bias_bit, bool use_conf_ctr, int8_t conf_ctr, unsigned conf_bits, int hitBank, int altBank, int64_t phist, int init_lsum) override
std::vector< int > logTagTableSizes
std::vector< ThreadData * > threadData
const unsigned tagTableCounterBits
std::vector< int > modpath_lengths
Base class to implement the predictor tables.
virtual void updateStats(bool taken, BranchInfo *bi)
Update the stats.
bool loopPredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi, bool prev_pred_taken, unsigned instShiftAmt)
Get the loop prediction.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
virtual void squash(ThreadID tid, bool taken, BranchInfo *bi, Addr target)
Restores speculatively updated path and direction histories.
virtual bool scPredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi, bool prev_pred_taken, bool bias_bit, bool use_conf_ctr, int8_t conf_ctr, unsigned conf_bits, int hitBank, int altBank, int64_t phist, int init_lsum=0)
virtual unsigned int getHash(ThreadID tid, Addr pc, Addr pc2, int t) const =0
Gets the hash to index the table, using the pc of the branch, and the index of the table.
virtual void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken, BranchInfo *tage_bi, Addr corrTarget)
size_t getSizeInBits() const
void initGEHLTable(unsigned numLenghts, std::vector< int > lengths, std::vector< int8_t > *&table, unsigned logNumEntries, std::vector< int8_t > &w, int8_t wInitValue)
const unsigned logRatioBiModalHystEntries
static void ctrUpdate(T &ctr, bool taken, int nbits)
Updates a direction counter based on the actual branch outcome.
StatisticalCorrector * statisticalCorrector
std::vector< int8_t > * ggehl
bool isSpeculativeUpdateEnabled() const
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::vector< int8_t > biasSK
size_t getSizeInBits() const
void updateHistories(ThreadID tid, MPPTAGEBranchInfo &bi, bool taken)
void ctrUpdate(T &ctr, bool taken, int nbits)
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, Addr corrTarget, bool bias_bit, int hitBank, int altBank, int64_t phist)
const unsigned long long int imli_mask4
void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, bool tage_pred, BranchInfo *bi, unsigned instShiftAmt)
Update LTAGE for conditional branches.
void calculateParameters() override
Calculates the history lengths and some other paramters in derived classes.
unsigned getIndUpd(Addr branch_pc) const override
bool tagePredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi)
TAGE prediction called from TAGE::predict.
std::enable_if< std::is_integral< T >::value, T >::type random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
std::vector< int > table_sizes
const unsigned pUpdateThresholdWidth
const unsigned tagTableUBits
bool lookup(ThreadID tid, Addr instPC, void *&bp_history) override
Looks up a given PC in the BP to see if it is taken or not taken.
LoopPredictor * loopPredictor
bool isHighConfidence(TAGEBase::BranchInfo *bi) const override
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
MPP_StatisticalCorrector(const MPP_StatisticalCorrectorParams *p)
FoldedHistory * computeIndices
void handleUReset() override
Handles the U bits reset.
static std::stack< std::string > path
#define ULL(N)
uint64_t constant
bool calcConf(int index) const override
bool isUncondCtrl() const
void updateGHist(uint8_t *&h, bool dir, uint8_t *tab, int &PT)
(Speculatively) updates the global branch history.
int getPathHist(ThreadID tid) const
const bool speculativeHistUpdate
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